公开(公告)号：US20240047195A1

公开(公告)日：2024-02-08

申请号：US18378251

申请日：2023-10-10

Applicant: APPLIED MATERIALS, INC.

Inventor： AKHIL MEHROTRA ,  VINAY SHANKAR VIDYARTHI ,  DAKSH AGARWAL ,  SAMANEH SADIGHI ,  JASON KENNEY ,  RAJINDER DHINDSA

IPC: H01L21/02 ,  H01L21/3065 ,  H01J37/32 ,  H01L21/67 ,  H01L21/66 ,  H01L21/308

CPC classification number: H01L21/02274 ,  H01L21/0228 ,  H01L21/3065 ,  H01J37/32146 ,  H01L21/67069 ,  H01L22/26 ,  H01L21/308

Abstract: A method, apparatus and system for processing a wafer in a plasma chamber system, which includes at least a plasma generating element and a biasing electrode, include generating a plasma in the plasma chamber system by applying a source RF source power to the plasma generating element for a first period of time of a pulse period of the RF source power, after the expiration of the first period of time, removing the source RF source power, after a delay after the removal of the RF source power, applying an RF bias signal to the biasing electrode for a second period of time to bias the generated plasma towards the wafer, and after the expiration of the second period of time, removing the RF bias signal from the biasing electrode before a next pulse period of the RF source power. The generated plasma biased toward the wafer is used to process the wafer.

公开(公告)号：US20210285101A1

公开(公告)日：2021-09-16

申请号：US16816672

申请日：2020-03-12

Applicant: APPLIED MATERIALS, INC.

Inventor： TIMOTHY JOSEPH FRANKLIN ,  RAJINDER DHINDSA ,  DANIEL SANG BYUN ,  CARLATON WONG

IPC: C23C16/44 ,  H01J37/32 ,  H01L21/67

Abstract: An apparatus for processing substrates that includes a process chamber with a process volume and a conductance liner surrounding the process volume wherein the conductance liner has at least one fixed portion and a movable portion. The movable portion is configured to expose a substrate transfer slot in a wall of the process chamber. The apparatus also includes a lifting assembly with an actuator attached to the movable portion of the conductance liner. The lifting assembly is configured to move the movable portion of the conductance liner in a vertical direction to expose the substrate transfer slot.

公开(公告)号：US20190259562A1

公开(公告)日：2019-08-22

申请号：US16405377

申请日：2019-05-07

Applicant: APPLIED MATERIALS, INC.

Inventor： LEONID DORF ,  TRAVIS KOH ,  OLIVIER LUERE ,  OLIVIER JOUBERT ,  PHILIP A. KRAUS ,  RAJINDER DHINDSA ,  JAMES ROGERS

IPC: H01J37/08 ,  H01J37/248

Abstract: Systems and methods for creating arbitrarily-shaped ion energy distribution functions using shaped-pulse-bias. In an embodiment, a method includes applying a positive jump voltage to an electrode of a process chamber to neutralize a wafer surface, applying a negative jump voltage to the electrode to set a wafer voltage, and modulating the amplitude of the wafer voltage to produce a predetermined number of pulses to determine an ion energy distribution function. In another embodiment a method includes applying a positive jump voltage to an electrode of a process chamber to neutralize a wafer surface, applying a negative jump voltage to the electrode to set a wafer voltage, and applying a ramp voltage to the electrode that overcompensates for ion current on the wafer or applying a ramp voltage to the electrode that undercompensates for ion current on the wafer.

公开(公告)号：US20250079114A1

公开(公告)日：2025-03-06

申请号：US18793576

申请日：2024-08-02

Applicant: APPLIED MATERIALS, INC.

Inventor： ANDREI KHOMENKO ,  LEONID DORF ,  EVGENY KAMENETSKIY ,  VIACHESLAV PLOTNIKOV ,  RAJINDER DHINDSA

IPC: H01J37/08 ,  H01J37/32

Abstract: Embodiments include a plasma processing apparatus including a chamber with an inner chamber wall. A workpiece support is within the inner chamber wall, the workpiece support for supporting a workpiece in a processing region of the chamber. An ion probe extends through the chamber and inner chamber wall and into a plasma region above the workpiece.

公开(公告)号：US20200266022A1

公开(公告)日：2020-08-20

申请号：US16867034

申请日：2020-05-05

Applicant: APPLIED MATERIALS, INC.

Inventor： LEONID DORF ,  TRAVIS KOH ,  OLIVIER LUERE ,  OLIVIER JOUBERT ,  PHILIP A. KRAUS ,  RAJINDER DHINDSA ,  JAMES ROGERS

IPC: H01J37/08 ,  H01J37/32 ,  H01J37/248

Abstract: Systems and methods for creating arbitrarily-shaped ion energy distribution functions using shaped-pulse—bias. In an embodiment, a method includes applying a positive jump voltage to an electrode of a process chamber to neutralize a wafer surface, applying a negative jump voltage to the electrode to set a wafer voltage, and modulating the amplitude of the wafer voltage to produce a predetermined number of pulses to determine an ion energy distribution function. In another embodiment a method includes applying a positive jump voltage to an electrode of a process chamber to neutralize a wafer surface, applying a negative jump voltage to the electrode to set a wafer voltage, and applying a ramp voltage to the electrode that overcompensates for ion current on the wafer or applying a ramp voltage to the electrode that undercompensates for ion current on the wafer.

公开(公告)号：US20210343496A1

公开(公告)日：2021-11-04

申请号：US17377639

申请日：2021-07-16

Applicant: APPLIED MATERIALS, INC.

Inventor： LEONID DORF ,  TRAVIS KOH ,  OLIVIER LUERE ,  OLIVIER JOUBERT ,  PHILIP A. KRAUS ,  RAJINDER DHINDSA ,  JAMES ROGERS

IPC: H01J37/08 ,  H01J37/248 ,  H01J37/32

Abstract: Systems and methods for creating arbitrarily-shaped ion energy distribution functions using shaped-pulse-bias. In an embodiment, a method includes applying a positive jump voltage to an electrode of a process chamber to neutralize a wafer surface, applying a negative jump voltage to the electrode to set a wafer voltage, and modulating the amplitude of the wafer voltage to produce a predetermined number of pulses to determine an ion energy distribution function. In another embodiment a method includes applying a positive jump voltage to an electrode of a process chamber to neutralize a wafer surface, applying a negative jump voltage to the electrode to set a wafer voltage, and applying a ramp voltage to the electrode that overcompensates for ion current on the wafer or applying a ramp voltage to the electrode that undercompensates for ion current on the wafer.

公开(公告)号：US20170358431A1

公开(公告)日：2017-12-14

申请号：US15618082

申请日：2017-06-08

Applicant: APPLIED MATERIALS, INC.

Inventor： LEONID DORF ,  JAMES HUGH ROGERS ,  OLIVIER LUERE ,  TRAVIS KOH ,  RAJINDER DHINDSA ,  SUNIL SRINIVASAN

IPC: H01J37/32

CPC classification number: H01J37/32706 ,  H01J37/32146 ,  H01J37/32715 ,  H01J37/32935 ,  H01J37/3299 ,  H01J2237/334

Abstract: Systems and methods for controlling a voltage waveform at a substrate during plasma processing include applying a shaped pulse bias waveform to a substrate support, the substrate support including an electrostatic chuck, a chucking pole, a substrate support surface and an electrode separated from the substrate support surface by a layer of dielectric material. The systems and methods further include capturing a voltage representative of a voltage at a substrate positioned on the substrate support surface and iteratively adjusting the shaped pulse bias waveform based on the captured signal. In a plasma processing system a thickness and a composition of a layer of dielectric material separating the electrode and the substrate support surface can be selected such that a capacitance between the electrode and the substrate support surface is at least an order of magnitude greater than a capacitance between the substrate support surface and a plasma surface.