公开(公告)号：US20250079114A1

公开(公告)日：2025-03-06

申请号：US18793576

申请日：2024-08-02

Applicant: APPLIED MATERIALS, INC.

Inventor： ANDREI KHOMENKO ,  LEONID DORF ,  EVGENY KAMENETSKIY ,  VIACHESLAV PLOTNIKOV ,  RAJINDER DHINDSA

IPC: H01J37/08 ,  H01J37/32

Abstract: Embodiments include a plasma processing apparatus including a chamber with an inner chamber wall. A workpiece support is within the inner chamber wall, the workpiece support for supporting a workpiece in a processing region of the chamber. An ion probe extends through the chamber and inner chamber wall and into a plasma region above the workpiece.

公开(公告)号：US20200266022A1

公开(公告)日：2020-08-20

申请号：US16867034

申请日：2020-05-05

Applicant: APPLIED MATERIALS, INC.

Inventor： LEONID DORF ,  TRAVIS KOH ,  OLIVIER LUERE ,  OLIVIER JOUBERT ,  PHILIP A. KRAUS ,  RAJINDER DHINDSA ,  JAMES ROGERS

IPC: H01J37/08 ,  H01J37/32 ,  H01J37/248

Abstract: Systems and methods for creating arbitrarily-shaped ion energy distribution functions using shaped-pulse—bias. In an embodiment, a method includes applying a positive jump voltage to an electrode of a process chamber to neutralize a wafer surface, applying a negative jump voltage to the electrode to set a wafer voltage, and modulating the amplitude of the wafer voltage to produce a predetermined number of pulses to determine an ion energy distribution function. In another embodiment a method includes applying a positive jump voltage to an electrode of a process chamber to neutralize a wafer surface, applying a negative jump voltage to the electrode to set a wafer voltage, and applying a ramp voltage to the electrode that overcompensates for ion current on the wafer or applying a ramp voltage to the electrode that undercompensates for ion current on the wafer.

公开(公告)号：US20190259562A1

公开(公告)日：2019-08-22

申请号：US16405377

申请日：2019-05-07

Applicant: APPLIED MATERIALS, INC.

Inventor： LEONID DORF ,  TRAVIS KOH ,  OLIVIER LUERE ,  OLIVIER JOUBERT ,  PHILIP A. KRAUS ,  RAJINDER DHINDSA ,  JAMES ROGERS

IPC: H01J37/08 ,  H01J37/248

Abstract: Systems and methods for creating arbitrarily-shaped ion energy distribution functions using shaped-pulse-bias. In an embodiment, a method includes applying a positive jump voltage to an electrode of a process chamber to neutralize a wafer surface, applying a negative jump voltage to the electrode to set a wafer voltage, and modulating the amplitude of the wafer voltage to produce a predetermined number of pulses to determine an ion energy distribution function. In another embodiment a method includes applying a positive jump voltage to an electrode of a process chamber to neutralize a wafer surface, applying a negative jump voltage to the electrode to set a wafer voltage, and applying a ramp voltage to the electrode that overcompensates for ion current on the wafer or applying a ramp voltage to the electrode that undercompensates for ion current on the wafer.

公开(公告)号：US20180226225A1

公开(公告)日：2018-08-09

申请号：US15424405

申请日：2017-02-03

Applicant: APPLIED MATERIALS, INC.

Inventor： TRAVIS KOH ,  PHILIP ALLAN KRAUS ,  LEONID DORF ,  PRABU GOPALRAJA

IPC: H01J37/32 ,  H01L21/683 ,  H01L21/67

CPC classification number: H01J37/32045 ,  H01J37/32027 ,  H01J37/32697 ,  H01J37/32715 ,  H01J2237/332 ,  H01J2237/334 ,  H01L21/67069 ,  H01L21/6833

Abstract: Systems and methods for tunable workpiece biasing in a plasma reactor are provided herein. In some embodiments, a system includes: a plasma chamber that performs plasma processing on a workpiece, a first pulsed voltage source, coupled directly to a workpiece, a second pulsed voltage source, coupled capacitively to the workpiece, and a biasing controller comprising one or more processors, and memory, wherein the memory comprises a set of computer instructions that when executed by the one or more processors, independently controls the first pulsed voltage source and the second pulsed voltage source based on one or more parameters of the first pulsed voltage source and the second pulsed voltage source in order to tailor ion energy distribution of the flux of ions directed to the workpiece.

公开(公告)号：US20140020837A1

公开(公告)日：2014-01-23

申请号：US13666280

申请日：2012-11-01

Applicant: APPLIED MATERIALS, INC.

Inventor： ANDREW NGUYEN ,  KENNETH S. COLLINS ,  KARTIK RAMASWAMY ,  SHAHID RAUF ,  JAMES D. CARDUCCI ,  DOUGLAS A. BUCHBERGER, JR. ,  ANKUR AGARWAL ,  JASON A. KENNEY ,  LEONID DORF ,  AJIT BALAKRISHNA ,  RICHARD FOVELL

IPC: B01J12/00

CPC classification number: C23F1/08 ,  B01J12/002 ,  C23C14/28 ,  H01J37/321 ,  H01J37/3211 ,  H01J37/32733 ,  H01J37/32834 ,  H05H1/46

Abstract: A plasma reactor enclosure has a metallic portion and a dielectric portion of plural dielectric windows supported on the metallic portion, each of the dielectric windows extending around an axis of symmetry. Plural concentric coil antennas are disposed on an external side of the enclosure, respective ones of the coil antennas facing respective ones of the dielectric windows.

Abstract translation: 等离子体反应器外壳具有支撑在金属部分上的多个介电窗口的金属部分和电介质部分，每个电介质窗口围绕对称轴延伸。 多个同心线圈天线设置在外壳的外侧，相应的线圈天线面对相应的电介质窗口。

公开(公告)号：US20210343496A1

公开(公告)日：2021-11-04

申请号：US17377639

申请日：2021-07-16

Applicant: APPLIED MATERIALS, INC.

Inventor： LEONID DORF ,  TRAVIS KOH ,  OLIVIER LUERE ,  OLIVIER JOUBERT ,  PHILIP A. KRAUS ,  RAJINDER DHINDSA ,  JAMES ROGERS

IPC: H01J37/08 ,  H01J37/248 ,  H01J37/32

Abstract: Systems and methods for creating arbitrarily-shaped ion energy distribution functions using shaped-pulse-bias. In an embodiment, a method includes applying a positive jump voltage to an electrode of a process chamber to neutralize a wafer surface, applying a negative jump voltage to the electrode to set a wafer voltage, and modulating the amplitude of the wafer voltage to produce a predetermined number of pulses to determine an ion energy distribution function. In another embodiment a method includes applying a positive jump voltage to an electrode of a process chamber to neutralize a wafer surface, applying a negative jump voltage to the electrode to set a wafer voltage, and applying a ramp voltage to the electrode that overcompensates for ion current on the wafer or applying a ramp voltage to the electrode that undercompensates for ion current on the wafer.

公开(公告)号：US20170358431A1

公开(公告)日：2017-12-14

申请号：US15618082

申请日：2017-06-08

Applicant: APPLIED MATERIALS, INC.

Inventor： LEONID DORF ,  JAMES HUGH ROGERS ,  OLIVIER LUERE ,  TRAVIS KOH ,  RAJINDER DHINDSA ,  SUNIL SRINIVASAN

IPC: H01J37/32

CPC classification number: H01J37/32706 ,  H01J37/32146 ,  H01J37/32715 ,  H01J37/32935 ,  H01J37/3299 ,  H01J2237/334

Abstract: Systems and methods for controlling a voltage waveform at a substrate during plasma processing include applying a shaped pulse bias waveform to a substrate support, the substrate support including an electrostatic chuck, a chucking pole, a substrate support surface and an electrode separated from the substrate support surface by a layer of dielectric material. The systems and methods further include capturing a voltage representative of a voltage at a substrate positioned on the substrate support surface and iteratively adjusting the shaped pulse bias waveform based on the captured signal. In a plasma processing system a thickness and a composition of a layer of dielectric material separating the electrode and the substrate support surface can be selected such that a capacitance between the electrode and the substrate support surface is at least an order of magnitude greater than a capacitance between the substrate support surface and a plasma surface.

公开(公告)号：US20140370708A1

公开(公告)日：2014-12-18

申请号：US14301847

申请日：2014-06-11

Applicant: APPLIED MATERIALS, INC.

Inventor： BANQIU WU ,  AJAY KUMAR ,  LEONID DORF ,  SHAHID RAUF ,  KARTIK RAMASWAMY ,  OMKARAM NALAMASU

IPC: H01L21/308 ,  H01L21/3065

CPC classification number: H01L21/31138 ,  G03F7/00 ,  G03F7/0035 ,  G03F7/004 ,  H01J37/32091 ,  H01J37/3233 ,  H01J37/3266 ,  H01L21/0273

Abstract: Methods for reducing the line width roughness on a photoresist pattern are provided herein. In some embodiments, a method of processing a patterned photoresist layer disposed atop a substrate includes flowing a process gas into a processing volume of a process chamber having the substrate disposed therein; forming a plasma within the process chamber from the process gas, wherein the plasma has a ion energy of about 1 eV to about 10 eV; and etching the patterned photoresist layer with species from the plasma to at least one of smooth a line width roughness of a sidewall of the patterned photoresist layer or remove debris.

Abstract translation: 本文提供了减少光致抗蚀剂图案上的线宽粗糙度的方法。 在一些实施例中，处理设置在基板顶上的图案化光致抗蚀剂层的方法包括将工艺气体流入其中布置有衬底的处理室的处理容积; 在所述处理室内从所述处理气体形成等离子体，其中所述等离子体具有约1eV至约10eV的离子能; 以及将来自等离子体的物质的图案化光致抗蚀剂层蚀刻成图案化光致抗蚀剂层的侧壁的线宽粗糙度的至少一个或去除碎屑。

公开(公告)号：US20140020836A1

公开(公告)日：2014-01-23

申请号：US13666245

申请日：2012-11-01

Applicant: APPLIED MATERIALS, INC.

Inventor： ANDREW NGUYEN ,  KENNETH S. COLLINS ,  KARTIK RAMASWAMY ,  SHAHID RAUF ,  JAMES D. CARDUCCI ,  DOUGLAS A. BUCHBERGER, JR. ,  ANKUR AGARWAL ,  JASON A. KENNEY ,  LEONID DORF ,  AJIT BALAKRISHNA ,  RICHARD FOVELL

IPC: H05H1/46

CPC classification number: C23F1/08 ,  B01J12/002 ,  C23C14/28 ,  H01J37/321 ,  H01J37/3211 ,  H01J37/32733 ,  H01J37/32834 ,  H05H1/46

Abstract: A plasma reactor for processing a workplace includes a reactor chamber having a ceiling and a sidewali and a workplace support facing the ceiling and defining a processing region, and a pair of concentric independently excited RF coil antennas overlying the ceiling and a side RF coil concentric with the side wall and facing the side wall below the ceiling, and being excited independently.

Abstract translation: 用于处理工作场所的等离子体反应器包括具有天花板和侧瓦的反应室，以及面向天花板的工作台支架，并且限定了处理区域，以及一对重叠在天花板上的同心独立激发的RF线圈天线和与RF 侧壁并面向天花板下方的侧壁，并独立激发。