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公开(公告)号：US20240030095A1
公开(公告)日：2024-01-25
申请号：US18473775
申请日：2023-09-25
发明人： Mikael Andreas Tuominen , Seok Kim Tay , Johannes Stahr , Andreas Zluc , Timo Schwarz , Gerald Weidinger , Mario Schober
IPC分类号： H01L23/373 , H01L23/492 , H01L23/00 , H01L21/56
CPC分类号： H01L23/3737 , H01L23/492 , H01L24/20 , H01L24/19 , H01L21/56 , H01L2224/21 , H01L2224/2201 , H01L2224/19
摘要： An electronic package having a base structure; a layer stack formed over the base structure; and a component embedded at least partially within the base structure and/or within the layer stack. The layer stack has a decoupling layer structure, the decoupling layer structure with a decoupling material having a Young Modulus being smaller than 1 GPa.
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公开(公告)号：US09967972B2
公开(公告)日：2018-05-08
申请号：US15534897
申请日：2015-12-10
发明人： Andreas Zluc , Gerald Weidinger , Mario Schober , Hannes Stahr , Timo Schwarz , Benjamin Gruber
IPC分类号： H05K1/03 , H05K1/00 , B32B15/08 , H05K1/02 , H05K1/18 , H01L23/538 , H01L23/00 , H05K3/46 , H05K3/00 , H01L21/48 , H01L23/14 , H05K1/11
CPC分类号： H05K1/0271 , H01L21/481 , H01L21/4857 , H01L21/568 , H01L23/145 , H01L23/5383 , H01L23/5385 , H01L23/5387 , H01L23/5389 , H01L24/19 , H01L24/20 , H01L2224/2518 , H01L2224/32145 , H01L2224/73267 , H01L2224/9222 , H01L2924/0002 , H01L2924/18162 , H01L2924/19105 , H01L2924/3511 , H05K1/0353 , H05K1/0366 , H05K1/0373 , H05K1/0393 , H05K1/115 , H05K1/185 , H05K1/189 , H05K3/0017 , H05K3/0097 , H05K3/4602 , H05K2201/0129 , H05K2201/0133 , H05K2201/0187 , H05K2201/0191 , H05K2201/068 , H05K2201/09136 , H01L2924/00
摘要： A circuit board is described which includes a layer composite with at least one dielectric layer which includes a planar extension in parallel with respect to an xy-plane which is spanned by an x-axis and a y-axis perpendicular thereto, and which includes a layer thickness along a z-axis which is perpendicular with respect to the x-axis and to the y-axis; and at least one metallic layer which is attached to the dielectric layer in a planar manner. The layer composite along the z-axis is free from a symmetry plane which is oriented in parallel with respect to the xy-plane, and the dielectric layer includes a dielectric material which has an elastic modulus E in a range between 1 and 20 GPa and along the x-axis and along the y-axis a coefficient of thermal expansion in a range between 0 and 17 ppm/K. A method of manufacturing such a circuit board is also described. Further, a method of manufacturing a circuit board structure comprising two asymmetric circuit boards and a method of manufacturing two processed asymmetric circuit boards from a larger circuit board structure is described.
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公开(公告)号：US09418930B2
公开(公告)日：2016-08-16
申请号：US14897217
申请日：2014-05-06
发明人： Johannes Stahr , Andreas Zluc , Gernot Grober , Timo Schwarz
IPC分类号： H01L23/36 , H01L23/498 , H01L23/373 , H01L23/31 , H01L23/367 , H01L23/538
CPC分类号： H01L23/49838 , H01L23/3121 , H01L23/36 , H01L23/367 , H01L23/3735 , H01L23/49833 , H01L23/5385 , H01L23/5389 , H01L24/19 , H01L24/24 , H01L24/82 , H01L2224/04105 , H01L2224/06181 , H01L2224/18 , H01L2224/24137 , H01L2224/32245 , H01L2224/73267 , H01L2224/82005 , H01L2224/92244 , H01L2924/0002 , H01L2924/00
摘要： A power module, having a printed circuit board core, which contains at least one electronic power component embedded in an insulating layer, the core being arranged between two heat dissipation plates, wherein each heat dissipation plate has a metal outer layer and a metal inner layer electrically separated from said metal outer layer by a thermally conductive, electrically insulating intermediate layer, and electrode terminals of the at least one power component are guided out from the core via terminal lines, wherein the printed circuit board core on both sides of the insulating layer has a conductor layer, at least one conductor layer is structured at least in portions, and each conductor layer is connected at least in portions via a conductive, metal intermediate layer to a metal inner layer of the heat dissipation plate, contacts run from the structured conductor layer to the electrode terminals of the at least one power component, and at least one power terminal of the at least one power component is connected via a contact, a portion of a structured conductor layer, and the conductive, metal intermediate layer to at least one portion of the metal inner layer of the heat dissipation plate, which forms part of the terminal line to the electrode terminal.
摘要翻译： 一种具有印刷电路板芯的功率模块，其包含嵌入绝缘层中的至少一个电子功率部件，所述芯布置在两个散热板之间，其中每个散热板具有金属外层和金属内层 通过导热的电绝缘中间层与所述金属外层电隔离，并且至少一个功率部件的电极端子经由端子线从芯引出，其中绝缘层两侧的印刷电路板芯 具有导体层，至少一个导体层至少部分地构成，并且每个导体层至少部分地通过导电的金属中间层连接到散热板的金属内层，从结构化 导体层至少一个功率部件的电极端子，以及至少一个功率部件的至少一个电源端子 通过接触，结构化导体层的一部分和导电的金属中间层将热功率元件连接到散热板的金属内层的至少一部分，其形成端子线的一部分到电极 终奌站。
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公开(公告)号：US12075561B2
公开(公告)日：2024-08-27
申请号：US17453029
申请日：2021-11-01
发明人： Timo Schwarz , Andreas Zluc , Mario Schober
CPC分类号： H05K1/0271 , H01L23/5389 , H05K1/0203 , H05K1/0216 , H05K1/028 , H05K1/185 , H05K3/007 , H05K3/30 , H05K3/301 , H05K3/4611 , H05K3/4652 , H05K2201/068 , H05K2203/1469
摘要： A method of manufacturing a component carrier includes providing a base structure having a main surface that is at least partially covered by a component fixation structure; providing a component, the component intrinsically comprising warpage; mounting the component on a surface provided on a plate structure and/or on the base structure to remove the warpage of the component at least partially; and fixating the component to the component carrier through the component fixation structure.
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公开(公告)号：US10863631B2
公开(公告)日：2020-12-08
申请号：US16294673
申请日：2019-03-06
发明人： Johannes Stahr , Timo Schwarz , Mario Schober
IPC分类号： H05K1/18 , H05K3/00 , H05K3/46 , H01L23/522 , H01L23/528 , H01L23/532 , H01L23/00 , H05K1/02 , H05K1/11 , H05K3/40 , H01L21/56
摘要： A manufacturing method, wherein the method includes providing a layer stack having at least partially uncured component carrier material, arranging a plurality of components in recesses of the layer stack, integrally connecting the components with the layer stack by curing the component carrier material, and applying a high temperature robust dielectric structure on a main surface of the cured layer stack with the components therein.
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公开(公告)号：US10779413B2
公开(公告)日：2020-09-15
申请号：US15103826
申请日：2014-12-12
发明人： Timo Schwarz , Andreas Zluc , Gregor Langer , Johannes Stahr
摘要： A method for embedding a component in a printed circuit board or a printed circuit board intermediate product, wherein the printed circuit board or the printed circuit board intermediate product comprises at least one insulating layer made of a prepreg material, and the component is fixed by the resin of the prepreg material, is characterized by the following steps: providing a combination of the layers of the printed circuit board, or of the printed circuit board intermediate product, wherein this combination includes at least one curable prepreg material; creating a clearance in the combination for accommodating the component to be embedded; covering at least the region of the clearance with a first temporary carrier layer on a first side of the combination; positioning the component to be embedded in the clearance by way of the first temporary carrier layer; covering at least the region of the clearance on the second side of the combination with a second temporary carrier layer; compressing the combination with the component, curing the curable prepreg material; and removing the temporary carrier layers.
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公开(公告)号：US20200323081A1
公开(公告)日：2020-10-08
申请号：US16908500
申请日：2020-06-22
发明人： Timo Schwarz , Andreas Zluc , Gregor Langer , Johannes Stahr
摘要： A method for embedding a component in a printed circuit board or a printed circuit board intermediate product, wherein the printed circuit board or the printed circuit board intermediate product comprises at least one insulating layer made of a prepreg material, and the component is fixed by the resin of the prepreg material, is characterized by the following steps: providing a combination of the layers of the printed circuit board, or of the printed circuit board intermediate product, wherein this combination includes at least one curable prepreg material; creating a clearance in the combination for accommodating the component to be embedded; covering at least the region of the clearance with a first temporary carrier layer on a first side of the combination; positioning the component to be embedded in the clearance by way of the first temporary carrier layer; covering at least the region of the clearance on the second side of the combination with a second temporary carrier layer; compressing the combination with the component, curing the curable prepreg material; and removing the temporary carrier layers.
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8.发明申请公开(公告)号：US20190281706A1
公开(公告)日：2019-09-12
申请号：US16294673
申请日：2019-03-06
发明人： Johannes Stahr , Timo Schwarz , Mario Schober
IPC分类号： H05K3/46 , H01L23/00 , H01L23/532 , H01L23/522 , H01L23/528 , H05K1/18 , H05K1/11 , H05K3/40 , H05K1/02
摘要： A manufacturing method, wherein the method includes providing a layer stack having at least partially uncured component carrier material, arranging a plurality of components in recesses of the layer stack, integrally connecting the components with the layer stack by curing the component carrier material, and applying a high temperature robust dielectric structure on a main surface of the cured layer stack with the components therein.
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公开(公告)号：US20170339784A1
公开(公告)日：2017-11-23
申请号：US15534897
申请日：2015-12-10
发明人： Andreas Zluc , Gerald Weidinger , Mario Schober , Hannes Stahr , Timo Schwarz , Benjamin Gruber
IPC分类号： H05K1/02 , H01L21/48 , H01L23/14 , H01L23/00 , H05K3/46 , H05K3/00 , H05K1/18 , H05K1/03 , H05K1/11 , H01L23/538
CPC分类号： H05K1/0271 , H01L21/481 , H01L21/4857 , H01L21/568 , H01L23/145 , H01L23/5383 , H01L23/5385 , H01L23/5387 , H01L23/5389 , H01L24/19 , H01L24/20 , H01L2224/2518 , H01L2224/32145 , H01L2224/73267 , H01L2224/9222 , H01L2924/0002 , H01L2924/18162 , H01L2924/19105 , H01L2924/3511 , H05K1/0353 , H05K1/0366 , H05K1/0373 , H05K1/0393 , H05K1/115 , H05K1/185 , H05K1/189 , H05K3/0017 , H05K3/0097 , H05K3/4602 , H05K2201/0129 , H05K2201/0133 , H05K2201/0187 , H05K2201/0191 , H05K2201/068 , H05K2201/09136 , H01L2924/00
摘要： A circuit board is described which includes a layer composite with at least one dielectric layer which includes a planar extension in parallel with respect to an xy-plane which is spanned by an x-axis and a y-axis perpendicular thereto, and which includes a layer thickness along a z-axis which is perpendicular with respect to the x-axis and to the y-axis; and at least one metallic layer which is attached to the dielectric layer in a planar manner. The layer composite along the z-axis is free from a symmetry plane which is oriented in parallel with respect to the xy-plane, and the dielectric layer includes a dielectric material which has an elastic modulus E in a range between 1 and 20 GPa and along the x-axis and along the y-axis a coefficient of thermal expansion in a range between 0 and 17 ppm/K. A method of manufacturing such a circuit board is also described. Further, a method of manufacturing a circuit board structure comprising two asymmetric circuit boards and a method of manufacturing two processed asymmetric circuit boards from a larger circuit board structure is described.
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公开(公告)号：US20170339783A1
公开(公告)日：2017-11-23
申请号：US15534172
申请日：2015-12-10
发明人： Hannes Stahr , Andreas Zluc , Timo Schwarz , Gerald Weidinger
IPC分类号： H05K1/02 , H01L21/48 , H01L23/14 , H01L23/00 , H05K3/46 , H05K3/00 , H05K1/18 , H05K1/03 , H05K1/11 , H01L23/538
CPC分类号： H05K1/0271 , H01L21/481 , H01L21/4857 , H01L21/568 , H01L23/145 , H01L23/5383 , H01L23/5385 , H01L23/5387 , H01L23/5389 , H01L23/562 , H01L24/19 , H01L24/20 , H01L2224/32145 , H01L2224/73267 , H01L2924/0002 , H01L2924/18162 , H01L2924/19105 , H01L2924/3511 , H05K1/0353 , H05K1/0366 , H05K1/0373 , H05K1/0393 , H05K1/115 , H05K1/185 , H05K1/189 , H05K3/0017 , H05K3/0097 , H05K3/4602 , H05K2201/0129 , H05K2201/0133 , H05K2201/0187 , H05K2201/0191 , H05K2201/068 , H05K2201/09136 , H01L2924/00
摘要： A circuit board and a method of manufacturing a circuit board or two circuit boards are illustrated and described. The circuit board includes (a) a dielectric layer with a planar extension in parallel with respect to an xy-plane which is spanned by an x-axis and a y-axis perpendicular thereto and a layer thickness along a z-direction which is perpendicular with respect to the x-axis and to the y-axis; (b) a metallic layer which is attached to the dielectric layer in a planar manner; and (c) a component which is embedded in the dielectric layer and/or in a dielectric core-layer of the circuit board. The dielectric layer includes a dielectric material which has (i) an elastic modulus E in a range between 1 and 20 GPa and (ii) a coefficient of thermal expansion in a range between 0 and 17 ppm/K along the x-axis and along the y-axis.
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