公开(公告)号：US06805744B2

公开(公告)日：2004-10-19

申请号：US10023047

申请日：2001-12-13

申请人： Andrew Y. Kim ,  Eugene A. Fitzgerald

发明人： Andrew Y. Kim ,  Eugene A. Fitzgerald

IPC分类号： C30B2506

CPC分类号： H01L21/02392 ,  C30B25/02 ,  C30B29/40 ,  H01L21/02395 ,  H01L21/02461 ,  H01L21/02505 ,  H01L21/0251 ,  H01L21/02543 ,  H01L21/02576 ,  H01L21/0262 ,  H01L31/1844 ,  H01L33/0062 ,  H01L33/0066 ,  H01L33/30 ,  Y02E10/544

摘要： A method of forming a semiconductor structure including providing a single crystal semiconductor substrate of GaP, and fabricating a graded composition buffer including a plurality of epitaxial semiconductor Inx(AlyGa1−y)1−xP alloy layers. The buffer includes a first alloy layer immediately contacting the substrate having a lattice constant that is nearly identical to that of the substrate, subsequent alloy layers having lattice constants that differ from adjacent layers by less than 1%, and a final alloy layer having a lattice constant that is substantially different from the substrate. The growth temperature of the final alloy layer is at least 20° C. less than the growth temperature of the first alloy layer.

摘要翻译： 一种形成半导体结构的方法，包括提供GaP的单晶半导体衬底，以及制造包括多个外延半导体In x（Al y Ga 1-y）1-xP合金层的渐变组合物缓冲层。 缓冲器包括立即接触基板的第一合金层，其具有与基板的晶格常数几乎相同的晶格常数，随后的合金层具有不同于相邻层的晶格常数小于1％，以及具有晶格的最终合金层 基本上不同于基底的常数。 最终合金层的生长温度比第一合金层的生长温度低至少20℃。

公开(公告)号：US20140166066A1

公开(公告)日：2014-06-19

申请号：US14096513

申请日：2013-12-04

申请人： John J. Hennessy ,  Andrew C. Malonis ,  Arthur J. Pitera ,  Eugene A. Fitzgerald ,  Steven A. Ringel

发明人： John J. Hennessy ,  Andrew C. Malonis ,  Arthur J. Pitera ,  Eugene A. Fitzgerald ,  Steven A. Ringel

IPC分类号： H01L31/05

CPC分类号： H01L31/05 ,  H01L27/1421 ,  H01L31/02021 ,  H01L31/06875 ,  Y02E10/544 ,  Y02P70/521

摘要： In various embodiments, an array of discrete solar cells with associated devices such as bypass diodes is formed over a single substrate.

摘要翻译： 在各种实施例中，在单个衬底上形成具有诸如旁路二极管的相关器件的分立太阳能电池阵列。

公开(公告)号：US08604330B1

公开(公告)日：2013-12-10

申请号：US13310856

申请日：2011-12-05

申请人： John J. Hennessy ,  Andrew C. Malonis ,  Arthur J. Pitera ,  Eugene A. Fitzgerald ,  Steven A. Ringel

发明人： John J. Hennessy ,  Andrew C. Malonis ,  Arthur J. Pitera ,  Eugene A. Fitzgerald ,  Steven A. Ringel

IPC分类号： H01L35/34 ,  H01L21/00

CPC分类号： H01L31/05 ,  H01L27/1421 ,  H01L31/02021 ,  H01L31/06875 ,  Y02E10/544 ,  Y02P70/521

摘要： In various embodiments, an array of discrete solar cells with associated devices such as bypass diodes is formed over a single substrate. In one instance, a method of forming a solar-cell array with integrated bypass diodes comprising: providing a semiconductor substrate, a first cell comprising a SiGe p-n junction or SiGe p-i-n junction, one or more second cells each comprising a III-V semiconductor p-n junction or III-V semiconductor p-i-n junction; forming a bypass diode that is discrete and laterally separate from its associated solar cell and comprises an unremoved portion of the first cell, the formation comprising removing an unremoved portion of the one or more second cells thereover.

摘要翻译： 在各种实施例中，在单个衬底上形成具有诸如旁路二极管的相关器件的分立太阳能电池阵列。 在一个实例中，一种形成具有集成旁路二极管的太阳能电池阵列的方法，包括：提供半导体衬底，包含SiGe pn结或SiGe pin结的第一单元，每个包含III-V半导体pn的一个或多个第二单元 结或III-V半导体针结; 形成与其相关联的太阳能电池离散且横向分离的旁路二极管，并且包括第一电池的未移动部分，该组件包括从其中去除一个或多个第二电池的未移动部分。

公开(公告)号：US08436336B2

公开(公告)日：2013-05-07

申请号：US11877186

申请日：2007-10-23

申请人： Minjoo L. Lee ,  Christopher W. Leitz ,  Eugene A. Fitzgerald

发明人： Minjoo L. Lee ,  Christopher W. Leitz ,  Eugene A. Fitzgerald

IPC分类号： H01L29/06

CPC分类号： H01L29/78696 ,  H01L29/1054 ,  H01L29/78684

摘要： The invention provides semiconductor structure comprising a strained Ge channel layer, and a gate dielectric disposed over the strained Ge channel layer. In one aspect of the invention, a strained Ge channel MOSFET is provided. The strained Ge channel MOSFET includes a relaxed SiGe virtual substrate with a Ge content between 50-95%, and a strained Ge channel formed on the virtual substrate. A gate structure is formed upon the strained Ge channel, whereupon a MOSFET is formed with increased performance over bulk Si. In another embodiment of the invention, a semiconductor structure comprising a relaxed Ge channel layer and a virtual substrate, wherein the relaxed Ge channel layer is disposed above the virtual substrate. In a further aspect of the invention, a relaxed Ge channel MOSFET is provided. The method includes providing a relaxed virtual substrate with a Ge composition of approximately 100% and a relaxed Ge channel formed on the virtual substrate.

摘要翻译： 本发明提供包括应变Ge沟道层的半导体结构和设置在应变Ge沟道层上的栅极电介质。 在本发明的一个方面，提供了应变的Ge沟道MOSFET。 应变Ge沟道MOSFET包括Ge含量在50-95％之间的弛豫SiGe虚拟衬底和形成在虚拟衬底上的应变Ge沟道。 在应变Ge通道上形成栅极结构，于是形成具有在体积Si上增加的性能的MOSFET。 在本发明的另一实施例中，包括松弛的Ge沟道层和虚拟衬底的半导体结构，其中放宽的Ge沟道层设置在虚拟衬底之上。 在本发明的另一方面，提供了一种放宽的Ge沟道MOSFET。 该方法包括提供具有约100％的Ge组成的松弛虚拟衬底和形成在虚拟衬底上的松弛Ge沟道。

公开(公告)号：US20110132445A1

公开(公告)日：2011-06-09

申请号：US12790089

申请日：2010-05-28

申请人： Arthur J. Pitera ,  Eugene A. Fitzgerald ,  Steven A. Ringel

发明人： Arthur J. Pitera ,  Eugene A. Fitzgerald ,  Steven A. Ringel

IPC分类号： H01L31/0352

CPC分类号： H01L31/0687 ,  H01L31/0693 ,  H01L31/0725 ,  H01L31/0735 ,  H01L31/0745 ,  H01L31/076 ,  H01L31/1804 ,  H01L31/1812 ,  H01L31/1852 ,  Y02E10/544 ,  Y02E10/547 ,  Y02E10/548 ,  Y02P70/521

摘要： In various embodiments, solar cells include a junction including SiGe, a junction including at least one III-V material, and may be formed on silicon substrates and/or with silicon-based capping layers thereover.

摘要翻译： 在各种实施例中，太阳能电池包括包括SiGe的结，包括至少一种III-V材料的结，并且可以形成在硅衬底和/或其上的硅基覆盖层上。

公开(公告)号：US20100206216A1

公开(公告)日：2010-08-19

申请号：US12711560

申请日：2010-02-24

申请人： Eugene A. Fitzgerald ,  Richard Westhoff ,  Matthew T. Currie ,  Christopher J. Vineis ,  Thomas A. Langdo

发明人： Eugene A. Fitzgerald ,  Richard Westhoff ,  Matthew T. Currie ,  Christopher J. Vineis ,  Thomas A. Langdo

IPC分类号： C30B25/00

CPC分类号： C30B29/52 ,  C23C16/029 ,  C23C16/22 ,  C23C16/4401 ,  C30B25/02 ,  H01L21/0245 ,  H01L21/0251 ,  H01L21/02532 ,  H01L21/0262

摘要： A method for minimizing particle generation during deposition of a graded Si.sub.1-xGe.sub.x layer on a semiconductor material includes providing a substrate in an atmosphere including a Si precursor and a Ge precursor, wherein the Ge precursor has a decomposition temperature greater than germane, and depositing the graded Si.sub.1-xGe.sub.x layer having a final Ge content of greater than about 0.15 and a particle density of less than about 0.3 particles/cm.sup.2 on the substrate.

摘要翻译： 在半导体材料上沉积梯度Si 1-x Ge x层的过程中使颗粒产生最小化的方法包括在包括Si前体和Ge前体的气氛中提供衬底，其中Ge前体具有分解 温度大于锗烷，并沉积具有大于约0.15的最终Ge含量并且小于约0.3颗粒/ cm 2的颗粒密度的梯度Si 1-x Ge 2层在衬底上 。

公开(公告)号：US07776697B2

公开(公告)日：2010-08-17

申请号：US11847721

申请日：2007-08-30

申请人： Matthew T. Currie ,  Anthony J. Lochtefeld ,  Richard Hammond ,  Eugene A. Fitzgerald

发明人： Matthew T. Currie ,  Anthony J. Lochtefeld ,  Richard Hammond ,  Eugene A. Fitzgerald

IPC分类号： H01L21/00

CPC分类号： H01L29/1054 ,  H01L29/105 ,  H01L29/161 ,  H01L29/36 ,  H01L29/66477 ,  H01L29/66545 ,  H01L29/66651 ,  H01L29/78 ,  H01L29/7842 ,  Y10S438/926

摘要： Semiconductor structures and devices including strained material layers having impurity-free zones, and methods for fabricating same. Certain regions of the strained material layers are kept free of impurities that can interdiffuse from adjacent portions of the semiconductor. When impurities are present in certain regions of the strained material layers, there is degradation in device performance. By employing semiconductor structures and devices (e.g., field effect transistors or “FETs”) that have the features described, or are fabricated in accordance with the steps described, device operation is enhanced.

公开(公告)号：US20100116942A1

公开(公告)日：2010-05-13

申请号：US12474798

申请日：2009-05-29

申请人： Eugene A. Fitzgerald ,  Arthur J. Pitera ,  Steven A. Ringel

发明人： Eugene A. Fitzgerald ,  Arthur J. Pitera ,  Steven A. Ringel

IPC分类号： B64G1/44 ,  H01L31/00

CPC分类号： H01L31/184 ,  H01L31/02008 ,  H01L31/02167 ,  H01L31/0304 ,  H01L31/0336 ,  H01L31/0735 ,  H01L31/075 ,  H01L31/076 ,  Y02E10/544 ,  Y02E10/548

摘要： Solar cells include a substrate consisting essentially of silicon, a first junction disposed over the substrate, the first junction comprising at least one III-V material and having a threading dislocation density of less than approximately 107 cm−2, and a cap layer disposed over the first junction, the cap layer comprising silicon.

摘要翻译： 太阳能电池包括基本上由硅组成的衬底，设置在衬底上的第一结，第一结包括至少一种III-V材料，并且具有小于约107cm -2的穿透位错密度，以及覆盖层 第一结，盖层包括硅。

公开(公告)号：US20090242935A1

公开(公告)日：2009-10-01

申请号：US11591658

申请日：2006-11-01

申请人： Eugene A. Fitzgerald

发明人： Eugene A. Fitzgerald

IPC分类号： H01L31/0336 ,  H01L31/00

CPC分类号： H01L27/14601 ,  H01L21/0245 ,  H01L21/0251 ,  H01L21/76254 ,  H01L21/8258 ,  H01L27/0605 ,  H01L27/144 ,  H01L27/1446 ,  H01L27/14683 ,  H01L27/15 ,  H01L27/156 ,  H01L31/0328 ,  H01L31/143 ,  H01L31/162 ,  H01L2924/0002 ,  Y10S438/933 ,  H01L2924/00

摘要： Methods and structures for monolithically integrating monocrystalline silicon and monocrystalline non-silicon materials and devices are provided. In one structure, a monolithically integrated semiconductor device structure comprises a silicon substrate and a first monocrystalline semiconductor layer disposed over the silicon substrate, wherein the first monocrystalline semiconductor layer has a lattice constant different from a lattice constant of relaxed silicon. The structure further includes an insulating layer disposed over the first monocrystalline semiconductor layer in a first region and a monocrystalline silicon layer disposed over the insulating layer in the first region. The structure includes at least one silicon-based photodetector comprising an active region including at least a portion of the monocrystalline silicon layer. The structure also includes a second monocrystalline semiconductor layer disposed over at least a portion of the first monocrystalline semiconductor layer in a second region and absent from the first region, wherein the second monocrystalline semiconductor layer has a lattice constant different from the lattice constant of relaxed silicon. The structure includes at least one non-silicon photodetector comprising an active region including at least a portion of the second monocrystalline semiconductor layer.

摘要翻译： 提供了单晶硅和单晶非硅材料和器件单片集成的方法和结构。 在一种结构中，单片集成半导体器件结构包括硅衬底和设置在硅衬底上的第一单晶半导体层，其中第一单晶半导体层具有与松弛硅的晶格常数不同的晶格常数。 该结构还包括设置在第一区域中的第一单晶半导体层上的绝缘层和设置在第一区域中的绝缘层上的单晶硅层。 该结构包括至少一个硅基光电检测器，其包括至少部分单晶硅层的有源区。 该结构还包括第二单晶半导体层，其设置在第二区域中的第一单晶半导体层的至少一部分上且不存在于第一区域中，其中第二单晶半导体层具有与松弛硅的晶格常数不同的晶格常数 。 该结构包括至少一个非硅光电检测器，其包括包括第二单晶半导体层的至少一部分的有源区。

公开(公告)号：US07535089B2

公开(公告)日：2009-05-19

申请号：US11591657

申请日：2006-11-01

申请人： Eugene A. Fitzgerald

发明人： Eugene A. Fitzgerald

IPC分类号： H01L23/06

CPC分类号： H01L27/14601 ,  H01L21/0245 ,  H01L21/0251 ,  H01L21/76254 ,  H01L21/8258 ,  H01L27/0605 ,  H01L27/144 ,  H01L27/1446 ,  H01L27/14683 ,  H01L27/15 ,  H01L27/156 ,  H01L31/0328 ,  H01L31/143 ,  H01L31/162 ,  H01L2924/0002 ,  Y10S438/933 ,  H01L2924/00

摘要： Methods and structures for monolithically integrating monocrystalline silicon and monocrystalline non-silicon materials and devices are provided. In one structure, a monolithically integrated semiconductor device structure comprises a silicon substrate and a first monocrystalline semiconductor layer disposed over the silicon substrate, wherein the first monocrystalline semiconductor layer has a lattice constant different from a lattice constant of relaxed silicon. The structure further includes an insulating layer disposed over the first monocrystalline semiconductor layer in a first region and a monocrystalline silicon layer disposed over the insulating layer in the first region. The structure includes at least one silicon-based electronic device including an element including at least a portion of the monocrystalline silicon layer. The structure also includes a second monocrystalline semiconductor layer disposed over at least a portion of the first monocrystalline semiconductor layer in a second region and absent from the first region, wherein the second monocrystalline semiconductor layer has a lattice constant different from the lattice constant of relaxed silicon. The structure includes at least one III-V light-emitting device including an active region including at least a portion of the second monocrystalline semiconductor layer.

摘要翻译： 提供了单晶硅和单晶非硅材料和器件单片集成的方法和结构。 在一种结构中，单片集成半导体器件结构包括硅衬底和设置在硅衬底上的第一单晶半导体层，其中第一单晶半导体层具有与松弛硅的晶格常数不同的晶格常数。 该结构还包括设置在第一区域中的第一单晶半导体层上的绝缘层和设置在第一区域中的绝缘层上的单晶硅层。 该结构包括至少一个硅基电子器件，其包括至少部分单晶硅层的元件。 该结构还包括第二单晶半导体层，其设置在第二区域中的第一单晶半导体层的至少一部分上且不存在于第一区域中，其中第二单晶半导体层具有与松弛硅的晶格常数不同的晶格常数 。 该结构包括至少一个III-V发光器件，其包括包括第二单晶半导体层的至少一部分的有源区。