中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

25 records (took 0.016 seconds)

    Dynamic Interface Circuit to Reduce Power Consumption
    1.
    发明公开
    Dynamic Interface Circuit to Reduce Power Consumption 审中-公开

    公开(公告)号：US20240085968A1

    公开(公告)日：2024-03-14

    申请号：US18175900

    申请日：2023-02-28

    Applicant: Apple Inc.

    Inventor： Tzach Zemer ,  Lior Zimet ,  Sagi Lahav

    IPC: G06F1/3206 ,  G06F1/08 ,  G06F1/3234 ,  H04W52/02

    CPC classification number: G06F1/3206 ,  G06F1/08 ,  G06F1/3234 ,  H04W52/02

    Abstract: A system for a given device may include a plurality of systems on a chip (SOCs). Each SOC may include an interface circuit and a bridge circuit for communicating with other SOCs. The interface circuit of an SOC may include a plurality of communication devices to transfer data packets from/to the SOC to the other SOCs. The bridge circuit may provide various control functions for the interface circuit. An indication may be generated when the system enters an idle mode. In response, the bridge circuit may generate signal(s) to cause some of the communication devices of the interface circuit into a low power state. The interface circuit may obtain the signal(s) and accordingly transition some of the communication devices to the low power state.

    Transaction generator for on-chip interconnect fabric
    3.
    发明授权
    Transaction generator for on-chip interconnect fabric 有权

    公开(公告)号：US11669480B2

    公开(公告)日：2023-06-06

    申请号：US17320169

    申请日：2021-05-13

    Applicant: Apple Inc.

    Inventor： Igor Tolchinsky ,  Charles J. Fleckenstein ,  Sagi Lahav ,  Lital Levy-Rubin

    IPC: G06F13/40 ,  G06F13/42

    CPC classification number: G06F13/4068 ,  G06F13/4027 ,  G06F13/4282 ,  G06F2213/0038 ,  G06F2213/0042

    Abstract: In an embodiment, an SOC includes a global communication fabric that includes multiple independent networks having different communication and coherency protocols, and a plurality of input-output (I/O) clusters that includes different sets of local functional circuits. A given I/O cluster may be coupled to one or more of the independent networks and may include a particular set of local functional circuits, a local fabric coupled to the particular set of local functional circuits, and an interface circuit coupled to the local fabric and configured to bridge transactions between the particular set of local functional circuits and the global communication fabric. The interface circuit may include a programmable hardware transaction generator circuit configured to generate a set of test transactions that simulate interactions between the particular set of local functional circuits and a particular one of the one or more independent networks.

    Ensuring Transactional Ordering in I/O Agent
    4.
    发明申请
    Ensuring Transactional Ordering in I/O Agent 有权

    公开(公告)号：US20230064526A1

    公开(公告)日：2023-03-02

    申请号：US17657506

    申请日：2022-03-31

    Applicant: Apple Inc.

    Inventor： Sagi Lahav ,  Lital Levy - Rubin ,  Gaurav Garg ,  Gerard R. Williams, III ,  Samer Nassar ,  Per H. Hammarlund ,  Harshavardhan Kaushikkar ,  Srinivasa Rangan Sridharan ,  Jeff Gonion

    IPC: G06F9/46 ,  G06F13/16

    Abstract: Techniques are disclosed relating to an I/O agent circuit. The I/O agent circuit may include one or more queues and a transaction pipeline. The I/O agent circuit may issue, to the transaction pipeline from a queue of the one or more queues, a transaction of a series of transactions enqueued in a particular order. The I/O agent circuit may generate, at the transaction pipeline, a determination to return the transaction to the queue based on a detection of one or more conditions being satisfied. Based on the determination, the I/O agent circuit may reject, at the transaction pipeline, up to a threshold number of transactions that issued from the queue after the transaction issued. The I/O agent circuit may insert the transaction at a head of the queue such that the transaction is enqueued at the queue sequentially first for the series of transactions according to the particular order.

    Communication Fabric Structures for Increased Bandwidth
    5.
    发明申请
    Communication Fabric Structures for Increased Bandwidth 有权

    公开(公告)号：US20250097166A1

    公开(公告)日：2025-03-20

    申请号：US18433184

    申请日：2024-02-05

    Applicant: Apple Inc.

    Inventor： Sergio Kolor ,  Dan Darel ,  Lior Zimet ,  Lital Levy-Rubin ,  Opher Kahn ,  Roi Uziel ,  Sagi Lahav ,  Shawn M. Fukami ,  Tzach Zemer

    IPC: H04L49/25 ,  H04L49/00

    Abstract: An apparatus includes first agents configured to transfer transactions using an ordered protocol, as well as second agents configured to transfer transactions using a protocol with no enforced ordering. The apparatus may also include input/output (I/O) interfaces coupled to respective ones of the first agents and configured to enforce the ordered protocol. The apparatus may further include a communication network including a plurality of network switches. A particular one of the network switches may be coupled to at least one other network switch of the plurality. The apparatus may also include a network interface coupled to the second agents, to the I/O interfaces, and to the particular network switch. This network interface may be configured to transfer data transactions between the second agents and the particular network switch, and to transfer data transactions between the I/O interfaces and the particular network switch.

    Transaction Generator for On-chip Interconnect Fabric
    7.
    发明公开
    Transaction Generator for On-chip Interconnect Fabric 审中-公开

    公开(公告)号：US20230334003A1

    公开(公告)日：2023-10-19

    申请号：US18306087

    申请日：2023-04-24

    Applicant: Apple Inc.

    Inventor： Igor Tolchinsky ,  Charles J. Fleckenstein ,  Sagi Lahav ,  Lital Levy-Rubin

    IPC: G06F13/40 ,  G06F13/42

    CPC classification number: G06F13/4068 ,  G06F13/4282 ,  G06F13/4027 ,  G06F2213/0038 ,  G06F2213/0042

    Abstract: In an embodiment, an SOC includes a global communication fabric that includes multiple independent networks having different communication and coherency protocols, and a plurality of input-output (I/O) clusters that includes different sets of local functional circuits. A given I/O cluster may be coupled to one or more of the independent networks and may include a particular set of local functional circuits, a local fabric coupled to the particular set of local functional circuits, and an interface circuit coupled to the local fabric and configured to bridge transactions between the particular set of local functional circuits and the global communication fabric. The interface circuit may include a programmable hardware transaction generator circuit configured to generate a set of test transactions that simulate interactions between the particular set of local functional circuits and a particular one of the one or more independent networks.

    Power consumption control based on random bus inversion
    8.
    发明公开
    Power consumption control based on random bus inversion 审中-公开

    公开(公告)号：US20230281154A1

    公开(公告)日：2023-09-07

    申请号：US17683396

    申请日：2022-03-01

    Applicant: Apple Inc.

    Inventor： Doron Rajwan ,  Lior Zimet ,  Sagi Lahav

    IPC: G06F15/78 ,  G06F13/40

    CPC classification number: G06F15/7807 ,  G06F13/4013

    Abstract: An electronic device includes circuitry and a plurality of ports. The plurality of ports includes an input port and an output port, configured to communicate data units with one or more other devices across a fabric of a System on a Chip (SoC), the data units include N data bits, N being an integer larger than 1. The circuitry is configured to receive an input data unit via the input port, to make a random decision of whether to invert the N data bits in the input data unit, to produce an output data unit by retaining or inverting the N data bits of the input data unit based on the random decision, and to send the output data unit via the output port.

    Transaction Generator for On-chip Interconnect Fabric
    9.
    发明申请
    Transaction Generator for On-chip Interconnect Fabric 有权

    公开(公告)号：US20220365896A1

    公开(公告)日：2022-11-17

    申请号：US17320169

    申请日：2021-05-13

    Applicant: Apple Inc.

    Inventor： Igor Tolchinsky ,  Charles J. Fleckenstein ,  Sagi Lahav ,  Lital Levy-Rubin

    IPC: G06F13/40 ,  G06F13/42

    Abstract: In an embodiment, an SOC includes a global communication fabric that includes multiple independent networks having different communication and coherency protocols, and a plurality of input-output (I/O) clusters that includes different sets of local functional circuits. A given I/O cluster may be coupled to one or more of the independent networks and may include a particular set of local functional circuits, a local fabric coupled to the particular set of local functional circuits, and an interface circuit coupled to the local fabric and configured to bridge transactions between the particular set of local functional circuits and the global communication fabric. The interface circuit may include a programmable hardware transaction generator circuit configured to generate a set of test transactions that simulate interactions between the particular set of local functional circuits and a particular one of the one or more independent networks.

Patent Agency Ranking