公开(公告)号：US11908662B2

公开(公告)日：2024-02-20

申请号：US16663215

申请日：2019-10-24

Applicant: Applied Materials, Inc.

Inventor： Xiaopu Li ,  Kallol Bera ,  Edward P. Hammond, IV ,  Jonghoon Baek ,  Amit Kumar Bansal ,  Jun Ma ,  Satoru Kobayashi

IPC: H01L21/306 ,  C23C16/00 ,  H01J37/32 ,  C23C16/505

CPC classification number: H01J37/32467 ,  C23C16/505 ,  H01J37/32091 ,  H01J37/32174 ,  H01J37/32715 ,  H01J2237/24564 ,  H01J2237/3321

Abstract: Embodiments described herein relate to apparatus and techniques for radio frequency (RF) phase control in a process chamber. A process volume is defined in the process chamber by a faceplate electrode and a support pedestal. A grounding bowl is disposed within the process chamber about the support pedestal opposite the process volume. The grounding bowl substantially fills a volume other than the process volume below the support pedestal. A phase tuner circuit is coupled to an RF mesh disposed in the support pedestal and the faceplate electrode. The tuner circuit adjusts a phase difference between a phase of the faceplate electrode and a phase of the RF mesh.

公开(公告)号：US12009185B2

公开(公告)日：2024-06-11

申请号：US16269376

申请日：2019-02-06

Applicant: Applied Materials, Inc.

Inventor： Jun Ma ,  Chen-An Chen

IPC: H01L21/67 ,  C23C16/458 ,  H01J37/32 ,  H01L21/687

CPC classification number: H01J37/32724 ,  C23C16/4581 ,  C23C16/4586 ,  H01L21/67103 ,  H01L21/67248 ,  H01L21/67253 ,  H01L21/68735 ,  H01L21/68792 ,  H01J2237/3321 ,  H01J2237/3341

Abstract: A pedestal for a semiconductor processing chamber is provided. The pedestal includes a first body comprising a ceramic material, wherein a plurality of heater elements are encapsulated within the first body, and a second body comprising a ceramic material, wherein one or more continuously curved grooves are formed in one or more surfaces of the second body. Additionally, the first body is coupled to the second body and encloses the grooves.

公开(公告)号：US20220170159A1

公开(公告)日：2022-06-02

申请号：US17247128

申请日：2020-12-01

Applicant: Applied Materials, Inc.

Inventor： Jun Ma

IPC: C23C16/52 ,  C23C16/46 ,  C23C14/22 ,  C23C14/54 ,  G06N3/08

Abstract: A system includes multi-zone heater with heating elements within a substrate support that correspond to multiple zones of the substrate support. A processing device coupled to the heating elements and to access a temperature matrix with multiple vectors corresponding to zones; determine a temperature map of the substrate support by multiplying the temperature matrix by a weight vector, the weight vector containing estimated weight values for each respective vector; determine a target thickness map of a film on a substrate based on an original thickness map and the temperature map, the original thickness map having data characterizing an original thickness across locations of an original film at a uniform temperature; iteratively update the estimated weight values so that the temperature map results in minimization to a standard deviation of thickness values within the target thickness map; and employ the estimated weight values as control values for the heating elements.

公开(公告)号：US11133212B2

公开(公告)日：2021-09-28

申请号：US16381986

申请日：2019-04-11

Applicant: Applied Materials, Inc.

Inventor： Abdul Aziz Khaja ,  Jun Ma ,  Hyung Je Woo ,  Fei Wu ,  Jian Li

IPC: H01L21/683 ,  H01L21/67 ,  H01L21/687

Abstract: A substrate support is disclosed. The substrate support has a dielectric body with a plurality of features formed thereon. A ledge surrounds the plurality of features about a periphery thereof. The features increase in number from a central region of the substrate support towards the ledge. A seasoning layer is optionally disposed on the dielectric body.

公开(公告)号：US20210166942A1

公开(公告)日：2021-06-03

申请号：US16700758

申请日：2019-12-02

Applicant: Applied Materials, Inc.

Inventor： Jun Ma ,  Amit Bansal ,  Tuan A. Nguyen

IPC: H01L21/033 ,  H01L21/02 ,  H01L21/311

Abstract: Exemplary methods of semiconductor processing may include depositing a material on a substrate seated on a substrate support housed in a processing region of a semiconductor processing chamber. The processing region may be at least partially defined by the substrate support and a faceplate. The substrate support may be at a first position within the processing region relative to the faceplate. The methods may include translating the substrate support to a second position relative to the faceplate. The methods may include forming a plasma of an etchant precursor within the processing region of the semiconductor processing chamber. The methods may include etching an edge region of the substrate.

公开(公告)号：US11434569B2

公开(公告)日：2022-09-06

申请号：US16400054

申请日：2019-05-01

Applicant: Applied Materials, Inc.

Inventor： Tuan Anh Nguyen ,  Jason M. Schaller ,  Edward P. Hammond, IV ,  David Blahnik ,  Tejas Ulavi ,  Amit Kumar Bansal ,  Sanjeev Baluja ,  Jun Ma ,  Juan Carlos Rocha

IPC: C23C16/505 ,  C23C16/44 ,  C23C16/458

Abstract: Embodiments described herein relate to ground path systems providing a shorter and symmetrical path for radio frequency (RF) energy to propagate to a ground to reduce generation of the parasitic plasma. The ground path system bifurcates the processing volume of the chamber to form an inner volume that isolates an outer volume of the processing volume.

公开(公告)号：US11139168B2

公开(公告)日：2021-10-05

申请号：US16700758

申请日：2019-12-02

Applicant: Applied Materials, Inc.

Inventor： Jun Ma ,  Amit Bansal ,  Tuan A. Nguyen

IPC: H01L21/033 ,  H01L21/02 ,  H01L21/311

Abstract: Exemplary methods of semiconductor processing may include depositing a material on a substrate seated on a substrate support housed in a processing region of a semiconductor processing chamber. The processing region may be at least partially defined by the substrate support and a faceplate. The substrate support may be at a first position within the processing region relative to the faceplate. The methods may include translating the substrate support to a second position relative to the faceplate. The methods may include forming a plasma of an etchant precursor within the processing region of the semiconductor processing chamber. The methods may include etching an edge region of the substrate.