公开(公告)号：US12040210B2

公开(公告)日：2024-07-16

申请号：US17073671

申请日：2020-10-19

Applicant: Applied Materials, Inc.

Inventor： Jian Li ,  Dmitry A. Dzilno ,  Juan Carlos Rocha-Alvarez ,  Paul L. Brillhart ,  Akshay Gunaji ,  Mayur Govind Kulkarni ,  Sandeep Bindgi ,  Sanjay Kamath ,  Kwangduk Douglas Lee ,  Zongbin Wang ,  Yubin Zhang ,  Yong Xiang Lim

IPC: H01L21/683 ,  C23C16/458 ,  C23C16/50 ,  H01J37/32 ,  H01L21/687

CPC classification number: H01L21/6833 ,  C23C16/4586 ,  C23C16/50 ,  H01J37/32715 ,  H01L21/68742 ,  H01J2237/2007 ,  H01J2237/3321

Abstract: Exemplary semiconductor processing systems include a processing chamber, a power supply, and a chuck disposed at least partially within the processing chamber. The chuck includes a chuck body defining a vacuum port. The chuck also includes first and second coplanar electrodes embedded in the chuck body and connected to the power supply. In some examples, coplanar electrodes include concentric electrodes defining a concentric gap in between. Exemplary semiconductor processing methods may include activating the power supply for the electrostatic chuck to secure a semiconductor substrate on the body of the chuck and/or activating the vacuum port defined by the body of the electrostatic chuck. Some processing can be carried out at increased pressure, while other processing can be carried out at reduced pressure with increased chucking voltage.

公开(公告)号：US20220122873A1

公开(公告)日：2022-04-21

申请号：US17073671

申请日：2020-10-19

Applicant: Applied Materials, Inc.

Inventor： Jian Li ,  Dmitry A. Dzilno ,  Juan Carlos Rocha-Alvarez ,  Paul L. Brillhart ,  Akshay Gunaji ,  Mayur Govind Kulkarni ,  Sandeep Bindgi ,  Sanjay Kamath ,  Kwangduk Douglas Lee ,  Zongbin Wang ,  Yubin Zhang ,  Yong Xiang Lim

IPC: H01L21/683 ,  C23C16/50 ,  H01J37/32 ,  C23C16/458 ,  H01L21/687

Abstract: Exemplary semiconductor processing systems include a processing chamber, a power supply, and a chuck disposed at least partially within the processing chamber. The chuck includes a chuck body defining a vacuum port. The chuck also includes first and second coplanar electrodes embedded in the chuck body and connected to the power supply. In some examples, coplanar electrodes include concentric electrodes defining a concentric gap in between. Exemplary semiconductor processing methods may include activating the power supply for the electrostatic chuck to secure a semiconductor substrate on the body of the chuck and/or activating the vacuum port defined by the body of the electrostatic chuck. Some processing can be carried out at increased pressure, while other processing can be carried out at reduced pressure with increased chucking voltage.

公开(公告)号：US09472392B2

公开(公告)日：2016-10-18

申请号：US14610863

申请日：2015-01-30

Applicant: Applied Materials, Inc.

Inventor： Zongbin Wang ,  Shalina Sudheeran ,  Loke Yuen Wong ,  Arvind Sundarrajan

IPC: H01L21/31 ,  H01L21/02

CPC classification number: H01L21/02164 ,  C23C16/045 ,  C23C16/401 ,  C23C16/45536 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/0228

Abstract: Silicon oxide is deposited with improved step coverage by first exposing a patterned substrate to a silicon-containing precursor and then to an oxygen-containing precursor or vice versa. Plasma excitation is used for both precursors. Exposing the precursors one-at-a-time avoids disproportionate deposition of silicon oxide near the opening of a high aspect ratio gap on a patterned substrate. The plasma-excited precursors exhibit a lower sticking coefficient and/or higher surface diffusion rate in regions already adsorbed and therefore end up depositing silicon oxide deep within the high aspect ratio gap to achieve the improvement in step coverage.

Abstract translation: 通过首先将图案化的衬底暴露于含硅前体，然后再暴露于含氧前体，反之亦然，沉积氧化硅。 等离子体激发用于两种前体。 一次性暴露前体避免了在图案化基底上的高纵横比间隙的开口附近氧化硅不成比例的沉积。 等离子体激发的前体在已经吸附的区域中表现出较低的粘附系数和/或较高的表面扩散速率，因此最终在高纵横比间隙内沉积氧化硅以达到步骤覆盖的改善。

公开(公告)号：US20160225614A1

公开(公告)日：2016-08-04

申请号：US14610863

申请日：2015-01-30

Applicant: APPLIED MATERIALS, INC.

Inventor： Zongbin Wang ,  Shalina Sudheeran ,  Loke Yuen Wong ,  Arvind Sundarrajan

IPC: H01L21/02

CPC classification number: H01L21/02164 ,  C23C16/045 ,  C23C16/401 ,  C23C16/45536 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/0228

Abstract: Silicon oxide is deposited with improved step coverage by first exposing a patterned substrate to a silicon-containing precursor and then to an oxygen-containing precursor or vice versa. Plasma excitation is used for both precursors. Exposing the precursors one-at-a-time avoids disproportionate deposition of silicon oxide near the opening of a high aspect ratio gap on a patterned substrate. The plasma-excited precursors exhibit a lower sticking coefficient and/or higher surface diffusion rate in regions already adsorbed and therefore end up depositing silicon oxide deep within the high aspect ratio gap to achieve the improvement in step coverage.

Abstract translation: 通过首先将图案化的衬底暴露于含硅前体，然后再暴露于含氧前体，反之亦然，沉积氧化硅。 等离子体激发用于两种前体。 一次性暴露前体避免了在图案化基底上的高纵横比间隙的开口附近氧化硅不成比例的沉积。 等离子体激发的前体在已经吸附的区域中表现出较低的粘附系数和/或较高的表面扩散速率，因此最终在高纵横比间隙内沉积氧化硅以达到步骤覆盖的改善。

公开(公告)号：US09362111B2

公开(公告)日：2016-06-07

申请号：US14609129

申请日：2015-01-29

Applicant: Applied Materials, Inc.

Inventor： Zongbin Wang ,  Shalina Deepa Sudheeran ,  Arvind Sundarrajan ,  Bharat Bhushan

IPC: H01L21/44 ,  H01L21/4763 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L21/02 ,  H01L21/768 ,  H01L21/306 ,  C23C16/04 ,  C23C16/40 ,  C23C16/455 ,  H01J37/32 ,  H01L21/3065

CPC classification number: H01L21/02274 ,  C23C16/045 ,  C23C16/402 ,  C23C16/4554 ,  H01J37/32357 ,  H01J37/32449 ,  H01J37/32568 ,  H01J37/32577 ,  H01L21/02164 ,  H01L21/02205 ,  H01L21/02211 ,  H01L21/02216 ,  H01L21/0228 ,  H01L21/30625 ,  H01L21/3065 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/76877 ,  H01L21/76898

Abstract: Implementations described herein generally relate to methods for forming dielectric films in high aspect ratio features. In one implementation, a method for forming a silicon oxide layer is provided. A silicon-containing precursor gas is flown into a processing chamber having a substrate having a high aspect ratio feature disposed therein. Then a high frequency plasma is applied to the silicon-containing precursor gas to deposit a silicon-containing layer over the surface of the high aspect ratio feature. The processing chamber is purged to remove by-products from the silicon-containing layer deposition process. An oxygen-containing precursor gas is flown into the processing chamber. A high frequency plasma and a low frequency plasma are applied to the oxygen-containing precursor gas to form the silicon oxide layer.

Abstract translation: 本文描述的实施方案通常涉及用于形成高纵横比特征的介电膜的方法。 在一个实施方案中，提供了形成氧化硅层的方法。 将含硅前体气体流入具有设置在其中的具有高纵横比特征的基板的处理室。 然后将高频等离子体施加到含硅前体气体上以在高纵横比特征的表面上沉积含硅层。 净化处理室以除去含硅层沉积工艺中的副产物。 含氧前体气体流入处理室。 将高频等离子体和低频等离子体施加到含氧前体气体上以形成氧化硅层。