公开(公告)号：US07018925B2

公开(公告)日：2006-03-28

申请号：US10752885

申请日：2004-01-06

申请人： Brian K. Kirkpatrick ,  Rajesh Khamankar ,  Malcolm J. Bevan ,  April Gurba ,  Husam N. Alshareef ,  Clinton L. Montgomery ,  Mark H. Somervell

发明人： Brian K. Kirkpatrick ,  Rajesh Khamankar ,  Malcolm J. Bevan ,  April Gurba ,  Husam N. Alshareef ,  Clinton L. Montgomery ,  Mark H. Somervell

IPC分类号： H01L21/302

CPC分类号： H01L21/28202 ,  H01L21/02046 ,  H01L21/26506 ,  H01L21/28167 ,  H01L21/31105 ,  H01L21/31111 ,  H01L21/31144 ,  H01L21/3185 ,  H01L21/823462 ,  H01L29/518

摘要： The present invention provides a method for fabricating a dual gate semiconductor device. In one aspect, the method comprises forming a nitridated, high voltage gate dielectric layer over a semiconductor substrate, patterning a photoresist over the nitridated, high voltage gate dielectric layer to expose the nitridated, high voltage dielectric within a low voltage region, wherein the patterning leaves an accelerant residue on the exposed nitridated, high voltage gate dielectric layer, and subjecting the exposed nitridated, high voltage dielectric to a high vacuum to remove the accelerant residue.

摘要翻译： 本发明提供一种制造双栅极半导体器件的方法。 在一个方面，该方法包括在半导体衬底上形成氮化的高电压栅极电介质层，在氮化的高压栅极电介质层上形成光致抗蚀剂，以在低电压区域内露出氮化的高电压电介质，其中图案化 在暴露的氮化高压栅极电介质层上留下促进剂残留物，并将暴露的氮化高压电介质施加到高真空以除去促进剂残余物。

公开(公告)号：US07402524B2

公开(公告)日：2008-07-22

申请号：US11292883

申请日：2005-12-02

申请人： Brian K. Kirkpatrick ,  Rajesh Khamankar ,  Malcolm J. Bevan ,  April Gurba ,  Husam N. Alshareef ,  Clinton L. Montgomery ,  Mark H. Somervell

发明人： Brian K. Kirkpatrick ,  Rajesh Khamankar ,  Malcolm J. Bevan ,  April Gurba ,  Husam N. Alshareef ,  Clinton L. Montgomery ,  Mark H. Somervell

IPC分类号： H01L21/00

CPC分类号： H01L21/28202 ,  H01L21/02046 ,  H01L21/26506 ,  H01L21/28167 ,  H01L21/31105 ,  H01L21/31111 ,  H01L21/31144 ,  H01L21/3185 ,  H01L21/823462 ,  H01L29/518

摘要： The present invention provides a method for fabricating a dual gate semiconductor device. In one aspect, the method comprises forming a nitridated, high voltage gate dielectric layer over a semiconductor substrate, patterning a photoresist over the nitridated, high voltage gate dielectric layer to expose the nitridated, high voltage dielectric within a low voltage region, wherein the patterning leaves an accelerant residue on the exposed nitridated, high voltage gate dielectric layer, and subjecting the exposed nitridated, high voltage dielectric to a high vacuum to remove the accelerant residue.

摘要翻译： 本发明提供一种制造双栅极半导体器件的方法。 在一个方面，该方法包括在半导体衬底上形成氮化的高电压栅极电介质层，在氮化的高压栅极电介质层上形成光致抗蚀剂，以在低电压区域内露出氮化的高电压电介质，其中图案化 在暴露的氮化高压栅极电介质层上留下促进剂残留物，并将暴露的氮化高压电介质施加到高真空以除去促进剂残余物。

公开(公告)号：US07339240B2

公开(公告)日：2008-03-04

申请号：US11343680

申请日：2006-01-31

申请人： Brian K. Kirkpatrick ,  Rajesh Khamankar ,  Malcolm J. Bevan ,  April Gurba ,  Husam N. Alshareef ,  Clinton L. Montgomery ,  Mark H. Somervell

发明人： Brian K. Kirkpatrick ,  Rajesh Khamankar ,  Malcolm J. Bevan ,  April Gurba ,  Husam N. Alshareef ,  Clinton L. Montgomery ,  Mark H. Somervell

IPC分类号： H01L29/76

CPC分类号： H01L21/823462 ,  H01L21/28202 ,  H01L21/31111 ,  H01L21/31138 ,  H01L21/3144 ,  H01L21/82345 ,  H01L21/823842 ,  H01L21/823857 ,  H01L29/518

摘要： The present invention provides a method for fabricating a dual gate semiconductor device. In one aspect, the method comprises forming a nitridated, high voltage gate dielectric layer over a semiconductor substrate, patterning a photoresist over the nitridated, high voltage gate dielectric layer to expose the nitridated, high voltage dielectric within a low voltage region wherein the patterning leaves an accelerant residue on the exposed nitridated, high voltage gate dielectric layer. The method further includes subjecting the exposed nitridated, high voltage dielectric to a plasma to remove the accelerant residue.

摘要翻译： 本发明提供一种制造双栅极半导体器件的方法。 一方面，该方法包括在半导体衬底上形成氮化的高电压栅极电介质层，在氮化的高电压栅极电介质层上形成光致抗蚀剂，以在低电压区域内露出氮化的高电压电介质，其中图案化叶片 在暴露的氮化高压栅极介电层上的促进剂残留物。 该方法还包括将暴露的氮化高压电介质经受等离子体去除促进剂残留物。

公开(公告)号：US07049242B2

公开(公告)日：2006-05-23

申请号：US10752886

申请日：2004-01-06

申请人： Brian K. Kirkpatrick ,  Rajesh Khamankar ,  Malcolm J. Bevan ,  April Gurba ,  Husam N. Alshareef ,  Clinton L. Montgomery ,  Mark H. Somervell

发明人： Brian K. Kirkpatrick ,  Rajesh Khamankar ,  Malcolm J. Bevan ,  April Gurba ,  Husam N. Alshareef ,  Clinton L. Montgomery ,  Mark H. Somervell

IPC分类号： H01L21/302

CPC分类号： H01L21/823462 ,  H01L21/28202 ,  H01L21/31111 ,  H01L21/31138 ,  H01L21/3144 ,  H01L21/82345 ,  H01L21/823842 ,  H01L21/823857 ,  H01L29/518

摘要： The present invention provides a method for fabricating a dual gate semiconductor device. In one aspect, the method comprises forming a nitridated, high voltage gate dielectric layer over a semiconductor substrate, patterning a photoresist over the nitridated, high voltage gate dielectric layer to expose the nitridated, high voltage dielectric within a low voltage region wherein the patterning leaves an accelerant residue on the exposed nitridated, high voltage gate dielectric layer. The method further includes subjecting the exposed nitridated, high voltage dielectric to a plasma to remove the accelerant residue.

摘要翻译： 本发明提供一种制造双栅极半导体器件的方法。 一方面，该方法包括在半导体衬底上形成氮化的高电压栅极电介质层，在氮化的高电压栅极电介质层上形成光致抗蚀剂，以在低电压区域内露出氮化的高电压电介质，其中图案化叶片 在暴露的氮化高压栅极介电层上的促进剂残留物。 该方法还包括将暴露的氮化高压电介质经受等离子体去除促进剂残留物。

公开(公告)号：US20070290347A1

公开(公告)日：2007-12-20

申请号：US11425015

申请日：2006-06-19

申请人： William W. Dostalik ,  Laura M. Matz ,  Robert Kraft ,  Mark H. Somervell

发明人： William W. Dostalik ,  Laura M. Matz ,  Robert Kraft ,  Mark H. Somervell

IPC分类号： H01L21/4763

CPC分类号： H01L21/76829 ,  H01L21/02126 ,  H01L21/02178 ,  H01L21/022 ,  H01L21/02271 ,  H01L21/3105 ,  H01L21/31144 ,  H01L21/3141 ,  H01L21/3162 ,  H01L21/76808 ,  H01L21/76826 ,  H01L21/76832

摘要： The invention provides a semiconductive device that comprises interlevel dielectric layers that are located over devices. The interlevel dielectric layers have a dielectric constant (k) less than about 4.0. Interconnects are formed within or over the interlevel dielectric layers. The semiconductive device further comprises an aluminum oxide barrier located between at least one pair of the interlevel dielectric layers. The aluminum oxide barrier is substantially laterally co-extensive with the interlevel dielectric layers.

摘要翻译： 本发明提供一种半导体器件，其包括位于器件上方的层间电介质层。 层间电介质层的介电常数（k）小于约4.0。 互连件形成在层间电介质层内或上。 半导体器件还包括位于至少一对层间电介质层之间的氧化铝屏障。 氧化铝屏障与层间电介质层基本横向共同扩展。

公开(公告)号：US08449293B2

公开(公告)日：2013-05-28

申请号：US12771233

申请日：2010-04-30

申请人： Benjamin M. Rathsack ,  Steven Scheer ,  Mark H. Somervell

发明人： Benjamin M. Rathsack ,  Steven Scheer ,  Mark H. Somervell

IPC分类号： G03F7/09 ,  G03F7/11

CPC分类号： G03F7/09 ,  G03F7/0392 ,  G03F7/0751 ,  G03F7/092 ,  G03F7/095 ,  G03F7/11 ,  G03F7/165 ,  G03F7/2004

摘要： A method for patterning a substrate with extreme ultraviolet (EUV) radiation is provided. The method includes contacting a surface of the substrate with at least one surface modification agent that reacts with and bonds to the surface 402 of the substrate 401 to provide a modified surface. A layer of photoresist is formed on the modified surface, followed by exposing the layer of photoresist to a pattern of EUV radiation. The surface modification agent has a general formula: X-L-Z, where X is a leaving group; L is a linkage group including a substituted or un-substituted carbon chain having 1 to 20 carbons, a sulfur moiety, a silicon moiety, or combinations thereof; and Z is at least one of an acid functional group, a photoactive acid generator group or a halide.

摘要翻译： 提供了一种用极紫外（EUV）辐射图案化衬底的方法。 该方法包括使基材的表面与至少一种表面改性剂接触，所述表面改性剂与基材401的表面402反应并结合到基材401的表面402以提供改性表面。 在改性表面上形成一层光致抗蚀剂，随后将该光致抗蚀剂层暴露于EUV辐射图案。 表面改性剂具有以下通式：X-L-Z，其中X为离去基团; L是包含具有1至20个碳的取代或未取代的碳链，硫部分，硅部分或其组合的连接基团; Z是酸官能团，光活性酸发生剂组或卤化物中的至少一种。

公开(公告)号：US08129089B2

公开(公告)日：2012-03-06

申请号：US12652870

申请日：2010-01-06

申请人： Mark H. Somervell ,  Benjamen M. Rathsack ,  David C. Hall

发明人： Mark H. Somervell ,  Benjamen M. Rathsack ,  David C. Hall

IPC分类号： G03F7/004 ,  H01L21/31

CPC分类号： G03F7/168

摘要： The present invention provides a blended solvent for solubilizing an ultraviolet photoresist. The blended solvent comprises a mixture of from about 5 vol % to about 95 vol % of a first solvent, wherein the first solvent comprises a cyclic ester. A balance of the mixture comprises a second solvent, wherein the second solvent comprises a volatile organic liquid.

公开(公告)号：US20110244402A1

公开(公告)日：2011-10-06

申请号：US12751362

申请日：2010-03-31

申请人： Michael A. Carcasi ,  Benjamin M. Rathsack ,  Mark H. Somervell

发明人： Michael A. Carcasi ,  Benjamin M. Rathsack ,  Mark H. Somervell

IPC分类号： G03F7/20 ,  G03B27/58

CPC分类号： G03F7/26 ,  G03F7/2024 ,  G03F7/40 ,  H01L21/67207

摘要： A method and system for patterning a substrate using a radiation-sensitive material is described. The method and system include forming a layer of radiation-sensitive material on a substrate, exposing the layer of radiation-sensitive material to a pattern of radiation, and then performing a post-exposure bake following the exposing. The imaged layer of radiation-sensitive material is then positive-tone developed to remove a region having high radiation exposure to form radiation-sensitive material lines. An exposure gradient within the radiation-sensitive material lines is then removed, followed by slimming the radiation-sensitive material lines.

摘要翻译： 描述了使用辐射敏感材料构图衬底的方法和系统。 该方法和系统包括在衬底上形成辐射敏感材料层，将辐射敏感材料层暴露于辐射图案，然后在曝光之后进行曝光后烘烤。 然后对成像的辐射敏感材料层进行正音发展，以去除具有高辐射曝光的区域以形成辐射敏感材料线。 然后去除辐射敏感材料线内的曝光梯度，然后减少辐射敏感材料线。

公开(公告)号：US20090246718A1

公开(公告)日：2009-10-01

申请号：US12059459

申请日：2008-03-31

申请人： Mark H. Somervell

发明人： Mark H. Somervell

IPC分类号： G03F1/14

CPC分类号： G03F7/091 ,  Y10S430/136

摘要： A method of creating a graded anti-reflective coating (ARC) layer on a thin film is described. The method includes forming the thin film on a substrate, forming an ARC layer on the thin film, and applying a solvent to the ARC layer causing it to swell. A photo-resist layer is formed on the swollen ARC layer. A mixing layer is formed by the diffusion of components from the swollen ARC layer to the photo-resist layer and vice versa. The mixing layer has optical qualities that are distinct from those of either of the ARC layer or the photo-resist layer. The mixing layer forms the graded ARC layer.

摘要翻译： 描述了在薄膜上形成梯度抗反射涂层（ARC）层的方法。 该方法包括在基板上形成薄膜，在薄膜上形成ARC层，并向ARC层施加溶剂使其溶胀。 在溶胀的ARC层上形成光刻胶层。 通过将组分从溶胀的ARC层扩散到光致抗蚀剂层而形成混合层，反之亦然。 混合层具有与ARC层或光刻胶层中的任一个不同的光学质量。 混合层形成梯度ARC层。

公开(公告)号：US08263309B2

公开(公告)日：2012-09-11

申请号：US12751393

申请日：2010-03-31

申请人： Mark H. Somervell

发明人： Mark H. Somervell

IPC分类号： G03F7/00 ,  G03F7/004

CPC分类号： G03F7/0046 ,  G03F7/0048 ,  G03F7/322

摘要： A radiation-sensitive composition and method for using the composition to reduce the probability of pattern collapse is provided. The radiation-sensitive composition includes a bulk matrix of radiation-sensitive material with a base-reactive, surface-modifying agent dispersed throughout the matrix. The base-reactive, surface-modifying agent is reactive to hydroxide and increases the surface hydrophobicity of a pattern formed in a layer of the radiation-sensitive composition upon treatment with a basic developing solution during lithographic processing of a substrate.

摘要翻译： 提供了一种辐射敏感组合物和使用该组合物降低图案塌陷概率的方法。 辐射敏感组合物包括辐射敏感材料的体基质，其具有分散在整个基质中的碱反应性表面改性剂。 碱反应性表面改性剂与氢氧化物反应，并且在基材的光刻加工过程中用碱性显影液处理时增加在辐射敏感组合物的层中形成的图案的表面疏水性。