公开(公告)号：US20110031503A1

公开(公告)日：2011-02-10

申请号：US12538627

申请日：2009-08-10

申请人： Bruce B. Doris ,  Johnathan E. Faltermeier ,  Lahir S. Adam ,  Balasubramanian S. Haran

发明人： Bruce B. Doris ,  Johnathan E. Faltermeier ,  Lahir S. Adam ,  Balasubramanian S. Haran

IPC分类号： H01L29/161 ,  H01L27/092 ,  H01L21/04 ,  H01L21/8238

CPC分类号： H01L21/823807 ,  H01L21/823814 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/7848

摘要： An FET device is disclosed which contains a source and a drain that are each provided with an extension. The source and the drain, and their extensions, are composed of epitaxial materials containing Ge or C. The epitaxial materials and the Si substrate have differing lattice constants, consequently the source and the drain and their extensions are imparting a state of stress onto the channel. For a PFET device the epitaxial material may be SiGe, or Ge, and the channel may be in a compressive state of stress. For an NFET device the epitaxial material may be SiC and the channel may be in a tensile state of stress. A method for fabricating an FET device is also disclosed. One may form a first recession in the Si substrate to a first depth on opposing sides of the gate. The first recession is filled epitaxially with a first epitaxial material. Then, a second recession may be formed in the Si substrate to a second depth, which is greater than the first depth. Next, one may fill the second recession with a second epitaxial material, which is the same kind of material as the first epitaxial material. The epitaxial materials are selected to have a different lattice constant than the Si substrate, and consequently a state of stress is being imparted onto the channel.

摘要翻译： 公开了一种FET器件，其包含各自具有延伸部的源极和漏极。 源极和漏极及其延伸部分由包含Ge或C的外延材料组成。外延材料和Si衬底具有不同的晶格常数，因此源极和漏极及其延伸部分在沟道上赋予应力状态 。 对于PFET器件，外延材料可以是SiGe或Ge，并且沟道可以处于压应力的压缩状态。 对于NFET器件，外延材料可以是SiC，并且沟道可以处于应力的拉伸状态。 还公开了一种用于制造FET器件的方法。 可以在Si衬底中形成第一凹陷到栅极的相对侧上的第一深度。 用第一外延材料外延地填充第一次衰退。 然后，可以在Si衬底中形成比第一深度更大的第二深度的第二凹陷。 接下来，可以用与第一外延材料相同的材料的第二外延材料填充第二凹陷。 选择外延材料具有与Si衬底不同的晶格常数，并且因此在沟道上施加应力状态。

公开(公告)号：US20120187482A1

公开(公告)日：2012-07-26

申请号：US13013801

申请日：2011-01-25

申请人： Lahir S. Adam ,  Sanjay C. Mehta ,  Balasubramanian S. Haran ,  Bruce B. Doris

发明人： Lahir S. Adam ,  Sanjay C. Mehta ,  Balasubramanian S. Haran ,  Bruce B. Doris

IPC分类号： H01L21/8238 ,  H01L29/78

CPC分类号： H01L29/78 ,  H01L21/823807 ,  H01L21/823864 ,  H01L27/092 ,  H01L29/4983 ,  H01L29/7843

摘要： CMOS transistors are formed incorporating a gate electrode having tensely stressed spacers on the gate sidewalls of an n channel field effect transistor and having compressively stressed spacers on the gate sidewalls of a p channel field effect transistor to provide differentially stressed channels in respective transistors to increase carrier mobility in the respective channels.

摘要翻译： 形成CMOS晶体管，其结合有在n沟道场效应晶体管的栅极侧壁上具有紧张应力间隔物的栅极，并且在ap沟道场效应晶体管的栅极侧壁上具有压缩应力间隔物，以在相应晶体管中提供差分应力通道以增加载流子迁移率 在各自的频道。

公开(公告)号：US08716797B2

公开(公告)日：2014-05-06

申请号：US12611444

申请日：2009-11-03

申请人： Veeraraghavan S. Basker ,  Chang Kangguo ,  Bruce B. Doris ,  Johnathan E. Faltermeier

发明人： Veeraraghavan S. Basker ,  Chang Kangguo ,  Bruce B. Doris ,  Johnathan E. Faltermeier

IPC分类号： H01L27/12

CPC分类号： H01L29/66795 ,  H01L21/26586 ,  H01L21/823431 ,  H01L29/66803 ,  H01L29/785

摘要： A FinFET having spacers with a substantially uniform profile along the length of a gate stack which covers a portion of a fin of semiconductor material formed on a substrate is provided by depositing spacer material conformally on both the fins and gate stack and performing an angled ion impurity implant approximately parallel to the gate stack to selectively cause damage to only spacer material deposited on the fin. Due to the damage caused by the angled implant, the spacer material on the fins can be etched with high selectivity to the spacer material on the gate stack.

摘要翻译： 通过在翅片和栅极堆叠上共同沉积间隔材料并执行成角度的离子杂质来提供具有覆盖形成在衬底上的半导体材料的翅片的一部分的栅极叠层长度上具有基本上均匀分布的间隔物的FinFET 大致平行于栅极堆叠的植入物选择性地仅对沉积在鳍片上的间隔物材料造成损害。 由于由成角度的植入物引起的损伤，翅片上的间隔物材料可以以高选择性蚀刻到栅极堆叠上的间隔物材料。

公开(公告)号：US20120305940A1

公开(公告)日：2012-12-06

申请号：US13151238

申请日：2011-06-01

申请人： Thomas N. Adam ,  Stephen W. Bedell ,  Bruce B. Doris ,  Lisa F. Edge ,  Keith E. Fogel ,  Johnathan E. Faltermeier ,  Jinghong Li ,  Alexander Reznicek ,  Devendra K. Sadana ,  Bin Yang

发明人： Thomas N. Adam ,  Stephen W. Bedell ,  Bruce B. Doris ,  Lisa F. Edge ,  Keith E. Fogel ,  Johnathan E. Faltermeier ,  Jinghong Li ,  Alexander Reznicek ,  Devendra K. Sadana ,  Bin Yang

IPC分类号： H01L29/24 ,  H01L21/20

CPC分类号： H01L21/02529 ,  H01L21/02381 ,  H01L21/0243 ,  H01L21/02433 ,  H01L29/045 ,  H01L29/66636 ,  H01L29/7848 ,  H01L29/78654

摘要： A method and structure are disclosed for a defect free Si:C source/drain in an NFET device. A wafer is accepted with a primary surface of {100} crystallographic orientation. A recess is formed in the wafer in such manner that the bottom surface and the four sidewall surfaces of the recess are all having {100} crystallographic orientations. A Si:C material is eptaxially grown in the recess, and due to the crystallographic orientations the defect density next to each of the four sidewall surfaces is essentially the same as next to the bottom surface. The epitaxially filled recess is used in the source/drain fabrication of an NFET device. The NFET device is oriented along the crystallographic direction, and has the device channel under a tensile strain due to the defect free Si:C in the source/drain.

摘要翻译： 公开了在NFET器件中的无缺陷Si：C源极/漏极的方法和结构。 接受具有{100}晶体取向的主表面的晶片。 以这样的方式在晶片中形成凹部，使得凹部的底表面和四个侧壁表面都具有{100}晶体取向。 Si：C材料在凹槽中被轴向生长，并且由于晶体取向，邻近四个侧壁表面的缺陷密度基本上与下表面相同。 外延填充的凹槽用于NFET器件的源极/漏极制造。 NFET器件沿着<100>结晶方向取向，由于源极/漏极中的缺陷Si：C，器件沟道处于拉伸应变状态。

公开(公告)号：US09331174B2

公开(公告)日：2016-05-03

申请号：US12760688

申请日：2010-04-15

申请人： Bruce B. Doris ,  Johnathan E. Faltermeier ,  Lahir M. Shaik Adam ,  Balasubramanian S. Pranatharthi Haran

发明人： Bruce B. Doris ,  Johnathan E. Faltermeier ,  Lahir M. Shaik Adam ,  Balasubramanian S. Pranatharthi Haran

IPC分类号： H01L29/66 ,  H01L29/78 ,  H01L21/02 ,  H01L21/223 ,  H01L21/265 ,  H01L21/28 ,  H01L29/165 ,  H01L29/49 ,  H01L29/51

CPC分类号： H01L29/66636 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/223 ,  H01L21/26513 ,  H01L21/2658 ,  H01L21/26586 ,  H01L21/2807 ,  H01L29/165 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7848

摘要： A semiconductor substrate including a field effect transistor (FET) and a method of producing the same wherein a stressor is provided in a recess before the source/drain region is formed. The device has an increased carrier mobility in the channel region adjacent to the gate electrode.

摘要翻译： 包括场效应晶体管（FET）的半导体衬底及其制造方法，其中在形成源极/漏极区域之前的凹部中设置应力器。 器件在与栅电极相邻的沟道区域中具有增加的载流子迁移率。

公开(公告)号：US08288218B2

公开(公告)日：2012-10-16

申请号：US12689346

申请日：2010-01-19

申请人： Stephen W. Bedell ,  Huiming Bu ,  Kangguo Cheng ,  Bruce B. Doris ,  Johnathan E. Faltermeier ,  Ali Khakifirooz ,  Devendra K. Sadana ,  Chun-Chen Yeh

发明人： Stephen W. Bedell ,  Huiming Bu ,  Kangguo Cheng ,  Bruce B. Doris ,  Johnathan E. Faltermeier ,  Ali Khakifirooz ,  Devendra K. Sadana ,  Chun-Chen Yeh

IPC分类号： H01L21/336

CPC分类号： H01L21/823807 ,  H01L21/823814 ,  H01L27/0207 ,  H01L29/6656 ,  H01L29/66628 ,  H01L29/78 ,  H01L29/7843 ,  H01L29/7848

摘要： A semiconductor device and method for fabricating a semiconductor device include providing a strained semiconductor layer having a first strained axis, forming an active region within a surface of the strained semiconductor layer where the active region has a longitudinal axis along the strained axis and forming gate structures over the active region. Raised source/drain regions are formed on the active regions above and over the surface of the strained semiconductor layer and adjacent to the gate structures to form transistor devices.

摘要翻译： 一种用于制造半导体器件的半导体器件和方法包括提供具有第一应变轴的应变半导体层，在应变半导体层的表面内形成有源区，其中有源区具有沿应变轴的纵向轴线并形成栅极结构 在活跃地区。 在应变半导体层的表面上方和与栅极结构相邻的有源区上形成升高的源/漏区，以形成晶体管器件。

公开(公告)号：US20110108920A1

公开(公告)日：2011-05-12

申请号：US12614906

申请日：2009-11-09

申请人： VEERARAGHAVAN S. BASKER ,  Kangguo Cheng ,  Bruce B. Doris ,  Johnathan E. Faltermeier ,  Ali Khakifirooz

发明人： VEERARAGHAVAN S. BASKER ,  Kangguo Cheng ,  Bruce B. Doris ,  Johnathan E. Faltermeier ,  Ali Khakifirooz

IPC分类号： H01L29/49 ,  H01L21/84

CPC分类号： H01L21/845 ,  H01L27/1211 ,  H01L29/1054 ,  H01L29/66795

摘要： A device and method for fabrication of fin devices for an integrated circuit includes forming fin structures in a semiconductor material of a semiconductor device wherein the semiconductor material is exposed on sidewalls of the fin structures. A donor material is epitaxially deposited on the exposed sidewalls of the fin structures. A condensation process is applied to move the donor material through the sidewalls into the semiconductor material such that accommodation of the donor material causes a strain in the semiconductor material of the fin structures. The donor material is removed, and a field effect transistor is formed from the fin structure.

摘要翻译： 用于制造用于集成电路的鳍片器件的器件和方法包括在半导体器件的半导体材料中形成鳍结构，其中半导体材料暴露在鳍结构的侧壁上。 施主材料外延地沉积在鳍结构的暴露的侧壁上。 施加冷凝过程以将供体材料通过侧壁移动到半导体材料中，使得供体材料的调节在翅片结构的半导体材料中引起应变。 施主材料被去除，并且从翅片结构形成场效应晶体管。

公开(公告)号：US08933515B2

公开(公告)日：2015-01-13

申请号：US13531175

申请日：2012-06-22

申请人： Stephen W. Bedell ,  Huiming Bu ,  Kangguo Cheng ,  Bruce B. Doris ,  Johnathan E. Faltermeier ,  Ali Khakifirooz ,  Devendra K. Sadana ,  Chun-Chen Yeh

发明人： Stephen W. Bedell ,  Huiming Bu ,  Kangguo Cheng ,  Bruce B. Doris ,  Johnathan E. Faltermeier ,  Ali Khakifirooz ,  Devendra K. Sadana ,  Chun-Chen Yeh

IPC分类号： H01L27/088 ,  H01L21/8238 ,  H01L27/02 ,  H01L29/66 ,  H01L29/78

CPC分类号： H01L21/823807 ,  H01L21/823814 ,  H01L27/0207 ,  H01L29/6656 ,  H01L29/66628 ,  H01L29/78 ,  H01L29/7843 ,  H01L29/7848

摘要： A semiconductor device and method for fabricating a semiconductor device include providing a strained semiconductor layer having a first strained axis, forming an active region within a surface of the strained semiconductor layer where the active region has a longitudinal axis along the strained axis and forming gate structures over the active region. Raised source/drain regions are formed on the active regions above and over the surface of the strained semiconductor layer and adjacent to the gate structures to form transistor devices.

摘要翻译： 一种用于制造半导体器件的半导体器件和方法包括提供具有第一应变轴的应变半导体层，在应变半导体层的表面内形成有源区，其中有源区具有沿应变轴的纵向轴线并形成栅极结构 在活跃地区。 在应变半导体层的表面上方和与栅极结构相邻的有源区上形成升高的源/漏区，以形成晶体管器件。

公开(公告)号：US08420464B2

公开(公告)日：2013-04-16

申请号：US13100589

申请日：2011-05-04

申请人： Veeraraghavan S. Basker ,  Kangguo Cheng ,  Bruce B. Doris ,  Johnathan E. Faltermeier ,  Sivananda K. Kanakasabapathy ,  Hemant Adhikari

发明人： Veeraraghavan S. Basker ,  Kangguo Cheng ,  Bruce B. Doris ,  Johnathan E. Faltermeier ,  Sivananda K. Kanakasabapathy ,  Hemant Adhikari

IPC分类号： H01L21/8238

CPC分类号： H01L21/823821 ,  H01L21/845 ,  H01L27/0924 ,  H01L27/1211

摘要： A method of fabricating a semiconductor device that includes at least two fin structures, wherein one of the at least two fin structures include epitaxially formed in-situ doped second source and drain regions having a facetted exterior sidewall that are present on the sidewalls of the fin structure. In another embodiment, the disclosure also provides a method of fabricating a finFET that includes forming a recess in a sidewall of a fin structure, and epitaxially forming an extension dopant region in the recess that is formed in the fin structure. Structures formed by the aforementioned methods are also described.

摘要翻译： 一种制造半导体器件的方法，其包括至少两个翅片结构，其中所述至少两个翅片结构中的一个包括外延形成的原位掺杂的第二源极和漏极区域，其具有存在于鳍的侧壁上的刻面外侧壁 结构体。 在另一个实施例中，本发明还提供一种制造finFET的方法，其包括在鳍结构的侧壁中形成凹槽，并且在形成在鳍结构中的凹槽中外延形成延伸掺杂区域。 还描述了通过上述方法形成的结构。

公开(公告)号：US20110254015A1

公开(公告)日：2011-10-20

申请号：US12760688

申请日：2010-04-15

申请人： Bruce B. Doris ,  Johnathan E. Faltermeier ,  Lahir M. Shaik Adam ,  Balasubramanian S. Pranatharthi Haran

发明人： Bruce B. Doris ,  Johnathan E. Faltermeier ,  Lahir M. Shaik Adam ,  Balasubramanian S. Pranatharthi Haran

IPC分类号： H01L29/78 ,  H01L21/336 ,  H01L29/24

CPC分类号： H01L29/66636 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/223 ,  H01L21/26513 ,  H01L21/2658 ,  H01L21/26586 ,  H01L21/2807 ,  H01L29/165 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7848

摘要： A semiconductor substrate including a field effect transistor (FET) and a method of producing the same wherein a stressor is provided in a recess before the source/drain region is formed. The device has an increased carrier mobility in the channel region adjacent to the gate electrode.

摘要翻译： 包括场效应晶体管（FET）的半导体衬底及其制造方法，其中在形成源极/漏极区域之前的凹部中设置应力器。 器件在与栅电极相邻的沟道区域中具有增加的载流子迁移率。