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    Nanotube fuse structure
    1.
    发明授权
    Nanotube fuse structure 有权
    纳米管保险丝结构

    公开(公告)号：US07598127B2

    公开(公告)日：2009-10-06

    申请号：US11284503

    申请日：2005-11-22

    申请人： Bruce J. Whitefield ,  Derryl D. J. Allman ,  Thomas Rueckes ,  Claude L. Bertin

    发明人： Bruce J. Whitefield ,  Derryl D. J. Allman ,  Thomas Rueckes ,  Claude L. Bertin

    IPC分类号： H01L21/86

    CPC分类号： H01L23/5258 ,  H01L23/5256 ,  H01L2924/0002 ,  Y10S977/742 ,  H01L2924/00

    摘要： A method of forming a carbon nanotube fuse by depositing a carbon nanotube layer, then depositing a cap layer directly over the carbon nanotube layer. The cap layer is formed of a material that has an insufficient amount of oxygen to significantly oxidize the carbon nanotube layer under operating conditions, and is otherwise sufficiently robust to protect the carbon nanotube layer from oxygen and plasmas. A photoresist layer is formed over the cap layer, and the photoresist layer is patterned to define a desired size of fuse. Both the cap layer and the carbon nanotube layer are completely etched, without removing the photoresist layer, to define the fuse having two ends in the carbon nanotube layer. Just the cap layer is etched, without removing the photoresist layer, so as to reduce the cap layer by a desired amount at the edges of the cap layer under the photoresist layer, without damaging the carbon nanotube layer. The photoresist layer is removed, and electrically conductive contacts are formed on each of the two ends of the fuse.

    摘要翻译： 通过沉积碳纳米管层形成碳纳米管熔丝，然后在碳纳米管层上直接沉积覆盖层的方法。 盖层由具有不足量的氧的材料形成，以在操作条件下显着地氧化碳纳米管层，否则足够坚固以保护碳纳米管层免受氧气和等离子体的影响。 在盖层上形成光致抗蚀剂层，并且将光致抗蚀剂层图案化以限定所需尺寸的熔丝。 完全蚀刻盖层和碳纳米管层，而不去除光致抗蚀剂层，以限定在碳纳米管层中具有两端的熔丝。 只是盖层被蚀刻，而不去除光致抗蚀剂层，以便在光致抗蚀剂层下的盖层的边缘处将盖层减少所需量，而不损害碳纳米管层。 去除光致抗蚀剂层，并且在熔丝的两端的每一端上形成导电触点。

    Method of making sensor platform using a non-horizontally oriented nanotube element
    3.
    发明授权
    Method of making sensor platform using a non-horizontally oriented nanotube element 有权
    使用非水平取向的纳米管元件制造传感器平台的方法

    公开(公告)号：US08357559B2

    公开(公告)日：2013-01-22

    申请号：US12469402

    申请日：2009-05-20

    申请人： Brent M. Segal ,  Thomas Rueckes ,  Bernhard Vogeli ,  Darren K. Brock ,  Venkatachalam C. Jaiprakash ,  Claude L. Bertin

    发明人： Brent M. Segal ,  Thomas Rueckes ,  Bernhard Vogeli ,  Darren K. Brock ,  Venkatachalam C. Jaiprakash ,  Claude L. Bertin

    IPC分类号： H01L21/00

    CPC分类号： G01N27/4146 ,  B82Y15/00 ,  G11C13/025 ,  Y10S977/902 ,  Y10S977/904 ,  Y10S977/92 ,  Y10S977/921 ,  Y10S977/922 ,  Y10S977/924 ,  Y10T29/43 ,  Y10T29/49082

    摘要： Sensor platforms and methods of making them are described. A platform having a non-horizontally oriented sensor element comprising one or more nanostructures such as nanotubes is described. Under certain embodiments, a sensor element has or is made to have an affinity for an analyte. Under certain embodiments, such a sensor element comprises one or more pristine nanotubes. Under certain embodiments, the sensor element comprises derivatized or functionalized nanotubes. Under certain embodiments, a sensor is made by providing a support structure; providing one or more nanotubes on the structure to provide material for a sensor element; and providing circuitry to electrically sense the sensor element's electrical characterization. Under certain embodiments, the sensor element comprises pre-derivatized or pre-functionalized nanotubes. Under other embodiments, sensor material is derivatized or functionalized after provision on the structure or after patterning. Under certain embodiments, a large-scale array of sensor platforms includes a plurality of sensor elements.

    摘要翻译： 介绍传感器平台及其制作方法。 描述了具有包括一个或多个纳米结构如纳米管的非水平定向的传感器元件的平台。 在某些实施方案中，传感器元件具有或被制成对分析物具有亲和性。 在某些实施例中，这种传感器元件包括一个或多个原始纳米管。 在某些实施方案中，传感器元件包括衍生的或功能化的纳米管。 在某些实施例中，通过提供支撑结构来制造传感器; 在所述结构上提供一个或多个纳米管以提供用于传感器元件的材料; 以及提供用于电感测传感器元件电特性的电路。 在某些实施方案中，传感器元件包括预衍生的或预功能化的纳米管。 在其它实施例中，传感器材料在结构上提供之后或在图案化之后被衍生化或功能化。 在某些实施例中，传感器平台的大规模阵列包括多个传感器元件。

    Nonvolatile resistive memories having scalable two-terminal nanotube switches
    5.
    发明授权
    Nonvolatile resistive memories having scalable two-terminal nanotube switches 有权
    具有可扩展的两端纳米管开关的非易失性电阻存储器

    公开(公告)号：US08102018B2

    公开(公告)日：2012-01-24

    申请号：US11835612

    申请日：2007-08-08

    申请人： Claude L. Bertin ,  Thomas Rueckes ,  Jonathan W. Ward ,  Frank Guo ,  Steven L. Konsek ,  Mitchell Meinhold

    发明人： Claude L. Bertin ,  Thomas Rueckes ,  Jonathan W. Ward ,  Frank Guo ,  Steven L. Konsek ,  Mitchell Meinhold

    IPC分类号： G11C11/56 ,  G11C5/00 ,  H01L29/00

    CPC分类号： B82Y10/00 ,  G11C11/56 ,  G11C13/003 ,  G11C13/025 ,  G11C19/00 ,  G11C29/86 ,  G11C2213/19 ,  G11C2213/75 ,  G11C2213/79 ,  H01L27/101 ,  H01L27/1052 ,  H01L27/112 ,  H01L27/11206

    摘要： A non-volatile resistive memory is provided. The memory includes at least one non-volatile memory cell and selection circuitry. Each memory cell has a two-terminal nanotube switching device having and a nanotube fabric article disposed between and in electrical communication with two conductive terminals. Selection circuitry is operable to select the two-terminal nanotube switching device for read and write operations. Write control circuitry, responsive to a control signal, supplies write signals to a selected memory cell to induce a change in the resistance of the nanotube fabric article, the resistance corresponding to an informational state of the memory cell. Resistance sensing circuitry in communication with a selected nonvolatile memory cell, senses the resistance of the nanotube fabric article and provides the control signal to the write control circuitry. Read circuitry reads the corresponding informational state of the memory cell.

    摘要翻译： 提供了非易失性电阻性存储器。 存储器包括至少一个非易失性存储单元和选择电路。 每个存储单元具有两端纳米管切换装置，其具有设置在两个导电端子之间并与两个导电端子电连通的纳米管织物制品。 选择电路可操作以选择用于读和写操作的两端纳米管切换装置。 响应于控制信号的写控制电路向所选存储单元提供写入信号，以引起纳米管织物物品的电阻变化，该电阻对应于存储单元的信息状态。 与所选择的非易失性存储器单元通信的电阻感测电路感测纳米管织物制品的电阻并将控制信号提供给写入控制电路。 读取电路读取存储单元的相应信息状态。

    Nonvolatile nanotube diodes and nonvolatile nanotube blocks and systems using same and methods of making same
    8.
    发明授权
    Nonvolatile nanotube diodes and nonvolatile nanotube blocks and systems using same and methods of making same 有权
    非挥发性纳米管二极管和非易失性纳米管块及使用其的系统及其制造方法

    公开(公告)号：US07782650B2

    公开(公告)日：2010-08-24

    申请号：US11835845

    申请日：2007-08-08

    申请人： Claude L. Bertin ,  Thomas Rueckes ,  X. M. Henry Huang ,  Ramesh Sivarajan ,  Eliodor G. Ghenciu ,  Steven L. Konsek ,  Mitchell Meinhold ,  Jonathan W. Ward ,  Darren K. Brock

    发明人： Claude L. Bertin ,  Thomas Rueckes ,  X. M. Henry Huang ,  Ramesh Sivarajan ,  Eliodor G. Ghenciu ,  Steven L. Konsek ,  Mitchell Meinhold ,  Jonathan W. Ward ,  Darren K. Brock

    IPC分类号： G11C11/00

    CPC分类号： H01L27/1021 ,  G11C2213/19 ,  H01L21/8221 ,  H01L27/0688 ,  H01L27/1203 ,  Y10S977/943

    摘要： Under one aspect, a memory array includes word lines; bit lines; memory cells; and a memory operation circuit. Each memory cell responds to electrical stimulus on a word line and on a bit line and includes: a two-terminal non-volatile nanotube switching device having first and second terminals, a semiconductor diode element, and a nanotube fabric article capable of multiple resistance states. The semiconductor diode and nanotube article are between and in electrical communication with the first and second terminals, which are coupled to the word line bit line respectively. The operation circuit selects cells by activating bit and/or word lines, detects a resistance state of the nanotube fabric article of a selected memory cell, and adjusts electrical stimulus applied to the cell to controllably induce a selected resistance state in the nanotube fabric article. The selected resistance state corresponds to an informational state of the memory cell.

    摘要翻译： 在一个方面，存储器阵列包括字线; 位线 记忆细胞; 和存储器操作电路。 每个存储器单元响应于字线和位线上的电刺激，并且包括：具有第一和第二端子的二端非易失性纳米管开关器件，半导体二极管元件和能够具有多个电阻状态的纳米管织物制品 。 半导体二极管和纳米管制品分别与第一和第二端子电连接，并且与第一和第二端子电连接，它们分别耦合到字线位线。 操作电路通过激活位和/或字线来选择单元，检测所选择的存储单元的纳米管织物的电阻状态，并调整施加到单元的电刺激以可控制地引起纳米管织物制品中选定的电阻状态。 选择的电阻状态对应于存储单元的信息状态。

    ISOLATED METAL PLUG PROCESS FOR USE IN FABRICATING CARBON NANOTUBE MEMORY CELLS
    9.
    发明申请
    ISOLATED METAL PLUG PROCESS FOR USE IN FABRICATING CARBON NANOTUBE MEMORY CELLS 失效
    用于制备碳纳米管存储器细胞的隔离金属压片方法

    公开(公告)号：US20100148277A1

    公开(公告)日：2010-06-17

    申请号：US12710477

    申请日：2010-02-23

    申请人： Richard J. Carter ,  Peter A. Burke ,  Verne C. Hornback ,  Thomas Rueckes ,  Claude L. Bertin

    发明人： Richard J. Carter ,  Peter A. Burke ,  Verne C. Hornback ,  Thomas Rueckes ,  Claude L. Bertin

    IPC分类号： H01L27/112

    CPC分类号： H01H1/0094 ,  Y10S977/724 ,  Y10S977/732 ,  Y10S977/943

    摘要： The present invention is directed to structures and methods of fabricating electromechanical memory cells having nanotube crossbar elements. Such memory cells include a substrate having transistor with a contact that electrically contacts with the transistor. A first support layer is formed over the substrate with an opening that defines a lower chamber above the electrical contact. A nanotube crossbar element is arranged to span the lower chamber. A second support layer is formed with an opening that defines a top chamber above the lower chamber, the top chamber including an extension region that extends beyond an edge of the lower chamber to expose a portion of the top surface of the first support layer. A roof layer covers the top of the top chamber and includes an aperture that exposes a portion of the extension region of the top chamber and includes a plug that extends into the aperture in the roof layer to seal the top and bottom chambers. The memory cell further includes an electrode that overlies the crossbar element such that electrical signals can activate the electrode to attract or repel the crossbar element to set a memory state for the transistor.

    摘要翻译： 本发明涉及制造具有纳米管横杆元件的机电存储器单元的结构和方法。 这种存储单元包括具有与晶体管电接触的接触的晶体管的衬底。 第一支撑层形成在衬底上，其开口限定了电触点上方的下腔室。 纳米管横杆元件布置成跨越下室。 第二支撑层形成有开口，所述开口限定在所述下腔室上方的顶部腔室，所述顶部腔室包括延伸超出所述下部腔室的边缘以暴露所述第一支撑层的顶部表面的一部分的延伸区域。 屋顶层覆盖顶部室的顶部，并且包括露出顶部室的延伸区域的一部分并且包括延伸到顶部层中的孔中以密封顶部和底部室的插塞的孔。 存储单元还包括覆盖在横杆元件上的电极，使得电信号可以激活电极以吸引或排斥交叉开关元件以设置晶体管的存储状态。

    Nanotube-based switching elements with multiple controls and logic circuits having said elements
    10.
    发明授权
    Nanotube-based switching elements with multiple controls and logic circuits having said elements 有权
    具有多个控制器和具有所述元件的逻辑电路的基于纳米管的开关元件

    公开(公告)号：US07710157B2

    公开(公告)日：2010-05-04

    申请号：US12246013

    申请日：2008-10-06

    申请人： Claude L. Bertin ,  Thomas Rueckes ,  Brent M. Segal

    发明人： Claude L. Bertin ,  Thomas Rueckes ,  Brent M. Segal

    IPC分类号： H03K19/20

    CPC分类号： H01L29/0665 ,  B82Y10/00 ,  G11C13/025 ,  G11C23/00 ,  G11C2213/17 ,  H01H1/0094 ,  H01H1/027 ,  H01L27/28 ,  H01L29/0673 ,  H01L29/73 ,  H01L29/78 ,  H01L51/0048 ,  H01L51/0508 ,  Y10S977/708 ,  Y10S977/932 ,  Y10S977/936 ,  Y10S977/938 ,  Y10S977/94 ,  Y10S977/943

    摘要： Boolean logic circuits comprising nanotube-based switching elements with multiple controls. The Boolean logic circuits include input and output terminals and a network of nanotube switching elements electrically disposed between said at least one input terminal and said output terminal. Each switching element includes an input node, an output node, and a nanotube channel element having at least one electrically conductive nanotube. A control structure is disposed in relation to the nanotube channel element to controllably form and unform an electrically conductive channel along the nanotube channel element. At least one nanotube switching element non-volatilely retains an informational state and at least one nanotube switching elements volatilely retains an informational state. The network of nanotube switching elements effectuates a Boolean function transformation of Boolean signals on said at least one input terminal. Dual rail cascode logic circuits may also be constructed from the nanotube switching elements.

    摘要翻译： 包括具有多个控制的基于纳米管的开关元件的布尔逻辑电路。 布尔逻辑电路包括输入和输出端子以及电气设置在所述至少一个输入端子和所述输出端子之间的纳米管开关元件网络。 每个开关元件包括输入节点，输出节点和具有至少一个导电纳米管的纳米管通道元件。 相对于纳米管通道元件设置控制结构，以可控地形成和取消沿着纳米管通道元件的导电通道。 至少一个纳米管开关元件不挥发地保持信息状态，并且至少一个纳米管开关元件挥发性地保持信息状态。 纳米管切换元件的网络在所述至少一个输入端上实现布尔信号的布尔函数变换。 双轨共源共栅逻辑电路也可以由纳米管开关元件构成。