Method for fabricating pixel structure
    4.
    发明授权
    Method for fabricating pixel structure 有权
    制造像素结构的方法

    公开(公告)号:US07897442B2

    公开(公告)日:2011-03-01

    申请号:US12105278

    申请日:2008-04-18

    IPC分类号: H01L21/00

    CPC分类号: G02F1/136227 G02F1/13439

    摘要: A method for fabricating a pixel structure is disclosed. A substrate is provided. A first conductive layer is formed on the substrate, and a first shadow mask exposing a portion of the first conductive layer is disposed over the first conductive layer. Laser is used to irradiate the first conductive layer for removing the part of the first conductive layer and forming a gate. A gate dielectric layer is formed on the substrate to cover the gate. A channel layer is formed on the gate dielectric layer over the gate. A source and a drain are formed on the channel layer and respectively above both sides of the gate. A patterned passivation layer is formed to cover the channel layer and expose the drain. An electrode material layer is formed to cover the patterned passivation layer and the exposed drain.

    摘要翻译: 公开了一种用于制造像素结构的方法。 提供基板。 第一导电层形成在衬底上,并且暴露第一导电层的一部分的第一阴影掩模设置在第一导电层上。 激光用于照射第一导电层以去除第一导电层的一部分并形成栅极。 栅极电介质层形成在衬底上以覆盖栅极。 沟道层形成在栅极上的栅极电介质层上。 源极和漏极形成在沟道层上并且分别在栅极的两侧上方。 形成图案化的钝化层以覆盖沟道层并露出漏极。 形成电极材料层以覆盖图案化的钝化层和暴露的漏极。

    Semiconductor memory device and fabrication method thereof
    5.
    发明授权
    Semiconductor memory device and fabrication method thereof 有权
    半导体存储器件及其制造方法

    公开(公告)号:US07638391B2

    公开(公告)日:2009-12-29

    申请号:US11951270

    申请日:2007-12-05

    IPC分类号: H01L21/8242 H01L27/108

    CPC分类号: H01L27/10867

    摘要: A method for fabricating a semiconductor memory device. A pair of neighboring trench capacitors is formed in a substrate. An insulating layer having a pair of connecting structures therein is formed on the substrate, in which the pair of connecting structures is electrically connected to the pair of neighboring trench capacitors. An active layer is formed on the insulating layer between the pair of connecting structures so as to cover the pair of connecting structures. A pair of gate structures is formed on the active layer to electrically connect to the pair of trench capacitors. A semiconductor memory device is also disclosed.

    摘要翻译: 一种制造半导体存储器件的方法。 在衬底中形成一对相邻的沟槽电容器。 在其上形成有一对连接结构的绝缘层,其中一对连接结构电连接到该对相邻的沟槽电容器。 在一对连接结构之间的绝缘层上形成有源层,以便覆盖该对连接结构。 在有源层上形成一对栅极结构,以电连接到该对沟槽电容器。 还公开了一种半导体存储器件。

    METHOD FOR FORMING AN ARRAY SUBSTRATE
    6.
    发明申请
    METHOD FOR FORMING AN ARRAY SUBSTRATE 有权
    形成阵列基板的方法

    公开(公告)号:US20080044953A1

    公开(公告)日:2008-02-21

    申请号:US11744934

    申请日:2007-05-07

    IPC分类号: H01L21/77

    摘要: Disclosed is a method for manufacturing an array substrate utilizing a laser ablation process. With the laser ablation process, a photoresist layer is removed along with the transparent conductive layer therefrom, while maintaining other portions of the transparent conductive layer. Moreover, the laser ablation process of the invention does not need additional photo-mask, so the fabrication cost can be reduced.

    摘要翻译: 公开了利用激光烧蚀工艺制造阵列基板的方法。 通过激光烧蚀工艺,与其透明导电层一起去除光致抗蚀剂层,同时保持透明导电层的其它部分。 此外,本发明的激光烧蚀工艺不需要额外的光掩模,因此可以降低制造成本。

    ARRAY SUBSTRATE AND METHOD FOR FABRICATING THEREOF
    7.
    发明申请
    ARRAY SUBSTRATE AND METHOD FOR FABRICATING THEREOF 有权
    阵列基板及其制造方法

    公开(公告)号:US20080018850A1

    公开(公告)日:2008-01-24

    申请号:US11625359

    申请日:2007-01-22

    IPC分类号: G02F1/1345

    摘要: The invention provides a method for manufacturing an array substrate utilizing a laser ablation process. A conductive layer can be selectively patterned by the laser ablation process without a photo mask due to different adhesions between the conductive layer and other materials. The patterned conductive layer thus formed adjoins an inorganic passivation layer to provide a substantially continuous surface.

    摘要翻译: 本发明提供一种使用激光烧蚀工艺制造阵列基板的方法。 由于导电层和其它材料之间的不同粘附,可以通过激光烧蚀工艺来选择性地构图导电层,而不需要光掩膜。 如此形成的图案化导电层与无机钝化层相邻以提供基本连续的表面。

    SOLAR CELL
    8.
    发明申请
    SOLAR CELL 审中-公开
    太阳能电池

    公开(公告)号:US20120298171A1

    公开(公告)日:2012-11-29

    申请号:US13471444

    申请日:2012-05-14

    IPC分类号: H01L31/05 H01L31/0224

    摘要: A solar cell including a photoelectric conversion layer, a back electrode, a plurality of conductive fingers parallel to each other, at least one bus bar and at least one connection ribbon is provided. The photoelectric conversion layer has a front surface and a back surface. The back electrode is disposed on the back surface of the photoelectric conversion layer. The conductive fingers are disposed on the front surface of the photoelectric conversion layer. The at least one bus bar is disposed on the front surface of the photoelectric conversion layer and is electrically connected to the conductive fingers. The connection ribbon covers the bus bar and is electrically connected to the bus bar, wherein the bus bar covered by a single connection ribbon has a discontinuous pattern.

    摘要翻译: 提供了包括光电转换层,背电极,彼此平行的多个导电指状物,至少一个母线和至少一个连接带的太阳能电池。 光电转换层具有前表面和后表面。 背面电极设置在光电转换层的背面。 导电指状物设置在光电转换层的前表面上。 至少一个母线设置在光电转换层的前表面上并与导电指状物电连接。 连接带覆盖母线并电连接到汇流条,其中由单个连接带覆盖的母线具有不连续的图案。

    Semiconductor device and fabricating method thereof
    9.
    发明授权
    Semiconductor device and fabricating method thereof 有权
    半导体器件及其制造方法

    公开(公告)号:US07955927B2

    公开(公告)日:2011-06-07

    申请号:US11966891

    申请日:2007-12-28

    IPC分类号: H01L21/8242

    CPC分类号: H01L27/10876 H01L27/10894

    摘要: A semiconductor device includes a semiconductor substrate. The semiconductor substrate has a memory array region and a peripheral circuit region; a first active region and a second active region in the peripheral circuit region; a recessed gate disposed on the memory array region, comprising a first gate dielectric layer on the semiconductor substrate, wherein the first gate dielectric layer has a first thickness; and a second gate dielectric layer on the peripheral circuit region, wherein the second gate dielectric layer on the first active layer has a second thickness, and the second gate dielectric layer on the second active layer has a third thickness.

    摘要翻译: 半导体器件包括半导体衬底。 半导体衬底具有存储器阵列区域和外围电路区域; 外围电路区域中的第一有源区和第二有源区; 设置在所述存储器阵列区域上的凹入栅极,包括在所述半导体衬底上的第一栅极介电层,其中所述第一栅极介电层具有第一厚度; 以及在所述外围电路区上的第二栅介质层,其中所述第一有源层上的所述第二栅介质层具有第二厚度,并且所述第二有源层上的所述第二栅介质层具有第三厚度。

    Array Substrate and Method for Fabricating Thereof
    10.
    发明申请
    Array Substrate and Method for Fabricating Thereof 有权
    阵列基板及其制造方法

    公开(公告)号:US20100285623A1

    公开(公告)日:2010-11-11

    申请号:US12837787

    申请日:2010-07-16

    IPC分类号: H01L21/28

    摘要: The invention provides a method for manufacturing an array substrate utilizing a laser ablation process. A conductive layer can be selectively patterned by the laser ablation process without a photo mask due to different adhesions between the conductive layer and other materials. The patterned conductive layer thus formed adjoins an inorganic passivation layer to provide a substantially continuous surface.

    摘要翻译: 本发明提供一种使用激光烧蚀工艺制造阵列基板的方法。 由于导电层和其它材料之间的不同粘附,可以通过激光烧蚀工艺来选择性地构图导电层,而不需要光掩膜。 如此形成的图案化导电层与无机钝化层相邻以提供基本连续的表面。