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    Light-emitting device containing a composite electroplated substrate
    5.
    发明授权
    Light-emitting device containing a composite electroplated substrate 有权
    含有复合电镀基板的发光装置

    公开(公告)号：US08110845B2

    公开(公告)日：2012-02-07

    申请号：US13181222

    申请日：2011-07-12

    申请人： Chia-Liang Hsu ,  Min-Hsun Hsieh ,  Chih-Chiang Lu ,  Chien-Fu Huang

    发明人： Chia-Liang Hsu ,  Min-Hsun Hsieh ,  Chih-Chiang Lu ,  Chien-Fu Huang

    IPC分类号： H01L33/00

    CPC分类号： H01L33/0079 ,  H01L33/405 ,  H01L33/46

    摘要： The application is related to a method of forming a substrate of a light-emitting diode by composite electroplating. The application illustrates a light-emitting diode comprising the following elements: a light-emitting epitaxy structure, a reflective layer disposed on the light-emitting epitaxy structure, a seed layer disposed on the reflective layer, a composite electroplating substrate disposed on the seed layer by composite electroplating, and a protection layer disposed on the composite electroplating substrate.

    摘要翻译： 该应用涉及通过复合电镀形成发光二极管的基板的方法。 本发明示出了包括以下元件的发光二极管：发光外延结构，设置在发光外延结构上的反射层，设置在反射层上的种子层，设置在种子层上的复合电镀基板 通过复合电镀，以及设置在复合电镀基板上的保护层。

    Chip level package of light-emitting diode
    7.
    发明授权
    Chip level package of light-emitting diode 有权
    芯片级封装的发光二极管

    公开(公告)号：US08344412B2

    公开(公告)日：2013-01-01

    申请号：US12648911

    申请日：2009-12-29

    申请人： Chia-Liang Hsu ,  Shu-Ting Hsu ,  Min-Hsun Hsieh ,  Chih-Chiang Lu ,  Alexander Wang

    发明人： Chia-Liang Hsu ,  Shu-Ting Hsu ,  Min-Hsun Hsieh ,  Chih-Chiang Lu ,  Alexander Wang

    IPC分类号： H01L33/00

    CPC分类号： H01L33/385 ,  H01L33/62 ,  H01L2224/32245 ,  H01L2224/32257 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/00

    摘要： The application discloses a light-emitting diode chip level package structure including: a permanent substrate having a first surface and a second surface; a first electrode on the first surface; a second electrode on the second surface; an adhesive layer on where the first surface of the permanent substrate is not covered by the first electrode; a growth substrate on the adhesive layer; a patterned semiconductor structure on the growth substrate; a third electrode and a fourth electrode on the patterned semiconductor structure and electrically connect with the patterned semiconductor structure; an electrical connecting structure on the sidewall of the patterned semiconductor structure electrically connecting the third electrode and the fourth electrode with the first electrode; and an insulation layer located on the side wall of the patterned semiconductor structure and between the electrical connecting structure for electrically insulating the patterned semiconductor structure.

    摘要翻译： 本申请公开了一种发光二极管芯片级封装结构，包括：具有第一表面和第二表面的永久基板; 第一表面上的第一电极; 在第二表面上的第二电极; 在永久性基板的第一表面未被第一电极覆盖的粘合剂层上; 粘合剂层上的生长衬底; 生长衬底上的图案化半导体结构; 图案化半导体结构上的第三电极和第四电极，并与图案化的半导体结构电连接; 所述图案化半导体结构的侧壁上的电连接结构将所述第三电极和所述第四电极与所述第一电极电连接; 以及位于图案化半导体结构的侧壁上以及用于使图案化半导体结构电绝缘的电连接结构之间的绝缘层。

    CHIP LEVEL PACKAGE OF LIGHT-EMITTING DIODE
    8.
    发明申请
    CHIP LEVEL PACKAGE OF LIGHT-EMITTING DIODE 有权
    发光二极管芯片级封装

    公开(公告)号：US20100163907A1

    公开(公告)日：2010-07-01

    申请号：US12648911

    申请日：2009-12-29

    申请人： Chia-Liang HSU ,  Shu-Ting Hsu ,  Min-Hsun Hsieh ,  Chih-Chiang Lu ,  Alexander Wang

    发明人： Chia-Liang HSU ,  Shu-Ting Hsu ,  Min-Hsun Hsieh ,  Chih-Chiang Lu ,  Alexander Wang

    IPC分类号： H01L27/15 ,  H01L33/00

    CPC分类号： H01L33/385 ,  H01L33/62 ,  H01L2224/32245 ,  H01L2224/32257 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/00

    摘要： The application discloses a light-emitting diode chip level package structure including: a permanent substrate having a first surface and a second surface; a first electrode on the first surface; a second electrode on the second surface; an adhesive layer on where the first surface of the permanent substrate is not covered by the first electrode; a growth substrate on the adhesive layer; a patterned semiconductor structure on the growth substrate; a third electrode and a fourth electrode on the patterned semiconductor structure and electrically connect with the patterned semiconductor structure; an electrical connecting structure on the sidewall of the patterned semiconductor structure electrically connecting the third electrode and the fourth electrode with the first electrode; and an insulation layer located on the side wall of the patterned semiconductor structure and between the electrical connecting structure for electrically insulating the patterned semiconductor structure.

    摘要翻译： 本申请公开了一种发光二极管芯片级封装结构，包括：具有第一表面和第二表面的永久基板; 第一表面上的第一电极; 在第二表面上的第二电极; 在永久性基板的第一表面未被第一电极覆盖的粘合剂层上; 粘合剂层上的生长衬底; 生长衬底上的图案化半导体结构; 图案化半导体结构上的第三电极和第四电极，并与图案化的半导体结构电连接; 所述图案化半导体结构的侧壁上的电连接结构将所述第三电极和所述第四电极与所述第一电极电连接; 以及位于图案化半导体结构的侧壁上以及用于使图案化半导体结构电绝缘的电连接结构之间的绝缘层。

    Light-emitting device
    10.
    发明授权
    Light-emitting device 有权

    公开(公告)号：US08513699B2

    公开(公告)日：2013-08-20

    申请号：US13174183

    申请日：2011-06-30

    申请人： Chia-Liang Hsu ,  Chih-Chiang Lu ,  Chien-Fu Huang ,  Chun-Yi Wu

    发明人： Chia-Liang Hsu ,  Chih-Chiang Lu ,  Chien-Fu Huang ,  Chun-Yi Wu

    IPC分类号： H01L33/62

    CPC分类号： H01L33/385 ,  H01L24/24 ,  H01L24/82 ,  H01L33/20 ,  H01L33/32 ,  H01L33/486 ,  H01L33/62 ,  H01L2924/12041 ,  H01L2924/00

    摘要： The present invention is related to a light-emitting device. The present invention illustrates a vertical light-emitting device in one embodiment, comprising the following elements: a conductive substrate includes a through-hole, a patterned semiconductor structure disposed on a first surface of the substrate, a first bonding pad and a second bonding pad disposed on a second surface of the substrate, a conductive line passing through the through-hole connecting electrically the semiconductor structure layer, and an insulation layer on at least one sidewall of the through-hole insulates the conductive line form the substrate. The present invention illustrates a horizontal light-emitting device in another embodiment, comprising the following elements: a substrate includes a first tilted sidewall, a patterned semiconductor structure disposed on a first surface of the substrate, a first conductive line is disposed on at least the first tilted sidewall of the substrate and connecting electrically the patterned semiconductor structure.