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    Method for ultra low-K dielectric deposition
    1.
    发明申请
    Method for ultra low-K dielectric deposition 审中-公开
    超低K电介质沉积方法

    公开(公告)号：US20050048795A1

    公开(公告)日：2005-03-03

    申请号：US10649566

    申请日：2003-08-27

    申请人： Chung-Chi Ko ,  Yung-Cheng Lu ,  Tien-I Bao ,  Hui-Lin Chang ,  Syun-Ming Jang

    发明人： Chung-Chi Ko ,  Yung-Cheng Lu ,  Tien-I Bao ,  Hui-Lin Chang ,  Syun-Ming Jang

    IPC分类号： H01L21/312 ,  H01L21/768 ,  H01L21/31 ,  H01L21/469

    CPC分类号： H01L21/02271 ,  H01L21/02126 ,  H01L21/02282 ,  H01L21/0234 ,  H01L21/02348 ,  H01L21/02351 ,  H01L21/312 ,  H01L21/3121 ,  H01L21/7682

    摘要： The present invention provides a method of forming a semiconductor structure having an ultra low-K dielectric material that adheres well to the substrate. The method includes depositing a low-K material on the top surface of a substrate at a low temperature of no more than 250° by a CVD or spin-on process. The dielectric material is then cured by placing the substrate with the dielectric film in an environment where the temperature is regulated at about 400° or less as the dielectric film is being subjected to a plasma treatment or an E-beam treatment or UV treatment. The environment may further include one or more gases or a mixture of gases selected from the group consisting of H2, N2, NH3, CO2, all hydride gases and a mixture of these gases.

    摘要翻译： 本发明提供一种形成半导体结构的方法，所述半导体结构具有与基底良好粘合的超低K电介质材料。 该方法包括通过CVD或旋涂工艺在低于250°的低温下在衬底的顶表面上沉积低K材料。 然后通过将介质膜放置在介质膜经受等离子体处理或电子束处理或UV处理的温度调节在约400°或更小的环境中来固化电介质材料。 环境可以进一步包括选自H 2，N 2，NH 3，CO 2，所有氢化物气体和这些气体的混合物的一种或多种气体或气体混合物。

    SiOCH low k surface protection layer formation by CxHy gas plasma treatment
    2.
    发明授权
    SiOCH low k surface protection layer formation by CxHy gas plasma treatment 有权
    SiOCH低k表面保护层通过CxHy气体等离子体处理形成

    公开(公告)号：US06962869B1

    公开(公告)日：2005-11-08

    申请号：US10270974

    申请日：2002-10-15

    申请人： Tien-I Bao ,  Hsin-Hsien Lu ,  Lih-Ping Li ,  Chung-Chi Ko ,  Aaron Song ,  Syun-Ming Jang

    发明人： Tien-I Bao ,  Hsin-Hsien Lu ,  Lih-Ping Li ,  Chung-Chi Ko ,  Aaron Song ,  Syun-Ming Jang

    IPC分类号： H01L21/4763 ,  H01L21/768

    CPC分类号： H01L21/3105 ,  H01L21/31144 ,  H01L21/3212 ,  H01L21/76802 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76835

    摘要： A method of protecting a low k dielectric layer that is preferably comprised of a material containing Si, O, C, and H is described. The dielectric layer is subjected to a gas plasma that is generated from a CXHY gas which is preferably ethylene. Optionally, hydrogen may be added to the CXHY gas. Another alternative is a two step plasma process involving a first plasma treatment of CXHY or CXHY combined with H2 and a second plasma treatment with H2. The modified dielectric layer provides improved adhesion to anti-reflective layers and to a barrier metal layer in a damascene process. The modified dielectric layer also has a low CMP rate that prevents scratch defects and an oxide recess from occurring next to the metal layer on the surface of the damascene stack. The plasma treatments are preferably done in the same chamber in which the dielectric layer is deposited.

    摘要翻译： 描述了保护低k电介质层的方法，其优选由含有Si，O，C和H的材料组成。 对电介质层进行气化等离子体，该等离子体是由优选乙烯的C X H Y气产生的。 任选地，可以将氢气加入到C 1 H 2 H 2 O气体中。 另一种替代方案是涉及第一等离子体处理C X> Y Y or SUB SUB SUB SUB SUB SUB SUB SUB SUB SUB SUB SUB SUB SUB SUB SUB SUB SUB >与H 2 H 2结合，并且与H 2 2进行第二等离子体处理。 改进的介电层在镶嵌工艺中提供对抗反射层和阻挡金属层的改善的粘合性。 改进的介电层也具有低CMP速率，其防止划痕缺陷和氧化物凹陷在镶嵌层的表面上邻近金属层发生。 等离子体处理优选在沉积介电层的相同的室中进行。

    Method for forming a carbon doped oxide low-k insulating layer
    3.
    发明授权
    Method for forming a carbon doped oxide low-k insulating layer 有权
    形成碳掺杂氧化物低k绝缘层的方法

    公开(公告)号：US06812043B2

    公开(公告)日：2004-11-02

    申请号：US10131713

    申请日：2002-04-25

    申请人： Tien-I Bao ,  Chung-Chi Ko ,  Lih-Ping Li ,  Syun-Ming Jang

    发明人： Tien-I Bao ,  Chung-Chi Ko ,  Lih-Ping Li ,  Syun-Ming Jang

    IPC分类号： H01L2100

    CPC分类号： H01L21/76826 ,  C23C16/401 ,  C23C16/56 ,  H01L21/02126 ,  H01L21/022 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/02304 ,  H01L21/0234 ,  H01L21/02362 ,  H01L21/31633 ,  H01L21/76807

    摘要： A method for forming a dielectric insulating layer with a reduced dielectric constant and increased hardness for semiconductor device manufacturing including providing a semiconductor wafer having a process surface for forming a dielectric insulting layer thereover; depositing according to a CVD process a carbon doped oxide layer the CVD process including an oregano-silane precursor having Si—O groups and Si—Ry groups, where R is an alkyl or cyclo-alkyl group and y the number of R groups bonded to Si; and, exposing the carbon doped oxide layer to a hydrogen plasma treatment for a period of time thereby reducing the carbon doped oxide layer thickness including reducing the carbon doped oxide layer dielectric constant and increasing the carbon doped oxide layer hardness.

    摘要翻译： 一种用于半导体器件制造的具有降低的介电常数和增加的硬度的介电绝缘层的形成方法，包括提供具有在其上形成电介质绝缘层的工艺表面的半导体晶片; 根据CVD工艺沉积碳掺杂氧化物层的CVD工艺，其包括具有Si-O基团和Si-Ry基团的牛至硅烷前体，其中R是烷基或环烷基，y是与 硅; 并且将碳掺杂的氧化物层暴露于氢等离子体处理一段时间，从而减少碳掺杂的氧化物层厚度，包括减少碳掺杂的氧化物层介电常数并增加碳掺杂的氧化物层的硬度。

    Interconnects containing bilayer porous low-k dielectrics using different porogen to structure former ratio
    7.
    发明申请
    Interconnects containing bilayer porous low-k dielectrics using different porogen to structure former ratio 有权
    包含双层多孔低k电介质的互连使用不同的致孔剂来构造前者的比例

    公开(公告)号：US20080171431A1

    公开(公告)日：2008-07-17

    申请号：US11654427

    申请日：2007-01-17

    申请人： Chen-Hua Yu ,  Yung-Cheng Lu ,  Pei-Ren Jeng ,  Chia-Cheng Chou ,  Keng-Chu Lin ,  Chung-Chi Ko ,  Tien-I Bao ,  Shwang-Ming Jeng

    发明人： Chen-Hua Yu ,  Yung-Cheng Lu ,  Pei-Ren Jeng ,  Chia-Cheng Chou ,  Keng-Chu Lin ,  Chung-Chi Ko ,  Tien-I Bao ,  Shwang-Ming Jeng

    IPC分类号： H01L21/4763

    CPC分类号： H01L21/7682 ,  H01L21/76807 ,  H01L21/76835 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A bilayer porous low dielectric constant (low-k) interconnect structure and methods of fabricating the same are presented. A preferred embodiment having an effective dielectric constant of about 2.2 comprises a bottom deposited dielectric layer and a top deposited dielectric layer in direct contact with the former. The bottom layer and the top layer have same atomic compositions, but a higher dielectric constant value k. The bottom dielectric layer serves as an etch stop layer for the top dielectric layer, and the top dielectric layer can act as CMP stop layer. One embodiment of making the structure includes forming a bottom dielectric layer having a first porogen content and a top dielectric layer having a higher porogen content. A curing process leaves lower pore density in the bottom dielectric layer than that left in the top dielectric layer, which leads to higher dielectric value k in the bottom dielectric layer.

    摘要翻译： 提出了双层多孔低介电常数（低k）互连结构及其制造方法。 具有约2.2的有效介电常数的优选实施例包括与前者直接接触的底部沉积介电层和顶部沉积的介电层。 底层和顶层具有相同的原子组成，但是较高的介电常数值k。 底部介电层用作顶部电介质层的蚀刻停止层，并且顶部介电层可以用作CMP停止层。 制造该结构的一个实施方案包括形成具有第一致孔剂含量的底部电介质层和具有较高致孔剂含量的顶部电介质层。 固化过程在底部电介质层中留下比在顶部电介质层中留下的孔密度更低的孔密度，这导致底部电介质层中较高的介电值k。

    Interconnects containing bilayer porous low-k dielectrics using different porogen to structure former ratio
    8.
    发明授权
    Interconnects containing bilayer porous low-k dielectrics using different porogen to structure former ratio 有权
    包含双层多孔低k电介质的互连使用不同的致孔剂来构造前者的比例

    公开(公告)号：US07723226B2

    公开(公告)日：2010-05-25

    申请号：US11654427

    申请日：2007-01-17

    申请人： Chen-Hua Yu ,  Yung-Cheng Lu ,  Pei-Ren Jeng ,  Chia-Cheng Chou ,  Keng-Chu Lin ,  Chung-Chi Ko ,  Tien-I Bao ,  Shwang-Ming Jeng

    发明人： Chen-Hua Yu ,  Yung-Cheng Lu ,  Pei-Ren Jeng ,  Chia-Cheng Chou ,  Keng-Chu Lin ,  Chung-Chi Ko ,  Tien-I Bao ,  Shwang-Ming Jeng

    IPC分类号： H01L21/4763

    CPC分类号： H01L21/7682 ,  H01L21/76807 ,  H01L21/76835 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A bilayer porous low dielectric constant (low-k) interconnect structure and methods of fabricating the same are presented. A preferred embodiment having an effective dielectric constant of about 2.2 comprises a bottom deposited dielectric layer and a top deposited dielectric layer in direct contact with the former. The bottom layer and the top layer have same atomic compositions, but a higher dielectric constant value k. The bottom dielectric layer serves as an etch stop layer for the top dielectric layer, and the top dielectric layer can act as CMP stop layer. One embodiment of making the structure includes forming a bottom dielectric layer having a first porogen content and a top dielectric layer having a higher porogen content. A curing process leaves lower pore density in the bottom dielectric layer than that left in the top dielectric layer, which leads to higher dielectric value k in the bottom dielectric layer.

    摘要翻译： 提出了双层多孔低介电常数（低k）互连结构及其制造方法。 具有约2.2的有效介电常数的优选实施例包括与前者直接接触的底部沉积的介电层和顶部沉积的介电层。 底层和顶层具有相同的原子组成，但是较高的介电常数值k。 底部介电层用作顶部介电层的蚀刻停止层，并且顶部介电层可以用作CMP停止层。 制造该结构的一个实施方案包括形成具有第一致孔剂含量的底部电介质层和具有较高致孔剂含量的顶部电介质层。 固化过程在底部电介质层中留下的孔隙密度低于顶部介电层中留下的孔密度，这导致底部介电层中较高的介电常数k。

    Two step post-deposition treatment of ILD layer for a lower dielectric constant and improved mechanical properties
    9.
    发明授权
    Two step post-deposition treatment of ILD layer for a lower dielectric constant and improved mechanical properties 有权
    ILD层的两步沉积后处理具有较低的介电常数和改善的机械性能

    公开(公告)号：US08158521B2

    公开(公告)日：2012-04-17

    申请号：US11781632

    申请日：2007-07-23

    申请人： Hui-Lin Chang ,  Chung-Chi Ko ,  Tien I Bao ,  Yun-Chen Lu

    发明人： Hui-Lin Chang ,  Chung-Chi Ko ,  Tien I Bao ,  Yun-Chen Lu

    IPC分类号： H01L21/311

    CPC分类号： H01L21/02126 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/02304 ,  H01L21/02321 ,  H01L21/0234 ,  H01L21/3105 ,  H01L21/3124 ,  H01L21/31633 ,  H01L21/76819 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76835

    摘要： A method of lowering the dielectric constant of an organosilicon low k dielectric layer while improving the hardness and thermal stability is provided. A deposited layer of carbon doped oxide, HSQ, or MSQ is cured and treated with a He plasma which improves hardness for a subsequent CMP step and lowers the dielectric constant. There is no loss of H2O or CH4 during the He treatment. The low k dielectric layer is then treated with a H2 plasma which converts some of the Si—O and Si—CH3 bonds near the surface to Si—H bonds, thereby further lowering the dielectric constant and increasing thermal stability that improves breakdown resistance. Moisture uptake is also reduced. The method is especially useful for interconnect schemes with deep sub-micron ground rules. Surprisingly, the k value obtained from two different plasma treatments is lower than when two He treatments or two H2 treatment are performed.

    摘要翻译： 提供降低有机硅低k电介质层的介电常数同时提高硬度和热稳定性的方法。 掺杂碳的氧化物，HSQ或MSQ的沉积层用He等离子体固化和处理，其提高后续CMP步骤的硬度并降低介电常数。 在他治疗期间，没有H2O或CH4的损失。 然后用H 2等离子体处理低k电介质层，其将表面附近的一些Si-O和Si-CH 3键转化为Si-H键，从而进一步降低介电常数并增加热稳定性，从而提高耐击穿性。 吸湿也减少。 该方法对于具有深亚微米基准规则的互连方案特别有用。 令人惊讶的是，从两种不同的等离子体处理获得的k值低于执行两个He处理或两个H2处理时。

    Two step post-deposition treatment of ILD layer for a lower dielectric constant and improved mechanical properties
    10.
    发明授权
    Two step post-deposition treatment of ILD layer for a lower dielectric constant and improved mechanical properties 有权
    ILD层的两步沉积后处理具有较低的介电常数和改善的机械性能

    公开(公告)号：US07250370B2

    公开(公告)日：2007-07-31

    申请号：US10666354

    申请日：2003-09-19

    申请人： Hui-Lin Chang ,  Chung-Chi Ko ,  Tien I. Bao ,  Yun-Chen Lu

    发明人： Hui-Lin Chang ,  Chung-Chi Ko ,  Tien I. Bao ,  Yun-Chen Lu

    IPC分类号： H01L21/311

    CPC分类号： H01L21/02126 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/02304 ,  H01L21/02321 ,  H01L21/0234 ,  H01L21/3105 ,  H01L21/3124 ,  H01L21/31633 ,  H01L21/76819 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76835

    摘要： A method of lowering the dielectric constant of an organosilicon low k dielectric layer while improving the hardness and thermal stability is provided. A deposited layer of carbon doped oxide, HSQ, or MSQ is cured and treated with a He plasma which improves hardness for a subsequent CMP step and lowers the dielectric constant. There is no loss of H2O or CH4 during the He treatment. The low k dielectric layer is then treated with a H2 plasma which converts some of the Si—O and Si—CH3 bonds near the surface to Si—H bonds, thereby further lowering the dielectric constant and increasing thermal stability that improves breakdown resistance. Moisture uptake is also reduced. The method is especially useful for interconnect schemes with deep sub-micron ground rules. Surprisingly, the k value obtained from two different plasma treatments is lower than when two He treatments or two H2 treatment are performed.

    摘要翻译： 提供降低有机硅低k电介质层的介电常数同时提高硬度和热稳定性的方法。 掺杂碳的氧化物，HSQ或MSQ的沉积层用He等离子体固化和处理，其提高后续CMP步骤的硬度并降低介电常数。 在He处理期间，没有H 2 O 2或CH 4 O 3的损失。 然后用H 2 O 2等离子体处理低k电介质层，其将表面附近的一些Si-O和Si-CH 3键转化为Si-H键， 从而进一步降低介电常数并增加热稳定性，从而提高耐击穿性。 吸湿也减少。 该方法对于具有深亚微米基准规则的互连方案特别有用。 令人惊讶的是，从两种不同的等离子体处理获得的k值低于当执行两个He处理或两个H 2 N 2处理时。