利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

36 条记录 (耗时 0.04 秒)

    Method and structure to improve the reliability of multilayer structures of FSG (F-doped SiO2) dielectric layers and metal layers in semiconductor integrated circuits
    1.
    发明授权
    Method and structure to improve the reliability of multilayer structures of FSG (F-doped SiO2) dielectric layers and metal layers in semiconductor integrated circuits 有权
    提高半导体集成电路中FSG（F掺杂SiO2）电介质层和金属层多层结构可靠性的方法和结构

    公开(公告)号：US06586347B1

    公开(公告)日：2003-07-01

    申请号：US09978229

    申请日：2001-10-16

    申请人： Chung-Shi Liu ,  Hui-Ling Wang ,  Szu-An Wu ,  Chun-Ching Tsan ,  Ying Lang Wang ,  Tong Hua Kuan

    发明人： Chung-Shi Liu ,  Hui-Ling Wang ,  Szu-An Wu ,  Chun-Ching Tsan ,  Ying Lang Wang ,  Tong Hua Kuan

    IPC分类号： H01L2131

    CPC分类号： H01L21/76801 ,  H01L21/76832

    摘要： An improved composite dielectric structure and method of forming thereof which prevents delamination of FSG (F-doped SiO2) and allows FSG to be used as the interlevel dielectric between successive conducting interconnection patterns in multilevel integrated circuit structures has been developed. The composite dielectric structure comprises FSG, undoped silicon oxide (optional), silicon-rich silicon oxide and silicon nitride. The silicon-rich silicon oxide layer having a thickness between about 1000 and 2000 Angstroms prevents reaction of F atoms from the FSG layer with the silicon nitride layer during subsequent manufacturing heat treatment cycles and prevents the deleterious formation of delamination bubbles which cause peeling of the FSG layer.

    摘要翻译： 已经开发了一种改进的复合电介质结构及其形成方法，其防止FSG（F掺杂SiO 2）的分层并且允许FSG用作多电平集成电路结构中的连续导电互连图案之间的层间电介质。 复合电介质结构包括FSG，未掺杂的氧化硅（可选），富硅氧化硅和氮化硅。 厚度在约1000和2000埃之间的富含硅的氧化硅层防止了F原子与氮化硅层在随后的制造热处理循环中的反应，并且防止了导致FSG剥离的分层气泡的有害形成 层。

    Methods to improve copper-fluorinated silica glass interconnects
    2.
    发明授权
    Methods to improve copper-fluorinated silica glass interconnects 有权
    改善铜氟化石英玻璃互连的方法

    公开(公告)号：US6136680A

    公开(公告)日：2000-10-24

    申请号：US489498

    申请日：2000-01-21

    申请人： Jane-Bai Lai ,  Chung-Shi Liu ,  Tien-I Bao ,  Syun-Ming Jang ,  Chung-Long Chang ,  Hui-Ling Wang ,  Szu-An Wu ,  Wen-Kung Cheng ,  Chun-Ching Tsan ,  Ying-Lang Wang

    发明人： Jane-Bai Lai ,  Chung-Shi Liu ,  Tien-I Bao ,  Syun-Ming Jang ,  Chung-Long Chang ,  Hui-Ling Wang ,  Szu-An Wu ,  Wen-Kung Cheng ,  Chun-Ching Tsan ,  Ying-Lang Wang

    IPC分类号： H01L21/02 ,  H01L21/3105 ,  H01L21/321 ,  H01L21/768 ,  H01L21/44 ,  H01L21/4763

    CPC分类号： H01L21/76825 ,  H01L21/02074 ,  H01L21/3105 ,  H01L21/3212 ,  H01L21/76826 ,  H01L21/76834 ,  H01L21/7684 ,  H01L21/76883

    摘要： A method of forming an interconnect, comprising the following steps. A semiconductor structure is provided that has an exposed first metal contact and a dielectric layer formed thereover. An FSG layer having a predetermined thickness is then formed over the dielectric layer. A trench, having a predetermined width, is formed within the FSG layer and the dielectric layer exposing the first metal contact. A barrier layer, having a predetermined thickness, may be formed over the FSG layer and lining the trench side walls and bottom. A metal, preferably copper, is then deposited on the barrier layer to form a copper layer, having a predetermined thickness, over said barrier layer covered FSG layer, filling the lined trench and blanket filling the barrier layer covered FSG layer. The copper layer, and the barrier layer on said upper surface of said FSG layer, are planarized, exposing the upper surface of the FSG layer and forming a planarized copper filled trench. The FSG layer and planarized copper filled trench are then processed by either: (1) annealing from about 400 to 450.degree. C. for about one hour, then either NH.sub.3 or H.sub.2 plasma treating; or (2) Ar.sup.+ sputtering to ion implant Ar.sup.+ to a depth of less than about 300 .ANG. in the fluorinated silica glass layer, whereby any formed Si--OH bonds and copper oxide (metal oxide) are removed. A dielectric cap layer, having a predetermined thickness, is then formed over the processed FSG layer and the planarized copper filled trench.

    摘要翻译： 一种形成互连的方法，包括以下步骤。 提供一种半导体结构，其具有暴露的第一金属触点和形成在其上的电介质层。 然后在电介质层上形成具有预定厚度的FSG层。 具有预定宽度的沟槽形成在FSG层内，并且介电层露出第一金属接触。 具有预定厚度的阻挡层可以形成在FSG层之上并且衬在沟槽侧壁和底部。 然后将一种金属，优选铜沉积在阻挡层上，以形成具有预定厚度的铜层，超过所述阻挡层覆盖的FSG层，填充衬里的沟槽和覆盖填充阻挡层覆盖的FSG层的毯子。 所述FSG层的所述上表面上的铜层和阻挡层被平坦化，暴露出FSG层的上表面并形成平坦化的铜填充沟槽。 然后通过以下步骤之一处理FSG层和平坦化的铜填充沟槽：（1）从约400至450℃的退火约1小时，然后进行NH 3或H 2等离子体处理; 或者（2）在氟化石英玻璃层中，离子注入Ar +溅射至小于约300的深度，由此除去任何形成的Si-OH键和氧化铜（金属氧化物）。 然后在经处理的FSG层和平坦化的铜填充沟槽上形成具有预定厚度的电介质盖层。

    Obtaining the better defect performance of the fuse CMP process by adding slurry polish on more soft pad after slurry polish
    3.
    发明授权
    Obtaining the better defect performance of the fuse CMP process by adding slurry polish on more soft pad after slurry polish 有权
    通过在浆液抛光后在更软的垫上添加浆料抛光，获得熔融CMP工艺的更好的缺陷性能

    公开(公告)号：US06248002B1

    公开(公告)日：2001-06-19

    申请号：US09421509

    申请日：1999-10-20

    申请人： Hui-Ling Wang ,  Tong-Hua Kuan ,  Ying-Lang Wang ,  Yu-Ku Lin

    发明人： Hui-Ling Wang ,  Tong-Hua Kuan ,  Ying-Lang Wang ,  Yu-Ku Lin

    IPC分类号： B24B100

    CPC分类号： B24B37/042

    摘要： A method to prevent the accumulation of particle impurities on the surface of a semiconductor substrate that contains wolfram plugs during the process of polishing the surface of the wafer. The polishing sequence consists of three distinct polishing steps whereby the first two steps use hard polishing pads while the third step uses a soft polishing pad with the application of slurry during the third polish.

    摘要翻译： 一种在抛光晶片表面的过程中防止颗粒杂质在含有钨骨塞的半导体衬底表面积聚的方法。 抛光顺序由三个不同的抛光步骤组成，其中前两个步骤使用硬抛光垫，而第三步在第三次抛光期间使用软抛光垫施加浆料。

    Plasma enhanced chemical vapor deposition (PECVD) method for forming microelectronic layer with enhanced film thickness uniformity
    4.
    发明授权
    Plasma enhanced chemical vapor deposition (PECVD) method for forming microelectronic layer with enhanced film thickness uniformity 有权
    用于形成具有增强的膜厚度均匀性的微电子层的等离子体增强化学气相沉积（PECVD）方法

    公开(公告)号：US06281146B1

    公开(公告)日：2001-08-28

    申请号：US09396517

    申请日：1999-09-15

    申请人： Ying-Lang Wang ,  Hui-Ling Wang ,  Jowei Dun ,  Szu-An Wu

    发明人： Ying-Lang Wang ,  Hui-Ling Wang ,  Jowei Dun ,  Szu-An Wu

    IPC分类号： H01L2131

    CPC分类号： H01L21/02164 ,  C23C16/402 ,  C23C16/5096 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/31612

    摘要： A method for forming a microelectronic layer. There is first provided a substrate. There is then formed over the substrate the microelectronic layer while employing a plasma enhanced chemical vapor deposition (PECVD) method employing a source material gas and a carrier gas, wherein there is employed a sufficiently low plasma power, a sufficiently low source material gas:carrier gas flow rate ratio and a sufficiently high carrier gas atomic mass such that the microelectronic layer is formed with enhanced film thickness uniformity. The method may be employed for forming ion implant screen layers, such as silicon oxide ion implant screen layers, with enhanced film thickness uniformity.

    摘要翻译： 一种形成微电子层的方法。 首先提供基板。 然后在采用使用源材料气体和载气的等离子体增强化学气相沉积（PECVD）方法的基板上形成微电子层，其中采用足够低的等离子体功率，足够低的源材料气体：载体 气体流量比和足够高的载气原子质量，使得微电子层形成为具有增强的膜厚均匀性。 该方法可用于形成具有增强的膜厚度均匀性的离子注入屏幕层，例如氧化硅离子注入屏幕层。

    Method for improvement of tungsten chemical-mechanical polishing process
    5.
    发明授权
    Method for improvement of tungsten chemical-mechanical polishing process 有权
    钨化学机械抛光工艺的改进方法

    公开(公告)号：US06287172B1

    公开(公告)日：2001-09-11

    申请号：US09465700

    申请日：1999-12-17

    申请人： Tong-Hua Kuan ,  Hui-Ling Wang ,  Ying-Lang Wang ,  Chin-Kun Lan

    发明人： Tong-Hua Kuan ,  Hui-Ling Wang ,  Ying-Lang Wang ,  Chin-Kun Lan

    IPC分类号： B24B100

    CPC分类号： B24B37/345 ,  B24B37/0056 ,  B24B37/042 ,  B24D13/142

    摘要： A multi-step chemical-mechanical polishing method for improving tungsten chemical-mechanical polishing (CMP) process is provided in the present invention. The method comprises following steps. First, a wafer is placed on a first pad of a CMP system, wherein a head fixes the wafer on the first pad. Then, the head is rotated and the wafer is polished on the first pad by using a tungsten slurry. Next, the wafer is transferred to place on a second pad of the CMP system, wherein the head fixes the wafer on the second pad. Following, the head is rotated and the wafer is polished on the second pad by using the tungsten slurry. Then, the wafer is cleaned on the second pad by using a de-ionic water. Next, the wafer is transferred to place on a third pad of the CMP system, wherein the head fixes the wafer on the third pad. Following, the wafer is cleaned on the third pad by using the de-ionic water. Last, the head is rotated and the wafer is polished on the third pad by using an oxide slurry, wherein a pH value of the tungsten slurry and a pH value of the oxide slurry are opposite.

    摘要翻译： 本发明提供了一种用于改善钨化学机械抛光（CMP）工艺的多步化学机械抛光方法。 该方法包括以下步骤。 首先，将晶片放置在CMP系统的第一焊盘上，其中头部将晶片固定在第一焊盘上。 然后，头部旋转，并且通过使用钨浆料在第一焊盘上抛光晶片。 接下来，将晶片转移到CMP系统的第二焊盘上，其中头部将晶片固定在第二焊盘上。 接下来，头部旋转，并且通过使用钨浆料在第二垫上抛光晶片。 然后，通过使用脱离子水在第二焊盘上清洁晶片。 接下来，将晶片转移到CMP系统的第三焊盘上，其中头部将晶片固定在第三焊盘上。 接下来，通过使用去离子水在第三垫上清洁晶片。 最后，旋转头部，通过使用氧化物浆料在第三焊盘上抛光晶片，其中钨浆料的pH值和氧化物浆料的pH值相反。

    Method to solve the delamination of a silicon nitride layer from an underlying spin on glass layer
    6.
    发明授权
    Method to solve the delamination of a silicon nitride layer from an underlying spin on glass layer 有权
    解决氮化硅层从玻璃层上的底层旋转分层的方法

    公开(公告)号：US06407007B1

    公开(公告)日：2002-06-18

    申请号：US09193669

    申请日：1998-11-17

    申请人： Chun-Ching Tsan ,  Ying-Lang Wang ,  Hui-Ling Wang ,  Chin Kun Lan

    发明人： Chun-Ching Tsan ,  Ying-Lang Wang ,  Hui-Ling Wang ,  Chin Kun Lan

    IPC分类号： H01L21324

    CPC分类号： H01L21/3185 ,  H01L21/316 ,  H01L21/76826

    摘要： A method for improving the adhesion of a thick silicon nitride layer, to an underlying spin on glass, (SOG), layer, has been developed. After applying, baking and curing of a SOG layer, plasma treatment of the SOG layer, is performed in a deposition tool, using a nitrous oxide plasma. The plasma treatment prepares the exposed SOG surface for an in situ deposition of a thick silicon nitride layer, by improving the adhesion of thick silicon nitride to the underlying SOG layer, and by decreasing the possibility of silicon nitride delamination, that can occur with counterparts, fabricated without the nitrous oxide plasma treatment of the SOG layer.

    摘要翻译： 已经开发了用于改善厚氮化硅层与玻璃上的底层旋涂（SOG）层的粘附性的方法。 施加，烘烤和固化SOG层之后，使用一氧化二氮等离子体在沉积工具中进行SOG层的等离子体处理。 等离子体处理通过改善厚氮化硅与下面的SOG层的粘附性以及通过降低可能与对应物发生的氮化硅分层的可能性来制备暴露的SOG表面，用于原位沉积厚的氮化硅层， 在没有氧化亚氮等离子体处理SOG层的情况下制造。

    Vanilloid receptor ligands and their use in treatments
    9.
    发明申请
    Vanilloid receptor ligands and their use in treatments 失效
    香草素受体配体及其在治疗中的应用

    公开(公告)号：US20050182067A1

    公开(公告)日：2005-08-18

    申请号：US11056534

    申请日：2005-02-11

    申请人： Chenera Balan ,  Ning Chen ,  Elizabeth Doherty ,  Vijay Gore ,  Mark Norman ,  Hui-Ling Wang

    发明人： Chenera Balan ,  Ning Chen ,  Elizabeth Doherty ,  Vijay Gore ,  Mark Norman ,  Hui-Ling Wang

    IPC分类号： A61K31/44 ,  A61K31/444 ,  A61K31/505 ,  C07D401/12 ,  C07D401/14 ,  C07D403/12 ,  C07D403/14 ,  C07D413/12 ,  C07D417/12 ,  C07D417/14 ,  A61K31/506 ,  C07D43/14

    CPC分类号： C07D401/12 ,  C07D401/14 ,  C07D403/12 ,  C07D403/14 ,  C07D413/12 ,  C07D417/12 ,  C07D417/14

    摘要： Compounds having the general structure and compositions containing them, for the treatment of acute, inflammatory and neuropathic pain, dental pain, general headache, migraine, cluster headache, mixed-vascular and non-vascular syndromes, tension headache, general inflammation, arthritis, rheumatic diseases, osteoarthritis, inflammatory bowel disorders, inflammatory eye disorders, inflammatory or unstable bladder disorders, psoriasis, skin complaints with inflammatory components, chronic inflammatory conditions, inflammatory pain and associated hyperalgesia and allodynia, neuropathic pain and associated hyperalgesia and allodynia, diabetic neuropathy pain, causalgia, sympathetically maintained pain, deafferentation syndromes, asthma, epithelial tissue damage or dysfunction, herpes simplex, disturbances of visceral motility at respiratory, genitourinary, gastrointestinal or vascular regions, wounds, burns, allergic skin reactions, pruritis, vitiligo, general gastrointestinal disorders, gastric ulceration, duodenal ulcers, diarrhea, gastric lesions induced by necrotising agents, hair growth, vasomotor or allergic rhinitis, bronchial disorders or bladder disorders.

    摘要翻译： 具有一般结构和含有它们的组合物的化合物，用于治疗急性，炎性和神经性疼痛，牙痛，一般头痛，偏头痛，丛集性头痛，混合血管和非血管综合征，紧张性头痛，一般炎症，关节炎，风湿性 疾病，骨关节炎，炎症性肠病，炎症性眼病，炎症性或不稳定性膀胱病，银屑病，皮肤炎症成分炎症，慢性炎性病症，炎性疼痛及相关的痛觉过敏和异常性疼痛，神经性疼痛及相关的痛觉过敏和异常性疼痛，糖尿病性神经病疼痛， 咳嗽痛，交感神经痛，交感综合征，哮喘，上皮组织损伤或功能障碍，单纯疱疹，呼吸道内脏运动紊乱，泌尿生殖道，胃肠道或血管区，伤口，烧伤，过敏性皮肤反应，瘙痒症，白癜风，一般胃肠道疾病， G 腹部溃疡，十二指肠溃疡，腹泻，坏死因子诱发的胃损伤，毛发生长，血管舒缩或过敏性鼻炎，支气管疾病或膀胱疾病。