摘要:
An Off Chip Driver (OCD) having a high, a low and a high impedance (Hi-Z) state. The OCD includes an up-level pre-drive, a down-level pre-drive and a driver. The driver mirrors current in the up-level pre-drive and down-level pre-drive. Both pre-drive circuits have an unbalanced input-dependant delay to quickly turn off/on the on and off driver devices and, after a delay, reduce the drive on the turned on device to a steady state level. The delay may have a fixed length set by an inverter chain or may be dependent upon output voltage.
摘要:
Off-chip driver and receiver circuits for multiple level memory applications including a voltage sensing circuit that provides an output voltage adjust signal having different voltage levels corresponding to different external voltage levels of the memory circuit. The off-chip driver circuit is connected to the voltage adjust signal and has an output signal transition slew rate that varies in response to the voltage level of the voltage adjust signal. The circuit is also connected to the voltage adjust signal and includes a filter circuit having a time constant that adjusts the noise immunity of the receiver in response to the voltage level of the voltage adjust signal.
摘要:
An analyzer for performing automated assay testing. The analyzer includes a storage and conveyor system for conveying cuvettes to an incubation or processing conveyor, a storage and selection system for test sample containers, a storage and selection system for reagent containers, sample and reagent aspirating and dispensing probes, a separation system for separating bound from unbound tracer or labeled reagent, a detection system and date collection/processing system. All of the subunits of the machine are controlled by a central processing unit to coordinate the activity of all of the subunits of the analyzer. The analyzer is specifically suited for performing heterogeneous binding assay protocols, particularly immunoassays.
摘要:
An analyzer for performing automated assay testing. The analyzer includes a storage and conveyor system for conveying cuvettes to an incubation or processing conveyor, a storage and selection system for test sample containers, a storage and selection system for reagent containers, sample and reagent aspirating and dispensing probes, a separation system for separating bound from unbound tracer or labeled reagent, a detection system and date collection/processing system. All of the subunits of the machine are controlled by a central processing unit to coordinate the activity of all of the subunits of the analyzer. The analyzer is specifically suited for performing heterogeneous binding assay protocols, particularly immunoassays.
摘要:
A telecommunications power distribution circuit board carries a fuse holder for a plurality of GMT fuses through which power is supplied to connectors on a terminal block. Power is supplied to the fuses through a distribution circuit on the board by way of bullet connectors that are attached to the circuit board and plug into holes in a power supply bus bar.
摘要:
A voltage regulating system and method are disclosed for use in an integrated circuit. The voltage regulating system can operate with a supply voltage ranging from 2.9 to 5.5 volts. The voltage regulating system includes a differential amplifier which is connected in series to a linear amplifier. The circuit contains level shifters so that the voltage regulator can operate with very low supply voltages.
摘要:
An analyzer for performing automated assay testing. The analyzer includes a storage and conveyor system for conveying cuvettes to an incubation or processing conveyor, a storage and selection system for test sample containers, a storage and selection system for reagent containers, sample and reagent aspirating and dispensing probes, a separation system for separating bound from unbound tracer or labeled reagent, a detection system and date collection/processing system. All of the sub-units of the machine are controlled by a central processing unit to coordinate the activity of all of the subunits of the analyzer. The analyzer is specifically suited for performing heterogeneous binding assay protocols, particularly immunoassays.
摘要:
An analyzer for performing automated assay testing. The analyzer includes a storage and conveyor system for conveying cuvettes to an incubation or processing conveyor, a storage and selection system for test sample containers, a storage and selection system for reagent containers, sample and reagent aspirating and dispensing probes, a separation system for separating bound from unbound tracer or labeled reagent, a detection system and date collection/processing system. All of the subunits of the machine are controlled by a central processing unit to coordinate the activity of all of the subunits of the analyzer. The analyzer is specifically suited for performing heterogeneous binding assay protocols, particularly immunoassays.
摘要:
Low power addressing systems are provided which include a given number of memory segments, each having word and bit/sense lines, a given number of decoders coupled to the given number of memory segments for selecting one word line in each of the memory segments, a first plurality of transmission gate systems, each having first and second transmission gates, with each of the gates being coupled to a different one of the decoders, a second decoder having the first plurality of outputs, each of the outputs being coupled to a respective one of the transmission gate systems, first control circuits for selectively activating the first and second gates in each of the first plurality of transmission gate systems, a second given number of decoders coupled to the given number of memory segments for selecting one bit/sense line in each of the memory segments, a second plurality of transmission gate systems, each having first and second transmission gates, with each of the gates of the second plurality of transmission gate systems being coupled to a different one of the second given number of decoders, and second control circuits for selectively activating the first and second gates of each of the second plurality of transmission gate systems.