公开(公告)号：US20150061088A1

公开(公告)日：2015-03-05

申请号：US14207880

申请日：2014-03-13

申请人： Dong-soo LEE ,  Myoung-Jae LEE ,  Seong-ho CHO ,  Mohammad Rakib Uddin ,  David SEO ,  Moon-seung YANG ,  Sang-moon LEE ,  Sung-hun LEE ,  Ji-hyun HUR ,  Eui-chul HWANG

发明人： Dong-soo LEE ,  Myoung-Jae LEE ,  Seong-ho CHO ,  Mohammad Rakib Uddin ,  David SEO ,  Moon-seung YANG ,  Sang-moon LEE ,  Sung-hun LEE ,  Ji-hyun HUR ,  Eui-chul HWANG

IPC分类号： H01L29/20 ,  H01L21/322

CPC分类号： H01L29/34 ,  H01L21/02175 ,  H01L21/02189 ,  H01L21/02192 ,  H01L21/022 ,  H01L21/02304 ,  H01L21/28158 ,  H01L21/28264 ,  H01L21/322 ,  H01L21/3228 ,  H01L29/20 ,  H01L29/2003 ,  H01L29/24 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66522 ,  H01L29/7851

摘要： The present disclosure relates to a semiconductor device including an oxygen gettering layer between a group III-V compound semiconductor layer and a dielectric layer, and a method of fabricating the semiconductor device. The semiconductor device may include a compound semiconductor layer; a dielectric layer disposed on the compound semiconductor layer; and an oxygen gettering layer interposed between the compound semiconductor layer and the dielectric layer. The oxygen gettering layer includes a material having a higher oxygen affinity than a material of the compound semiconductor layer.

摘要翻译： 本公开内容涉及包括III-V族化合物半导体层和电介质层之间的吸氧层的半导体器件以及制造该半导体器件的方法。 半导体器件可以包括化合物半导体层; 设置在所述化合物半导体层上的电介质层; 以及置于化合物半导体层和电介质层之间的吸氧层。 吸氧层包括具有比化合物半导体层的材料更高的氧亲合力的材料。

公开(公告)号：US20160172450A1

公开(公告)日：2016-06-16

申请号：US15050867

申请日：2016-02-23

申请人： Dong-soo LEE ,  Myoung-jae LEE ,  Seong-ho CHO ,  Mohammad Rakib UDDIN ,  David SEO ,  Moon-seung YANG ,  Sang-moon LEE ,  Sung-hun LEE ,  Ji-hyun HUR ,  Eui-chul HWANG

发明人： Dong-soo LEE ,  Myoung-jae LEE ,  Seong-ho CHO ,  Mohammad Rakib UDDIN ,  David SEO ,  Moon-seung YANG ,  Sang-moon LEE ,  Sung-hun LEE ,  Ji-hyun HUR ,  Eui-chul HWANG

IPC分类号： H01L29/34 ,  H01L21/322

CPC分类号： H01L29/34 ,  H01L21/02175 ,  H01L21/02189 ,  H01L21/02192 ,  H01L21/022 ,  H01L21/02304 ,  H01L21/28158 ,  H01L21/28264 ,  H01L21/322 ,  H01L21/3228 ,  H01L29/20 ,  H01L29/2003 ,  H01L29/24 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66522 ,  H01L29/7851

摘要： The present disclosure relates to a semiconductor device including an oxygen gettering layer between a group III-V compound semiconductor layer and a dielectric layer, and a method of fabricating the semiconductor device. The semiconductor device may include a compound semiconductor layer; a dielectric layer disposed on the compound semiconductor layer; and an oxygen gettering layer interposed between the compound semiconductor layer and the dielectric layer. The oxygen gettering layer includes a material having a higher oxygen affinity than a material of the compound semiconductor layer.

公开(公告)号：US20130051125A1

公开(公告)日：2013-02-28

申请号：US13590978

申请日：2012-08-21

申请人： Man CHANG ,  Young-bae KIM ,  Chang-jung KIM ,  Myoung-jae LEE ,  Seong-jun PARK ,  Ji-hyun HUR ,  Dong-soo LEE ,  Chang-bum LEE ,  Seung-ryul LEE

发明人： Man CHANG ,  Young-bae KIM ,  Chang-jung KIM ,  Myoung-jae LEE ,  Seong-jun PARK ,  Ji-hyun HUR ,  Dong-soo LEE ,  Chang-bum LEE ,  Seung-ryul LEE

IPC分类号： G11C11/00

CPC分类号： G11C13/0007 ,  G11C11/5685 ,  G11C13/00 ,  G11C13/0064 ,  G11C13/0069 ,  G11C29/021 ,  G11C29/028 ,  G11C2013/0073 ,  G11C2013/0076 ,  G11C2213/56

摘要： According to an example embodiment, a method of operating a semiconductor device having a variable resistance device includes: applying a first voltage to the variable resistance device to change a resistance value of the variable resistance device from a first resistance value to a second resistance value that is different from the first resistance value; sensing a first current flowing through the variable resistance device to which the first voltage is applied; determining a second voltage used for changing the variable resistance device from the second resistance value to the first resistance value, based on a dispersion of the sensed first current; and applying the determined second voltage to the variable resistance device.

摘要翻译： 根据示例性实施例，一种操作具有可变电阻器件的半导体器件的方法包括：向可变电阻器件施加第一电压以将可变电阻器件的电阻值从第一电阻值改变为第二电阻值， 与第一电阻值不同; 感测流过施加有第一电压的可变电阻装置的第一电流; 基于感测到的第一电流的偏差，确定用于将可变电阻器件从第二电阻值改变为第一电阻值的第二电压; 以及将所确定的第二电压施加到所述可变电阻装置。

公开(公告)号：US20120161821A1

公开(公告)日：2012-06-28

申请号：US13313720

申请日：2011-12-07

申请人： Man CHANG ,  Young-bae KIM ,  Chang-jung KIM ,  Myoung-jae LEE ,  Ji-hyun HUR ,  Dong-soo LEE ,  Chang-bum LEE ,  Seung-ryul LEE

发明人： Man CHANG ,  Young-bae KIM ,  Chang-jung KIM ,  Myoung-jae LEE ,  Ji-hyun HUR ,  Dong-soo LEE ,  Chang-bum LEE ,  Seung-ryul LEE

IPC分类号： H03B1/00 ,  H01C7/10

CPC分类号： G11C13/0069 ,  G11C11/5685 ,  G11C13/0064 ,  G11C2013/0073

摘要： A method of operating a semiconductor device that includes a variable resistance device, the method including applying a first voltage to the variable resistance device so as to change a resistance value of the variable resistance device from a first resistance value to a second resistance value that is different from the first resistance value; sensing first current flowing through the variable resistance device to which the first voltage is applied; determining whether the first current falls within a predetermined range of current; and if the first current does not fall within the first range of current, applying an additional first voltage that is equal to the first voltage to the variable resistance device.

摘要翻译： 一种操作包括可变电阻器件的半导体器件的方法，所述方法包括向可变电阻器件施加第一电压以便将可变电阻器件的电阻值从第一电阻值改变为第二电阻值，该第二电阻值是 不同于第一个电阻值; 感测流过施加有第一电压的可变电阻装置的第一电流; 确定第一电流是否落在预定的电流范围内; 并且如果所述第一电流不在所述第一电流范围内，则向所述可变电阻装置施加等于所述第一电压的附加第一电压。

公开(公告)号：US20130320286A1

公开(公告)日：2013-12-05

申请号：US13905822

申请日：2013-05-30

申请人： Dong-soo LEE ,  Myoung-jae LEE ,  U-in CHUNG

发明人： Dong-soo LEE ,  Myoung-jae LEE ,  U-in CHUNG

IPC分类号： H01L45/00

CPC分类号： H01L45/145 ,  H01L27/2427 ,  H01L27/2481 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/14 ,  H01L45/146 ,  H01L45/1625 ,  H01L45/1641

摘要： A switching element includes: a first electrode; a second electrode; and a silicon-containing chalconitride layer between the first electrode and the second electrode. A switching device includes: a threshold switch material layer between a first electrode and a second electrode. The threshold switch material layer includes a cationic metal element, a chalcogen element, a silicon element and a nitrogen element. A memory device include: a plurality of first wirings arranged in parallel with each other; a plurality of second wirings crossing the first wirings, and arranged in parallel with each other; and a memory cell formed at each intersection of the plurality of first wirings and the plurality of second wirings. The memory cell includes a laminate having a silicon-containing chalconitride layer, an intermediate electrode, and a memory layer.

摘要翻译： 开关元件包括：第一电极; 第二电极; 以及在所述第一电极和所述第二电极之间的含硅的仲氮化物层。 开关装置包括：第一电极和第二电极之间的阈值开关材料层。 阈值开关材料层包括阳离子金属元素，硫属元素，硅元素和氮元素。 存储器件包括：彼此平行布置的多个第一布线; 多个第二布线，穿过第一配线，彼此平行布置; 以及形成在所述多个第一布线和所述多个第二布线的每个交叉点处的存储单元。 存储单元包括具有含硅的恰氮氮化物层，中间电极和存储层的层压体。

公开(公告)号：US20100135666A1

公开(公告)日：2010-06-03

申请号：US12611466

申请日：2009-11-03

申请人： Jong-deog KIM ,  Bong-kyu KIM ,  Quan LE ,  Kwang-ok KIM ,  Dong-soo LEE

发明人： Jong-deog KIM ,  Bong-kyu KIM ,  Quan LE ,  Kwang-ok KIM ,  Dong-soo LEE

IPC分类号： H04J14/08 ,  H04J14/00 ,  H04L7/00

CPC分类号： H04L7/0338 ,  H04L7/04

摘要： Disclosed is a clock phase aligning apparatus capable of synchronizing a clock signal in the middle of an upstream burst mode data bit in an optical line terminal of a passive optical network. The clock phase aligning apparatus effectively aligns a phase of a clock signal with a phase of data during an overhead period of burst mode packet data through an over-sampling scheme and a digital scheme. Burst mode data signals are subject to an over-sampling through a high speed continuous mode analog circuit and then converted into low speed parallel signals through a parallel conversion unit. Such low speed parallel signals are processed with respect to sampling patterns through a digital look-up scheme in a logic circuit device such that the phase of data is arranged with the phase of a clock signal during a limited bit stream specified in a burst mode preamble timing.

摘要翻译： 公开了一种能够使无源光网络的光线路终端中的上行脉冲串模式数据位的中间的时钟信号同步的时钟相位对准装置。 时钟相位对准装置通过过采样方案和数字方案，在突发模式分组数据的开销周期期间有效地将时钟信号的相位与数据相位对准。 突发模式数据信号通过高速连续模式模拟电路进行过采样，然后通过并行转换单元转换为低速并行信号。 通过逻辑电路设备中的数字查找方案，对采样模式进行这种低速并行信号的处理，使得数据相位在脉冲串前导码中指定的有限位流期间以时钟信号的相位排列 定时。

公开(公告)号：US20080008612A1

公开(公告)日：2008-01-10

申请号：US11428849

申请日：2006-07-06

申请人： Seung-yup KIM ,  Hyo-keun PARK ,  Dong-soo LEE ,  Jeong-hwan SUH

发明人： Seung-yup KIM ,  Hyo-keun PARK ,  Dong-soo LEE ,  Jeong-hwan SUH

IPC分类号： F01C1/02 ,  F01N7/00 ,  F01N1/08

CPC分类号： F04C18/0215 ,  F04C23/008 ,  F04C29/065 ,  F04C29/068

摘要： Disclosed herein is a muffler of a scroll compressor. The muffler includes a first muffler having a pair of chambers defined above an outlet of a fixed scroll to communicate with the outlet and a gas passage hole formed at the center of an upper end thereof, and a second muffler located around the first muffler to be spaced apart from the gas passage hole of the first muffler and having a chamber including one or more guidance paths of the fixed scroll. The muffler can achieve reduction of operational noise, sufficient separation of oil contained in discharge gas, and efficient isolation between a discharge pressure inside the muffler and outside suction pressure.

摘要翻译： 本文公开了涡旋压缩机的消音器。 消声器包括：第一消声器，其具有限定在与出口连通的固定涡旋件的出口上方的一对室，以及形成在其上端中心的气体通道孔，以及位于第一消声器周围的第二消声器， 与第一消音器的气体通道孔间隔开并且具有包括固定涡旋件的一个或多个引导路径的腔室。 消音器可以实现操作噪音的降低，放电气体中所含的油的充分分离，以及消声器内部的排出压力与外部吸入压力之间的有效隔离。

公开(公告)号：US20080177918A1

公开(公告)日：2008-07-24

申请号：US11767546

申请日：2007-06-25

申请人： Dong-soo LEE ,  Ki-mo KIM

发明人： Dong-soo LEE ,  Ki-mo KIM

IPC分类号： G06F13/00

CPC分类号： G06F13/4291

摘要： A method and apparatus for controlling the timing of a state transition of a serial data line (SDA) in an I2C controller are provided. The apparatus includes a processor, a serial clock line (SCL) edge detector, a counter, and an SDA generator. The processor controls an I2C controller. The SCL edge detector detects an edge of a clock signal of an SCL. The counter counts a hold time of the state transition of the SDA if a falling edge of the clock signal of the SCL is detected by the SCL edge detector. The SDA generator transits the state of the SDA if the count of the hold time is finished. Therefore, a malfunction in an I2C communication can be prevented without using a compensation circuit requiring a lot of time and cost.

摘要翻译： 提供了一种用于控制I2C控制器中的串行数据线（SDA）的状态转换的定时的方法和装置。 该装置包括处理器，串行时钟线（SCL）边缘检测器，计数器和SDA发生器。 处理器控制I2C控制器。 SCL边沿检测器检测到SCL的时钟信号的边沿。 如果SCL边沿检测器检测到SCL的时钟信号的下降沿，则计数器计数SDA的状态转换的保持时间。 如果保持时间的计数结束，SDA生成器将转换SDA的状态。 因此，可以防止I2C通信中的故障，而无需使用需要大量时间和成本的补偿电路。

公开(公告)号：US20080109571A1

公开(公告)日：2008-05-08

申请号：US11755021

申请日：2007-05-30

申请人： Dong-soo LEE ,  Byong-woong PARK

发明人： Dong-soo LEE ,  Byong-woong PARK

IPC分类号： G06F13/28

CPC分类号： G06F13/28

摘要： A direct memory access controlling method includes checking a length value of remaining data corresponding to data remaining after transmission of the data stored in the source memory to the destination memory, and a currently set burst length value, comparing the length value of the remaining data with the currently set burst length value based on a result of the checking, and selectively changing the currently set burst length value based on a result of the comparing, and transmitting data to the destination memory.

摘要翻译： 一种直接存储器访问控制方法，包括检查对应于在存储在源存储器中的数据发送到目的地存储器之后剩余的剩余数据的长度值，以及当前设置的突发长度值，将剩余数据的长度值与 基于检查结果的当前设置的突发长度值，并且基于比较的结果选择性地改变当前设置的突发长度值，并将数据发送到目的地存储器。

公开(公告)号：US20160315165A1

公开(公告)日：2016-10-27

申请号：US14955205

申请日：2015-12-01

申请人： Dong-soo LEE ,  Hu-yong LEE ,  Won-keun CHUNG ,  Hoon-joo NA ,  Taek-soo JEON ,  Sang-jin HYUN

发明人： Dong-soo LEE ,  Hu-yong LEE ,  Won-keun CHUNG ,  Hoon-joo NA ,  Taek-soo JEON ,  Sang-jin HYUN

IPC分类号： H01L29/51 ,  H01L29/78 ,  H01L27/092

CPC分类号： H01L29/512 ,  B82Y10/00 ,  H01L21/28185 ,  H01L21/823456 ,  H01L21/823842 ,  H01L27/088 ,  H01L27/0886 ,  H01L27/092 ,  H01L27/0924 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/42364 ,  H01L29/42392 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/775 ,  H01L29/785

摘要： An integrated circuit device includes a substrate including an active region, an interfacial layer including a lower insulating layer on the active region, the lower insulating layer doped with a chalcogen element having an atomic weight equal to or greater than 16, a gate insulation layer on the interfacial layer, and a gate electrode on the gate insulation layer.

摘要翻译： 一种集成电路器件包括：衬底，其包括有源区，界面层包括有源区上的下绝缘层，所述下绝缘层掺杂有原子量等于或大于16的硫属元素;栅绝缘层， 界面层和栅极绝缘层上的栅电极。