公开(公告)号：US20130042472A1

公开(公告)日：2013-02-21

申请号：US13617694

申请日：2012-09-14

申请人： Doo-Hwan LEE ,  Byoung-Youl MIN ,  Myung-Sam KANG ,  Moon-II KIM ,  Hyung-Tae KIM

发明人： Doo-Hwan LEE ,  Byoung-Youl MIN ,  Myung-Sam KANG ,  Moon-II KIM ,  Hyung-Tae KIM

IPC分类号： H05K3/30

CPC分类号： H05K1/185 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/24 ,  H01L24/32 ,  H01L24/83 ,  H01L25/0657 ,  H01L2224/04105 ,  H01L2224/20 ,  H01L2224/24227 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/8385 ,  H01L2224/92 ,  H01L2224/92244 ,  H01L2225/06524 ,  H01L2225/06589 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/351 ,  H01L2924/3511 ,  H05K1/056 ,  H05K3/4608 ,  H05K2201/10515 ,  Y10T29/4913 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/00

摘要： A method of manufacturing a printed circuit board having embedded electronic components, the method including: mounting a first electronic component on one side of a core sheet and mounting a second electric component on the other side of the core sheet such that the second electronic component overlaps the first electronic component; stacking a first insulation layer on one side of the core sheet such that the first insulation layer covers the first electronic component and stacking a second insulation layer on the other side of the core sheet such that the second insulation layer covers the second electronic component; and forming a circuit pattern on a surface of the first insulation layer or the second insulation layer.

摘要翻译： 一种制造具有嵌入式电子部件的印刷电路板的方法，所述方法包括：将第一电子部件安装在芯片的一侧，并将第二电气部件安装在芯板的另一侧，使得第二电子部件重叠 第一个电子元件; 在芯片的一侧堆叠第一绝缘层，使得第一绝缘层覆盖第一电子部件，并且在芯片的另一侧堆叠第二绝缘层，使得第二绝缘层覆盖第二电子部件; 以及在所述第一绝缘层或所述第二绝缘层的表面上形成电路图案。

公开(公告)号：US20100018633A1

公开(公告)日：2010-01-28

申请号：US12408366

申请日：2009-03-20

申请人： Myung-Sam KANG ,  Jung-Hyun PARK ,  Jeong-Woo PARK ,  Ji-Eun KIM

发明人： Myung-Sam KANG ,  Jung-Hyun PARK ,  Jeong-Woo PARK ,  Ji-Eun KIM

IPC分类号： B32B37/00

CPC分类号： B32B38/04 ,  B32B38/10 ,  B32B2038/0092 ,  B32B2038/047 ,  B32B2309/105 ,  B32B2310/0843 ,  B32B2457/08 ,  H05K3/0035 ,  H05K3/108 ,  H05K3/421 ,  H05K3/428 ,  H05K3/4652 ,  H05K2201/0376 ,  H05K2203/0384 ,  H05K2203/0554 ,  Y10T156/1056 ,  Y10T156/1057 ,  Y10T156/1064 ,  Y10T156/1082

摘要： Disclosed is a method of manufacturing a printed circuit board. The method of manufacturing a printed circuit board having a via for connecting one layer to another layer can include forming a circuit pattern on one surface of a carrier; processing a hole corresponding to the via on one surface of the carrier; compressing the surface of the carrier into one surface of an insulation body; removing the carrier; processing a via hole on the insulation body, corresponding to a position of the hole; and forming a conductive material in the via hole, to thereby easily process a hole for forming a via and have high design freedom

摘要翻译： 公开了印刷电路板的制造方法。 制造具有用于将一层连接到另一层的通路的印刷电路板的制造方法可以包括在载体的一个表面上形成电路图案; 在载体的一个表面上处理与通孔对应的孔; 将载体的表面压缩到绝缘体的一个表面中; 移除载体; 处理绝缘体上的通孔，对应于孔的位置; 并且在通孔中形成导电材料，从而容易地加工用于形成通孔的孔，并且具有高的设计自由度

公开(公告)号：US20120192417A1

公开(公告)日：2012-08-02

申请号：US13424676

申请日：2012-03-20

申请人： Myung-Sam KANG

发明人： Myung-Sam KANG

IPC分类号： H01K3/10

CPC分类号： H05K3/0035 ,  B32B15/14 ,  B32B15/20 ,  B32B2038/0076 ,  B32B2250/40 ,  B32B2255/06 ,  B32B2255/205 ,  B32B2260/021 ,  B32B2260/046 ,  B32B2262/101 ,  B32B2305/076 ,  B32B2311/00 ,  B32B2457/00 ,  B32B2535/00 ,  C25D5/12 ,  C25D5/48 ,  H05K3/0038 ,  H05K3/025 ,  H05K3/421 ,  H05K3/427 ,  H05K2201/0394 ,  H05K2203/0361 ,  H05K2203/1388 ,  Y10T29/49165 ,  Y10T428/1275 ,  Y10T428/12778

摘要： A method for manufacturing a printed circuit board having a via-on-pad (VOP) structure, the method including: preparing an insulator and a metal clad laminate, the laminate having a metal foil and a barrier layer successively formed on the insulator; processing a via hole in the insulator from an upper surface of the insulator, a bottom of the via hole being shielded by the metal foil; removing the barrier layer so as to expose a surface of the metal foil; forming a seed layer of the metal foil and in the via hole; forming a patterned plating resist on upper and lower surfaces of the laminate, a portion of the metal foil, which shields the bottom of the via hole, and a top of the via hole being open; and forming a via inside the via hole, and forming a pad on a lower side of the via.

摘要翻译： 一种用于制造具有通孔焊接（VOP）结构的印刷电路板的方法，所述方法包括：制备绝缘体和覆金属层压板，所述层压体具有依次形成在所述绝缘体上的金属箔和阻挡层; 在绝缘体的上表面处理绝缘体中的通孔，通孔的底部被金属箔屏蔽; 去除所述阻挡层以暴露所述金属箔的表面; 在所述通孔中形成所述金属箔的种子层; 在层叠体的上表面和下表面上形成图案化的电镀抗蚀剂，金属箔的一部分，其屏蔽通孔的底部，并且通孔的顶部是打开的; 以及在通孔内形成通孔，并且在通孔的下侧形成垫。

公开(公告)号：US20090321387A1

公开(公告)日：2009-12-31

申请号：US12273961

申请日：2008-11-19

申请人： Myung-Sam KANG

发明人： Myung-Sam KANG

IPC分类号： B44C1/22

CPC分类号： H05K3/421 ,  H05K3/0035 ,  H05K3/108 ,  H05K3/427 ,  H05K3/4652 ,  H05K2201/0341 ,  H05K2201/0394 ,  H05K2201/09563 ,  H05K2203/0361 ,  H05K2203/0384 ,  H05K2203/1388

摘要： Disclosed is a manufacturing method of a printed circuit board. The method in accordance with an embodiment of the present invention includes: providing a laminated substrate having an insulator as well as a first metal layer and a second metal layer, which are sequentially laminated on one side of the insulator; processing a via hole in the laminated substrate; forming a seed layer on an inner wall of the via hole and on a surface of the second metal layer; plating an inside of the via hole and the surface of the second metal layer with a conductive material that is different from a material of the second metal layer; etching the seed layer and the conductive material, formed on the second metal layer; etching the second metal layer; and forming a first circuit pattern by selectively etching the first metal layer.

摘要翻译： 公开了一种印刷电路板的制造方法。 根据本发明的实施例的方法包括：提供具有绝缘体的层叠基板以及依次层压在绝缘体的一侧上的第一金属层和第二金属层; 处理层压基板中的通孔; 在所述通孔的内壁上和所述第二金属层的表面上形成种子层; 用与第二金属层的材料不同的导电材料电镀通孔内表面和第二金属层表面; 蚀刻形成在第二金属层上的种子层和导电材料; 蚀刻第二金属层; 以及通过选择性地蚀刻所述第一金属层来形成第一电路图案。