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    Hybrid open folded sense amplifier architecture for a memory device
    1.
    发明授权
    Hybrid open folded sense amplifier architecture for a memory device 失效
    用于存储器件的混合开放式折叠式放大器架构

    公开(公告)号：US5276641A

    公开(公告)日：1994-01-04

    申请号：US806027

    申请日：1991-12-12

    Applicant: Edmund J. Sprogis ,  Hing Wong

    Inventor： Edmund J. Sprogis ,  Hing Wong

    IPC: G11C11/401 ,  G11C11/4096 ,  G11C11/4097 ,  G11C13/00

    CPC classification number: G11C11/4097 ,  G11C11/4096

    Abstract: A hybrid open/folded bit line sense amplifier arrangement and accompanying circuitry primarily for use on a ULSI DRAM memory chip to reduce the area needed for a memory cell and eliminate noise between bit lines. The circuitry includes two memory arrays containing a plurality of memory cells interconnected by a plurality of bit lines and word lines. In the preferred embodiment, the memory cells are accessible on every two out of three bit lines encountered by a word line. A set of open bit line sense amplifiers each with two connectors, one multiplexed to a number of bit lines in the first array and the other multiplexed to a number of bit lines in the second array is provided. Each memory array has a set of folded bit line sense amplifiers with two connectors each connector multiplexed to a number of bit lines in the array. The control circuitry with multiplexing ensures that the connectors of the sense amplifiers access only one bit lines at a time. The accessed by the connectors of each folded line sense amplifier are non-adjacent and simultaneously therewith, a connector of an open bit sense amplifier accesses a bit line between the bit lines accessed by the folded sense amplifier. In the preferred embodiment each connector of a sense amplifier is multiplexed to three bit lines. In a second version the connectors are multiplexed to two bit lines.

    Abstract translation: 混合的开/折位线读出放大器装置和主要用于ULSI DRAM存储器芯片的相关电路，以减少存储器单元所需的面积并消除位线之间的噪声。 电路包括两个存储器阵列，其包含由多个位线和字线互连的多个存储器单元。 在优选实施例中，存储器单元可以通过字线遇到的三个位线中的每两个进行访问。 提供了一组开放位线读出放大器，每个具有两个连接器，一个复用到第一阵列中的多个位线，另一个复用到第二阵列中的多个位线。 每个存储器阵列具有一组具有两个连接器的折叠位线读出放大器，每个连接器被多路复用到阵列中的多个位线。 具有复用的控制电路确保了读出放大器的连接器一次仅访问一个位线。 由每个折叠线检测放大器的连接器访问的是不相邻的，并且同时，开放位读出放大器的连接器访问由折叠读出放大器访问的位线之间的位线。 在优选实施例中，读出放大器的每个连接器被复用到三个位线。 在第二个版本中，连接器被复用到两个位线。

    Stacked electrical device having regions of electrical isolation and electrical connections on a given stack level
    3.
    发明授权
    Stacked electrical device having regions of electrical isolation and electrical connections on a given stack level 失效
    在给定的堆叠级上具有电隔离和电连接区域的堆叠式电气设备

    公开(公告)号：US5804853A

    公开(公告)日：1998-09-08

    申请号：US686881

    申请日：1996-07-26

    Applicant: John Edward Cronin ,  John Kenneth DeBrosse ,  Hing Wong

    Inventor： John Edward Cronin ,  John Kenneth DeBrosse ,  Hing Wong

    IPC: H01L21/768 ,  H01L21/8242 ,  H01L27/108

    CPC classification number: H01L27/10852 ,  H01L27/10808 ,  H01L2924/0002

    Abstract: A semiconductor structure having electrical conductors positioned over each other, but electrically isolated from each other, is disclosed. The lower conductor has a recess in its upper surface, and the recess is at least partially filled with an oxide-type material, thereby isolating the lower conductor from the upper conductor. These conductors would normally contact each other because of the somewhat imprecise patterning and etching steps used to fabricate a multitude of conductive elements, e.g., in a very dense semiconductor structure. Stacked capacitor cells incorporating this structure are also disclosed.

    Abstract translation: 公开了一种半导体结构，其具有彼此相互定位但彼此电隔离的电导体。 下导体在其上表面具有凹槽，并且凹部至少部分地填充有氧化物型材料，从而将下导体与上导体隔离。 这些导体通常彼此接触，因为用于制造多个导电元件（例如非常致密的半导体结构）的图案化和蚀刻步骤有些不精确。 还公开了结合该结构的堆叠电容器电池。

    Row redundancy block architecture
    4.
    发明授权
    Row redundancy block architecture 失效
    行冗余块架构

    公开(公告)号：US5691946A

    公开(公告)日：1997-11-25

    申请号：US758783

    申请日：1996-12-03

    Applicant: John DeBrosse ,  Toshiaki Kirihata ,  Hing Wong

    Inventor： John DeBrosse ,  Toshiaki Kirihata ,  Hing Wong

    IPC: G11C11/401 ,  G11C29/00 ,  G11C29/04 ,  H01L21/8242 ,  H01L27/108 ,  G11C5/06

    CPC classification number: G11C29/80 ,  G11C29/808 ,  G11C29/84

    Abstract: Row redundancy control circuits which effectively reduce design space are arranged parallel to word direction and are arranged at the bottom of the redundancy block. This architecture change makes it possible to effectively lay out the redundancy control block by introducing (1) split-global-bus shared with local row redundancy wires, (2) half-length-one-way row redundancy-wordline-enable-signal wires which allows space saving, and (3) distributed wordline enable decoders designed to take advantage of the saved space. An illegal normal/redundancy access problem caused by the address versus timing skew has also been solved. The timing necessary for this detection is given locally by using its adjacent redundancy match detection. This allows the circuit to operate completely as an address driven circuit, resulting in fast and reliable redundancy match detection. In addition, a sample wordline enable signal (SWLE) is generated by using row redundancy match detection. One two-input OR gate allows the time at which SWLE sets sample wordline (SWL) to be the same as the time at which wordline enable (WLE) signal sets wordline (WL). The time at which SWLE sets SWL remains consistent regardless of mode, eliminating the existing reliability concern. This two-input OR gate combined with row redundancy match detection works as an ideal sample wordline enable generator.

    Abstract translation: 有效减少设计空间的行冗余控制电路与字方向平行排列，并配置在冗余块的底部。 通过引入（1）与本地行冗余线共享的分裂全局总线，（2）半长度单向行冗余字线使能信号线，可以有效地布置冗余控制块 这允许节省空间，以及（3）分布式字线使能解码器被设计为利用节省的空间。 由地址与时序偏差引起的非法正常/冗余访问问题也已解决。 通过使用其相邻的冗余匹配检测在本地给出该检测所需的定时。 这允许电路作为地址驱动电路完全操作，导致快速可靠的冗余匹配检测。 此外，通过使用行冗余匹配检测来生成采样字线使能信号（SWLE）。 一个双输入或门允许SWLE设置采样字线（SWL）的时间与字线使能（WLE）信号设置字线（WL）的时间相同。 无论模式如何，SWLE设置SWL的时间保持一致，从而消除了现有的可靠性问题。 该双输入OR门与行冗余匹配检测相结合，可作为理想的采样字线使能发生器。

    Humanized and chimeric antibodies specific for lipoteichoic acid of gram positive bacteria
    6.
    发明申请
    Humanized and chimeric antibodies specific for lipoteichoic acid of gram positive bacteria 失效
    对革兰氏阳性菌的脂磷壁酸具有特异性的人源化和嵌合抗体

    公开(公告)号：US20100221822A1

    公开(公告)日：2010-09-02

    申请号：US12317718

    申请日：2008-12-23

    Applicant: Gerald W. Fischer ,  Richard F. Schuman ,  Hing Wong ,  Jeffrey R. Stinson

    Inventor： Gerald W. Fischer ,  Richard F. Schuman ,  Hing Wong ,  Jeffrey R. Stinson

    IPC: C12N5/10 ,  C07H21/04 ,  C12N15/62

    CPC classification number: C07K14/195 ,  A61K38/00 ,  A61K39/00 ,  A61K2039/505 ,  C07K16/1267 ,  C07K16/1271 ,  C07K2317/24 ,  C07K2317/33 ,  C07K2317/34 ,  C07K2317/73 ,  C07K2317/77 ,  C07K2319/00

    Abstract: The present invention encompasses monoclonal and chimeric antibodies that bind to lipoteichoic acid of Gram positive bacteria. The antibodies also bind to whole bacteria and enhance phagocytosis and killing of the bacteria in vitro and enhance protection from lethal infection in vivo. The mouse monoclonal antibody has been humanized and the resulting chimeric antibody provides a previously unknown means to diagnose, prevent and/or treat infections caused by gram positive bacteria bearing lipoteichoic acid. This invention also encompasses a peptide mimic of the lipoteichoic acid epitope binding site defined by the monoclonal antibody. This epitope or epitope peptide mimic identifies other antibodies that may bind to the lipoteichoic acid epitope. Moreover, the epitope or epitope peptide mimic provides a valuable substrate for the generation of vaccines or other therapeutics.

    Abstract translation: 本发明包括与革兰氏阳性细菌的脂磷壁酸结合的单克隆抗体和嵌合抗体。 抗体还结合全细菌，增强体外吞噬细菌和杀死细菌，增强体内致死感染的保护作用。 小鼠单克隆抗体已经人源化，所得到的嵌合抗体提供了以前未知的用于诊断，预防和/或治疗由具有脂磷壁酸的革兰氏阳性细菌引起的感染的方法。 本发明还包括由单克隆抗体限定的脂磷壁酸结合位点的肽模拟物。 该表位或表位肽模拟物鉴定可结合脂磷壁酸表位的其它抗体。 此外，表位或表位肽模拟物为生成疫苗或其他治疗剂提供了有价值的底物。

    HUMANIZED MONOCLONAL ANTIBODIES THAT PROTECT AGAINST SHIGA TOXIN INDUCED DISEASE
    7.
    发明申请
    HUMANIZED MONOCLONAL ANTIBODIES THAT PROTECT AGAINST SHIGA TOXIN INDUCED DISEASE 审中-公开
    保护针对SHIGA诱导性疾病的人类单克隆抗体

    公开(公告)号：US20100189715A1

    公开(公告)日：2010-07-29

    申请号：US12536940

    申请日：2009-08-06

    Applicant: Jeffrey R. Stinson ,  Hing Wong ,  Alison D. O'Brien ,  Clare K. Schmitt ,  Angela Melton-Celsa

    Inventor： Jeffrey R. Stinson ,  Hing Wong ,  Alison D. O'Brien ,  Clare K. Schmitt ,  Angela Melton-Celsa

    IPC: A61K39/395 ,  A61P31/04

    CPC classification number: C07K16/1232 ,  A61K38/00 ,  C07K2317/24 ,  C07K2319/00

    Abstract: The present invention describes the preparation and use of biologically and immunologically active humanized monoclonal antibodies to Shiga toxin, a toxin associated with HC and the potentially life-threatening sequela HUS transmitted by strains of pathogenic bacteria. The present invention describes how these humanized antibodies may be used in the treatment or prevention of Shiga toxin induced diseases. One aspect of the invention is the humanized monoclonal antibody which binds Shiga toxin where the constant regions are IgG1-kappa and the variable regions are murine in origin. Yet another aspect of the invention is expression vectors and host cells transformed with such vectors which express the humanized monoclonal antibodies of the present invention.

    Abstract translation: 本发明描述了生物学和免疫学活性的人源化单克隆抗体与志贺毒素（一种与HC相关的毒素）和潜在的危及生命的后遗症HUS由病原菌菌株传播的制备和应用。 本发明描述了这些人源化抗体如何用于治疗或预防志贺毒素诱导的疾病。 本发明的一个方面是结合志贺毒素的人源化单克隆抗体，其中恒定区是IgG1-κ，可变区是起源的鼠。 本发明的另一方面是用表达本发明的人源化单克隆抗体的载体转化的表达载体和宿主细胞。

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