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公开(公告)号:US20140203444A1
公开(公告)日:2014-07-24
申请号:US14225923
申请日:2014-03-26
申请人: FUJITSU LIMITED
IPC分类号: H01L23/48
CPC分类号: H01L23/48 , H01L23/3128 , H01L24/29 , H01L24/32 , H01L24/83 , H01L2224/04026 , H01L2224/05005 , H01L2224/05082 , H01L2224/05155 , H01L2224/05166 , H01L2224/05169 , H01L2224/05541 , H01L2224/05573 , H01L2224/05644 , H01L2224/0603 , H01L2224/26175 , H01L2224/2745 , H01L2224/2746 , H01L2224/29019 , H01L2224/29036 , H01L2224/29109 , H01L2224/29111 , H01L2224/29113 , H01L2224/2912 , H01L2224/29139 , H01L2224/29144 , H01L2224/29147 , H01L2224/29155 , H01L2224/2919 , H01L2224/2929 , H01L2224/29339 , H01L2224/29499 , H01L2224/32225 , H01L2224/32245 , H01L2224/325 , H01L2224/32502 , H01L2224/32506 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48245 , H01L2224/48247 , H01L2224/48644 , H01L2224/48744 , H01L2224/4903 , H01L2224/73265 , H01L2224/83193 , H01L2224/83194 , H01L2224/83801 , H01L2224/83851 , H01L2924/00013 , H01L2924/01029 , H01L2924/01322 , H01L2924/13064 , H01L2924/15311 , H01L2924/181 , H01L2224/83439 , H01L2924/00014 , H01L2924/00012 , H01L2924/0132 , H01L2924/01047 , H01L2924/0105 , H01L2924/0665 , H01L2224/13099 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2924/00
摘要: A manufacturing of a semiconductor device includes forming one of a layer with a first metal and the layer with a second metal on one of a semiconductor chip mounting area of a support plate and a back surface of the semiconductor chip; forming the other of the layer with the first metal and the layer with the second metal on an area corresponding to a part of the area, in which one of the layer with the first metal and the layer with the second metal, of the other one of the semiconductor chip mounting area and the back surface of the semiconductor chip; and forming a layer which includes an alloy with the first metal and the second metal after positioning the semiconductor chip in the semiconductor chip mounting area to bond the semiconductor chip with the semiconductor chip mounting area.
摘要翻译: 半导体器件的制造包括在支撑板的半导体芯片安装区域和半导体芯片的后表面中的一个上形成具有第一金属的层和具有第二金属的层; 在第一金属层和第二金属层之间形成与第一金属层和第二金属层之间的一个区域对应的区域的另一层 的半导体芯片安装区域和半导体芯片的背面; 以及在将所述半导体芯片定位在所述半导体芯片安装区域中之后,形成与所述第一金属和所述第二金属合金的层,以将半导体芯片与半导体芯片安装区域接合。
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2.
公开(公告)号:US20130256690A1
公开(公告)日:2013-10-03
申请号:US13900904
申请日:2013-05-23
申请人: FUJITSU LIMITED
发明人: NORIKAZU NAKAMURA , SHIROU OZAKI , MASAYUKI TAKEDA , TOYOO MIYAJIMA , TOSHIHIRO OHKI , MASAHITO KANAMURA , KENJI IMANISHI , TOSHIHIDE KIKKAWA , KEIJI WATANABE
CPC分类号: H01L21/28264 , H01L23/3171 , H01L29/2003 , H01L29/41766 , H01L29/4236 , H01L29/517 , H01L29/66462 , H01L29/7787 , H01L29/78 , H01L2924/0002 , H01L2924/00
摘要: A semiconductor device may include a first semiconductor layer formed on a substrate, a second semiconductor layer formed on the first semiconductor layer, a source electrode and a drain electrode in contact with the first semiconductor layer or the second semiconductor layer, an opening formed in the second semiconductor layer, an insulating film formed on an inner surface of the opening formed in the second semiconductor layer and above the second semiconductor layer, a gate electrode formed in the opening via the insulating film, and a protective film formed on the insulating film and including an amorphous film containing carbon as a major component.
摘要翻译: 半导体器件可以包括形成在衬底上的第一半导体层,形成在第一半导体层上的第二半导体层,与第一半导体层或第二半导体层接触的源电极和漏电极, 第二半导体层,形成在形成在第二半导体层中的开口的内表面上并在第二半导体层上方的绝缘膜,经由绝缘膜形成在开口中的栅电极和形成在绝缘膜上的保护膜, 包括含有碳作为主要成分的非晶膜。
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