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    Nitridation of STI Fill Oxide to Prevent the Loss of STI Fill Oxide During Manufacturing Process
    1.
    发明申请
    Nitridation of STI Fill Oxide to Prevent the Loss of STI Fill Oxide During Manufacturing Process 失效
    氮化硅填充氧化物，以防止在制造过程中STI填充氧化物的损失

    公开(公告)号：US20080090379A1

    公开(公告)日：2008-04-17

    申请号：US11955751

    申请日：2007-12-13

    申请人： Fred Buehrer ,  Anthony Chou ,  Toshiharu Furukawa ,  Renee Mo

    发明人： Fred Buehrer ,  Anthony Chou ,  Toshiharu Furukawa ,  Renee Mo

    IPC分类号： H01L21/76

    CPC分类号： H01L21/76232 ,  H01L21/76224 ,  H01L21/823481

    摘要： A method and structure for an improved shallow trench isolation (STI) structure for a semiconductor device. The STI structure incorporates an oxynitride top layer of the STI fill. Optionally, the STI structure incorporates an oxynitride margin of the STI fill adjacent the silicon trench walls. A region of the oxynitride margin near the upper edges of the silicon trench walls includes oxynitride corners that are relatively thicker and contain a higher concentration of nitrogen as compared to the other regions of the oxynitride margin. The oxynitride features limit the STI fill height loss and also reduce the formation of divots in the STI fill below the level of the silicon substrate cause by hydrofluoric acid etching and other fabrication processes. Limiting STI fill height loss and the formation of divots improves the functions of the STI structure. The method of forming the STI structure is particularly compatible with standard semiconductor device fabrication processes, including chemical mechanical polishing (CMP), because the method incorporates the use of a pure silicon dioxide STI fill and plasma and thermal nitridation processes to form the oxynitride top layer and oxynitride margin, including the oxynitride corners, of the STI fill.

    摘要翻译： 一种用于半导体器件的改进的浅沟槽隔离（STI）结构的方法和结构。 STI结构包含STI填充物的氮氧化物顶层。 可选地，STI结构包括邻近硅沟槽壁的STI填充的氮氧化物边缘。 在硅沟槽壁的上边缘附近的氮氧化物边缘的区域包括与氮氧化物边缘的其它区域相比相对较厚并且含有较高浓度的氮的氧氮化物角。 氮氧化物的特征是限制了STI填充高度损失，并且还减少了STI填充物中由于氢氟酸蚀刻和其它制造工艺引起的硅衬底的形成。 限制STI填充高度损失和形成纹理改善了STI结构的功能。 形成STI结构的方法与包括化学机械抛光（CMP）在内的标准半导体器件制造工艺特别兼容，因为该方法包括使用纯二氧化硅STI填充和等离子体和热氮化工艺来形成氧氮化物顶层 和氮氧化物边缘，包括氮氧化物拐角，STI填充。

    NITRIDATION OF STI FILL OXIDE TO PREVENT THE LOSS OF STI FILL OXIDE DURING MANUFACTURING PROCESS
    2.
    发明申请
    NITRIDATION OF STI FILL OXIDE TO PREVENT THE LOSS OF STI FILL OXIDE DURING MANUFACTURING PROCESS 失效
    氮化硅氧化物在制造过程中防止氧化硅损失

    公开(公告)号：US20060160322A1

    公开(公告)日：2006-07-20

    申请号：US10905683

    申请日：2005-01-17

    申请人： Fred Buehrer ,  Anthony Chou ,  Toshiharu Furukawa ,  Renee Mo

    发明人： Fred Buehrer ,  Anthony Chou ,  Toshiharu Furukawa ,  Renee Mo

    IPC分类号： H01L21/76

    CPC分类号： H01L21/76232 ,  H01L21/76224 ,  H01L21/823481

    摘要： A method and structure for an improved shallow trench isolation (STI) structure for a semiconductor device. The STI structure incorporates an oxynitride top layer of the STI fill. Optionally, the STI structure incorporates an oxynitride margin of the STI fill adjacent the silicon trench walls. A region of the oxynitride margin near the upper edges of the silicon trench walls includes oxynitride corners that are relatively thicker and contain a higher concentration of nitrogen as compared to the other regions of the oxynitride margin. The oxynitride features limit the STI fill height loss and also reduce the formation of divots in the STI fill below the level of the silicon substrate cause by hydrofluoric acid etching and other fabrication processes. Limiting STI fill height loss and the formation of divots improves the functions of the STI structure. The method of forming the STI structure is particularly compatible with standard semiconductor device fabrication processes, including chemical mechanical polishing (CMP), because the method incorporates the use of a pure silicon dioxide STI fill and plasma and thermal nitridation processes to form the oxynitride top layer and oxynitride margin, including the oxynitride corners, of the STI fill.

    摘要翻译： 一种用于半导体器件的改进的浅沟槽隔离（STI）结构的方法和结构。 STI结构包含STI填充物的氮氧化物顶层。 可选地，STI结构包括邻近硅沟槽壁的STI填充的氮氧化物边缘。 在硅沟槽壁的上边缘附近的氮氧化物边缘的区域包括与氮氧化物边缘的其它区域相比相对较厚并且含有较高浓度的氮的氧氮化物角。 氮氧化物的特征是限制了STI填充高度损失，并且还减少了STI填充物中由于氢氟酸蚀刻和其它制造工艺引起的硅衬底的形成。 限制STI填充高度损失和形成纹理改善了STI结构的功能。 形成STI结构的方法与包括化学机械抛光（CMP）在内的标准半导体器件制造工艺特别兼容，因为该方法包括使用纯二氧化硅STI填充和等离子体和热氮化工艺来形成氧氮化物顶层 和氮氧化物边缘，包括氮氧化物拐角，STI填充。

    Nitridation of STI fill oxide to prevent the loss of STI fill oxide during manufacturing process
    3.
    发明授权
    Nitridation of STI fill oxide to prevent the loss of STI fill oxide during manufacturing process 失效
    STI填充氧化物的氮化，以防止制造过程中STI填充氧化物的损失

    公开(公告)号：US07491563B2

    公开(公告)日：2009-02-17

    申请号：US11955751

    申请日：2007-12-13

    申请人： Fred Buehrer ,  Anthony I. Chou ,  Toshiharu Furukawa ,  Renee T Mo

    发明人： Fred Buehrer ,  Anthony I. Chou ,  Toshiharu Furukawa ,  Renee T Mo

    IPC分类号： H01L21/00 ,  H01L21/76

    CPC分类号： H01L21/76232 ,  H01L21/76224 ,  H01L21/823481

    摘要： A method and structure for an improved shallow trench isolation (STI) structure for a semiconductor device. The STI structure incorporates an oxynitride top layer of the STI fill. Optionally, the STI structure incorporates an oxynitride margin of the STI fill adjacent the silicon trench walls. A region of the oxynitride margin near the upper edges of the silicon trench walls includes oxynitride corners that are relatively thicker and contain a higher concentration of nitrogen as compared to the other regions of the oxynitride margin. The oxynitride features limit the STI fill height loss and also reduce the formation of divots in the STI fill below the level of the silicon substrate cause by hydrofluoric acid etching and other fabrication processes. Limiting STI fill height loss and the formation of divots improves the functions of the STI structure. The method of forming the STI structure is particularly compatible with standard semiconductor device fabrication processes, including chemical mechanical polishing (CMP), because the method incorporates the use of a pure silicon dioxide STI fill and plasma and thermal nitridation processes to form the oxynitride top layer and oxynitride margin, including the oxynitride corners, of the STI fill.

    摘要翻译： 一种用于半导体器件的改进的浅沟槽隔离（STI）结构的方法和结构。 STI结构包含STI填充物的氮氧化物顶层。 可选地，STI结构包括邻近硅沟槽壁的STI填充的氮氧化物边缘。 在硅沟槽壁的上边缘附近的氮氧化物边缘的区域包括与氮氧化物边缘的其它区域相比相对较厚并且含有较高浓度的氮的氧氮化物角。 氮氧化物的特征是限制了STI填充高度损失，并且还减少了STI填充物中由于氢氟酸蚀刻和其它制造工艺引起的硅衬底的形成。 限制STI填充高度损失和形成纹理改善了STI结构的功能。 形成STI结构的方法与包括化学机械抛光（CMP）在内的标准半导体器件制造工艺特别兼容，因为该方法包括使用纯二氧化硅STI填充和等离子体和热氮化工艺来形成氧氮化物顶层 和氮氧化物边缘，包括氮氧化物拐角，STI填充。

    Nitridation of STI fill oxide to prevent the loss of STI fill oxide during manufacturing process
    4.
    发明授权
    Nitridation of STI fill oxide to prevent the loss of STI fill oxide during manufacturing process 失效

    公开(公告)号：US07491964B2

    公开(公告)日：2009-02-17

    申请号：US10905683

    申请日：2005-01-17

    申请人： Fred Buehrer ,  Anthony I. Chou ,  Toshiharu Furukawa ,  Renee T. Mo

    发明人： Fred Buehrer ,  Anthony I. Chou ,  Toshiharu Furukawa ,  Renee T. Mo

    IPC分类号： H01L29/00

    CPC分类号： H01L21/76232 ,  H01L21/76224 ,  H01L21/823481

    摘要： A method and structure for an improved shallow trench isolation (STI) structure for a semiconductor device. The STI structure incorporates an oxynitride top layer of the STI fill. Optionally, the STI structure incorporates an oxynitride margin of the STI fill adjacent the silicon trench walls. A region of the oxynitride margin near the upper edges of the silicon trench walls includes oxynitride corners that are relatively thicker and contain a higher concentration of nitrogen as compared to the other regions of the oxynitride margin. The oxynitride features limit the STI fill height loss and also reduce the formation of divots in the STI fill below the level of the silicon substrate cause by hydrofluoric acid etching and other fabrication processes. Limiting STI fill height loss and the formation of divots improves the functions of the STI structure. The method of forming the STI structure is particularly compatible with standard semiconductor device fabrication processes, including chemical mechanical polishing (CMP), because the method incorporates the use of a pure silicon dioxide STI fill and plasma and thermal nitridation processes to form the oxynitride top layer and oxynitride margin, including the oxynitride corners, of the STI fill.

    Selective post-doping of gate structures by means of selective oxide growth
    6.
    发明申请
    Selective post-doping of gate structures by means of selective oxide growth 失效
    通过选择性氧化物生长选择性地掺杂栅极结构

    公开(公告)号：US20050148144A1

    公开(公告)日：2005-07-07

    申请号：US10732657

    申请日：2003-12-10

    申请人： Anthony Chou ,  Toshiharu Furukawa ,  Steven Holmes

    发明人： Anthony Chou ,  Toshiharu Furukawa ,  Steven Holmes

    IPC分类号： H01L21/266 ,  H01L21/316 ,  H01L21/336 ,  H01L21/8238 ,  H01L29/78

    CPC分类号： H01L29/6659 ,  H01L21/02131 ,  H01L21/02164 ,  H01L21/02282 ,  H01L21/02304 ,  H01L21/266 ,  H01L21/316 ,  H01L21/31612 ,  H01L21/823814 ,  H01L21/823842 ,  H01L21/823864 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/7833

    摘要： A method for doping a polysilicon gate conductor, without implanting the substrate in a manner that would effect source/drain formation is provided. The inventive method comprises forming at least one polysilicon gate region atop a substrate; forming oxide seed spacers abutting the polysilicon gate; forming source/drain oxide spacers selectively deposited on the oxide seed spacers by liquid phase deposition, and implanting at least one polysilicon gate region, wherein the source/drain oxide spacers protect an underlying portion of the substrate. Multiple gate regions may be processed on a single substrate using conventional patterning. A block-mask provided by patterned photoresist can be used prior to implantation to pre-select the substrate area for gate conductor doping with one dopant type.

    摘要翻译： 提供了掺杂多晶硅栅极导体而不以将影响源极/漏极形成的方式植入衬底的方法。 本发明的方法包括在基板顶上形成至少一个多晶硅栅极区域; 形成邻接所述多晶硅栅极的氧化物种子间隔物; 通过液相沉积选择性地沉积在氧化物种间隔物上的源极/漏极氧化物间隔区，以及注入至少一个多晶硅栅极区域，其中源极/漏极氧化物间隔物保护衬底的下面部分。 可以使用常规图案化在单个基板上处理多个栅极区域。 在植入之前可以使用由图案化的光致抗蚀剂提供的块掩模，以预先选择用于掺杂一种掺杂剂类型的栅极导体的衬底区域。

    Selective post-doping of gate structures by means of selective oxide growth
    9.
    发明申请
    Selective post-doping of gate structures by means of selective oxide growth 失效
    通过选择性氧化物生长选择性地掺杂栅极结构

    公开(公告)号：US20060057811A1

    公开(公告)日：2006-03-16

    申请号：US11268100

    申请日：2005-11-07

    申请人： Anthony Chou ,  Toshiharu Furukawa ,  Steven Holmes

    发明人： Anthony Chou ,  Toshiharu Furukawa ,  Steven Holmes

    IPC分类号： H01L21/336 ,  H01L21/3205

    CPC分类号： H01L29/6659 ,  H01L21/02131 ,  H01L21/02164 ,  H01L21/02282 ,  H01L21/02304 ,  H01L21/266 ,  H01L21/316 ,  H01L21/31612 ,  H01L21/823814 ,  H01L21/823842 ,  H01L21/823864 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/7833

    摘要： A method for doping a polysilicon gate conductor, without implanting the substrate in a manner that would effect source/drain formation is provided. The inventive method comprises forming at least one polysilicon gate region atop a substrate; forming oxide seed spacers abutting the polysilicon gate; forming source/drain oxide spacers selectively deposited on the oxide seed spacers by liquid phase deposition, and implanting at least one polysilicon gate region, wherein the source/drain oxide spacers protect an underlying portion of the substrate. Multiple gate regions may be processed on a single substrate using conventional patterning. A block-mask provided by patterned photoresist can be used prior to implantation to pre-select the substrate area for gate conductor doping with one dopant type.

    摘要翻译： 提供了掺杂多晶硅栅极导体而不以将影响源极/漏极形成的方式植入衬底的方法。 本发明的方法包括在基板顶上形成至少一个多晶硅栅极区域; 形成邻接所述多晶硅栅极的氧化物种子间隔物; 通过液相沉积选择性地沉积在氧化物种间隔物上的源极/漏极氧化物间隔区，以及注入至少一个多晶硅栅极区域，其中源极/漏极氧化物间隔物保护衬底的下面部分。 可以使用常规图案化在单个基板上处理多个栅极区域。 在植入之前可以使用由图案化的光致抗蚀剂提供的块掩模，以预先选择用于掺杂一种掺杂剂类型的栅极导体的衬底区域。

    Device component forming method with a trim step prior to sidewall image transfer (SIT) processing
    10.
    发明申请
    Device component forming method with a trim step prior to sidewall image transfer (SIT) processing 审中-公开
    在侧壁图像转印（SIT）处理之前具有修整步骤的装置部件形成方法

    公开(公告)号：US20120208356A1

    公开(公告)日：2012-08-16

    申请号：US13456282

    申请日：2012-04-26

    申请人： Toshiharu Furukawa ,  David V. Horak ,  Charles W. Koburger, III ,  Qiqing C. Ouyang

    发明人： Toshiharu Furukawa ,  David V. Horak ,  Charles W. Koburger, III ,  Qiqing C. Ouyang

    IPC分类号： H01L21/20 ,  H01L21/302

    CPC分类号： H01L21/28132 ,  H01L21/0337 ,  H01L21/0338 ,  H01L29/66795

    摘要： Disclosed is an imaging method for patterning component shapes (e.g., fins, gate electrodes, etc.) into a substrate. By conducting a trim step prior to performing either an additive or subtractive sidewall image transfer process, the method avoids the formation of a loop pattern in a hard mask and, thus, avoids a post-SIT process trim step requiring alignment of a trim mask to sub-lithographic features to form a hard mask pattern with the discrete segments. In one embodiment a hard mask is trimmed prior to conducting an additive SIT process so that a loop pattern is not formed. In another embodiment an oxide layer and memory layer that are used to form a mandrel are trimmed prior to the conducting a subtractive SIT process. A mask is then used to protect portions of the mandrel during etch back of the oxide layer so that a loop pattern is not formed.

    摘要翻译： 公开了一种用于将部件形状（例如散热片，栅电极等）图案化成基板的成像方法。 通过在执行加法或减损侧壁图像转移处理之前进行修整步骤，该方法避免了在硬掩模中形成环形图案，并且因此避免了后SIT工艺修整步骤，需要修剪蒙版对准 亚光刻特征以形成具有离散片段的硬掩模图案。 在一个实施例中，在进行添加SIT处理之前修剪硬掩模，使得不形成环形图案。 在另一个实施例中，用于形成心轴的氧化物层和记忆层在进行减法SIT处理之前被修整。 然后在氧化层的回蚀刻期间使用掩模来保护心轴的部分，使得不形成环形图案。