公开(公告)号：US09385179B2

公开(公告)日：2016-07-05

申请号：US13765105

申请日：2013-02-12

Applicant: GLOBALFOUNDRIES INC.

Inventor： James S. Nakos ,  Edmund J. Sprogis ,  Anthony K. Stamper

IPC: H01L27/108 ,  H01L29/94 ,  H01L49/02 ,  H01L29/66

CPC classification number: H01L28/40 ,  H01L29/66181 ,  H01L29/945

Abstract: Solutions for forming a silicided deep trench decoupling capacitor are disclosed. In one aspect, a method of forming a semiconductor device includes: forming an outer trench in a silicon substrate, the forming exposing portions of the silicon substrate below an upper surface of the silicon substrate; depositing a dielectric liner layer inside the trench; depositing a doped polysilicon layer over the dielectric liner layer, the doped polysilicon layer forming an inner trench in the silicon substrate; forming a silicide layer over a portion of the doped polysilicon layer; forming an intermediate contact layer within the inner trench; and forming a contact over a portion of the intermediate contact layer and a portion of the silicide layer.

Abstract translation: 公开了用于形成硅化深沟槽去耦电容器的解决方案。 一方面，一种形成半导体器件的方法包括：在硅衬底中形成外部沟槽，所述硅衬底的所述成形暴露部分位于所述硅衬底的上表面下方; 在沟槽内沉积介电衬垫层; 在所述介​​质衬底层上沉积掺杂多晶硅层，所述掺杂多晶硅层在所述硅衬底中形成内部沟槽; 在所述掺杂多晶硅层的一部分上形成硅化物层; 在所述内沟槽内形成中间接触层; 以及在所述中间接触层的一部分和所述硅化物层的一部分上形成接触。

公开(公告)号：US10049909B2

公开(公告)日：2018-08-14

申请号：US15432560

申请日：2017-02-14

Applicant: GLOBALFOUNDRIES INC.

Inventor： John J. Garant ,  Jonathan H. Griffith ,  Brittany L. Hedrick ,  Edmund J. Sprogis

IPC: H01L21/683 ,  B32B37/24 ,  B32B38/10 ,  B81C1/00

Abstract: A wafer handler with a removable bow compensating layer and methods of manufacture is disclosed. The method includes forming at least one layer of stressed material on a front side of a wafer handler. The method further includes forming another stressed material on a backside of the wafer handler which counter balances the at least one layer of stressed material on the front side of the wafer handler, thereby decreasing an overall bow of the wafer handler.

公开(公告)号：US20170154800A1

公开(公告)日：2017-06-01

申请号：US15432560

申请日：2017-02-14

Applicant: GLOBALFOUNDRIES INC.

Inventor： John J. Garant ,  Jonathan H. Griffith ,  Brittany L. HEDRICK ,  Edmund J. Sprogis

IPC: H01L21/683 ,  B32B38/10 ,  B32B37/24

CPC classification number: H01L21/6835 ,  B32B37/24 ,  B32B38/10 ,  B32B2037/246 ,  B32B2315/08 ,  B32B2457/14 ,  B81C1/00666 ,  B81C2201/0167 ,  H01L2221/68304 ,  H01L2221/68327

Abstract: A wafer handler with a removable bow compensating layer and methods of manufacture is disclosed. The method includes forming at least one layer of stressed material on a front side of a wafer handler. The method further includes forming another stressed material on a backside of the wafer handler which counter balances the at least one layer of stressed material on the front side of the wafer handler, thereby decreasing an overall bow of the wafer handler.

公开(公告)号：US09355936B2

公开(公告)日：2016-05-31

申请号：US14242203

申请日：2014-04-01

Applicant: GLOBALFOUNDRIES INC.

Inventor： Edward C. Cooney, III ,  James S. Dunn ,  Dale W. Martin ,  Charles S. Musante ,  BethAnn Rainey Lawrence ,  Leathen Shi ,  Edmund J. Sprogis ,  Cornelia K. Tsang

IPC: H01L23/00 ,  H01L23/482 ,  H01L23/522 ,  H01L23/528 ,  H01L21/768 ,  H01L29/10 ,  H01L21/66 ,  H01L21/683

CPC classification number: H01L23/4825 ,  H01L21/6835 ,  H01L21/76819 ,  H01L22/32 ,  H01L22/34 ,  H01L23/5223 ,  H01L23/5283 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/13 ,  H01L24/16 ,  H01L24/80 ,  H01L24/81 ,  H01L29/1054 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68363 ,  H01L2221/68381 ,  H01L2224/0361 ,  H01L2224/0401 ,  H01L2224/05166 ,  H01L2224/05187 ,  H01L2224/05567 ,  H01L2224/05624 ,  H01L2224/05687 ,  H01L2224/06181 ,  H01L2224/08225 ,  H01L2224/131 ,  H01L2224/73251 ,  H01L2224/80011 ,  H01L2224/80013 ,  H01L2224/80075 ,  H01L2224/80203 ,  H01L2224/804 ,  H01L2224/80487 ,  H01L2224/80896 ,  H01L2224/80907 ,  H01L2224/80948 ,  H01L2224/81203 ,  H01L2224/81801 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/15788 ,  H01L2924/014 ,  H01L2224/08 ,  H01L2224/16 ,  H01L2924/05432 ,  H01L2924/053 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2924/04941 ,  H01L2924/00 ,  H01L2224/05552

Abstract: Methods for bonding substrate surfaces, bonded substrate assemblies, and design structures for a bonded substrate assembly. Device structures of a product chip are formed using a first surface of a device substrate. A wiring layer of an interconnect structure for the device structures is formed on the product chip. The wiring layer is planarized. A temporary handle wafer is removably bonded to the planarized wiring layer. In response to removably bonding the temporary handle wafer to the planarized first wiring layer, a second surface of the device substrate, which is opposite to the first surface, is bonded to a final handle substrate. The temporary handle wafer is then removed from the assembly.

Abstract translation: 用于粘结衬底表面，键合衬底组件和用于键合衬底组件的设计结构的方法。 使用器件基板的第一表面形成产品芯片的器件结构。 在产品芯片上形成用于器件结构的互连结构的布线层。 布线层被平坦化。 临时处理晶片可移除地结合到平坦化的布线层。 响应于将临时手柄晶片可移除地结合到平坦化的第一布线层，与第一表面相对的器件基板的第二表面被结合到最终的手柄基板。 然后将临时手柄晶片从组件中取出。