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    Wafer with Spacer Including Horizontal Member
    4.
    发明申请
    Wafer with Spacer Including Horizontal Member 有权
    晶圆与间隔包括水平成员

    公开(公告)号：US20120261789A1

    公开(公告)日：2012-10-18

    申请号：US13232209

    申请日：2011-09-14

    Applicant: Andrew B. Graham ,  Gary Yama ,  Gary O'Brien

    Inventor： Andrew B. Graham ,  Gary Yama ,  Gary O'Brien

    IPC: H01L29/06 ,  H01L21/762

    CPC classification number: H01L29/0649 ,  H01L21/76232 ,  H01L21/76283 ,  H01L21/7682 ,  H01L23/4821 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: In one embodiment, a method of forming an insulating spacer includes providing a base layer, providing an intermediate layer above an upper surface of the base layer, etching a first trench in the intermediate layer, depositing a first insulating material portion within the first trench, depositing a second insulating material portion above an upper surface of the intermediate layer, forming an upper layer above an upper surface of the second insulating material portion, etching a second trench in the upper layer, and depositing a third insulating material portion within the second trench and on the upper surface of the second insulating material portion.

    Abstract translation: 在一个实施例中，形成绝缘间隔物的方法包括提供基底层，在基底层的上表面上方提供中间层，蚀刻中间层中的第一沟槽，在第一沟槽内沉积第一绝缘材料部分， 在所述中间层的上表面上方沉积第二绝缘材料部分，在所述第二绝缘材料部分的上表面上形成上层，蚀刻所述上层中的第二沟槽，以及在所述第二沟槽内沉积第三绝缘材料部分 并且在第二绝缘材料部分的上表面上。

    Method of etching a device using a hard mask and etch stop layer
    5.
    发明授权
    Method of etching a device using a hard mask and etch stop layer 有权
    使用硬掩模和蚀刻停止层蚀刻器件的方法

    公开(公告)号：US07981308B2

    公开(公告)日：2011-07-19

    申请号：US12006377

    申请日：2007-12-31

    Applicant: Gary Yama

    Inventor： Gary Yama

    IPC: B44C1/22 ,  H01L21/302

    CPC classification number: B81C1/00595 ,  B81C2201/0132 ,  B81C2201/014 ,  H01L21/0475

    Abstract: A method of etching a device in one embodiment includes providing a silicon carbide substrate, forming a silicon nitride layer on a surface of the silicon carbide substrate, forming a silicon carbide layer on a surface of the silicon nitride layer, forming a silicon dioxide layer on a surface of the silicon carbide layer, forming a photoresist mask on a surface of the silicon dioxide layer, and etching the silicon dioxide layer through the photoresist mask.

    Abstract translation: 在一个实施例中蚀刻器件的方法包括提供碳化硅衬底，在碳化硅衬底的表面上形成氮化硅层，在氮化硅层的表面上形成碳化硅层，在二氧化硅层上形成二氧化硅层 碳化硅层的表面，在二氧化硅层的表面上形成光致抗蚀剂掩模，并且通过光致抗蚀剂掩模蚀刻二氧化硅层。

    METHOD OF MANUFACTURING A PLANAR ELECTRODE WITH LARGE SURFACE AREA
    6.
    发明申请
    METHOD OF MANUFACTURING A PLANAR ELECTRODE WITH LARGE SURFACE AREA 有权
    具有大面积面积的平面电极的制造方法

    公开(公告)号：US20110019337A1

    公开(公告)日：2011-01-27

    申请号：US12508894

    申请日：2009-07-24

    Applicant: Po-Jui Chen ,  Gary Yama ,  Matthieu Liger ,  Matthias Illing

    Inventor： Po-Jui Chen ,  Gary Yama ,  Matthieu Liger ,  Matthias Illing

    IPC: H01G9/00 ,  B05D5/12

    CPC classification number: H01G11/26 ,  H01G11/46 ,  H01G11/86 ,  H01M4/02 ,  Y02E60/13 ,  Y10T29/417

    Abstract: A method for fabricating a pair of large surface area planar electrodes. The method includes forming a first template above a first substrate, the first template having a first plurality of pores, coating the first plurality of pores of the first template with a first layer of conducting material to form a first electrode, placing the first plurality of pores of the first electrode in proximity to a second electrode, thereby forming a gap between the first plurality of pores and the second electrode, and filling the gap with an electrolyte material.

    Abstract translation: 一种制造一对大面积平面电极的方法。 该方法包括在第一基板上形成第一模板，第一模板具有第一多个孔，用第一导电材料层涂覆第一模板的第一多个孔以形成第一电极，将第一多个 在第二电极附近形成第一电极的孔，从而在第一多个孔和第二电极之间形成间隙，并用电解质材料填充间隙。

    TRI-AXIS ACCELEROMETER HAVING A SINGLE PROOF MASS AND FULLY DIFFERENTIAL OUTPUT SIGNALS
    7.
    发明申请
    TRI-AXIS ACCELEROMETER HAVING A SINGLE PROOF MASS AND FULLY DIFFERENTIAL OUTPUT SIGNALS 有权
    具有单个防伪质量和完全差异输出信号的三轴加速度计

    公开(公告)号：US20100263447A1

    公开(公告)日：2010-10-21

    申请号：US12825046

    申请日：2010-06-28

    Applicant: Zhiyu Pan ,  Christoph Lang ,  Gary Yama ,  Matthias Metz ,  Markus Ulm

    Inventor： Zhiyu Pan ,  Christoph Lang ,  Gary Yama ,  Matthias Metz ,  Markus Ulm

    IPC: G01P15/09 ,  H04R17/00

    CPC classification number: G01P15/09 ,  G01P15/0802 ,  G01P15/123 ,  G01P15/18 ,  G01P2015/084 ,  Y10T29/42

    Abstract: A tri-axis accelerometer includes a proof mass, at least four anchor points arranged in at least two opposite pairs, a first pair of anchor points being arranged opposite one another along a first axis, a second pair of anchor points being arranged opposite one another along a second axis, the first axis and the second axis being perpendicular to one another, and at least four spring units to connect the proof mass to the at least four anchor points, the spring units each including a pair of identical springs, each spring including a sensing unit.

    Abstract translation: 三轴加速度计包括证明质量块，至少四个锚点至少布置在两对相对中，第一对锚定点沿着第一轴线彼此相对布置，第二对固定点彼此相对布置 沿着第二轴线，所述第一轴线和所述第二轴线彼此垂直;以及至少四个弹簧单元，用于将所述证明物质连接到所述至少四个锚定点，所述弹簧单元各自包括一对相同的弹簧，每个弹簧 包括感测单元。

    SUBSTRATE WITH MULTIPLE ENCAPSULATED PRESSURES
    8.
    发明申请
    SUBSTRATE WITH MULTIPLE ENCAPSULATED PRESSURES 有权
    带有多个封装压力的基板

    公开(公告)号：US20100240163A1

    公开(公告)日：2010-09-23

    申请号：US12407639

    申请日：2009-03-19

    Applicant: Robert N. Candler ,  Gary Yama

    Inventor： Robert N. Candler ,  Gary Yama

    IPC: H01L23/31

    CPC classification number: H01L23/3171 ,  B81B7/02 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81C1/00293 ,  B81C2203/0136 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A method of forming a device with multiple encapsulated pressures is disclosed herein. In accordance with one embodiment of the present invention, there is provided a method of forming a device with multiple encapsulated pressures, including providing a substrate, forming a functional layer on top of a surface of the substrate, the functional layer including a first device portion at a first location, and a second device portion at a second location adjacent to the first location, encapsulating the functional layer, forming at least one diffusion resistant layer above the encapsulated functional layer at a location above the first location and not above the second location, modifying an environment adjacent the at least one diffusion resistant layer, and diffusing a gas into the second location as a result of the modified environment.

    Abstract translation: 本文公开了形成具有多个封装压力的装置的方法。 根据本发明的一个实施例，提供了一种形成具有多个封装压力的器件的方法，包括提供衬底，在衬底的表面的顶部上形成功能层，所述功能层包括第一器件部分 在第一位置处的第二设备部分和与第一位置相邻的第二位置处的第二设备部分，封装功能层，在第一位置上方并且不在第二位置之上的位置处在封装的功能层上方形成至少一个扩散阻挡层 改变邻近所述至少一个扩散阻挡层的环境，以及由于所述改进的环境而将气体扩散到所述第二位置。

    Anti-stiction technique for electromechanical systems and electromechanical device employing same
    9.
    发明申请
    Anti-stiction technique for electromechanical systems and electromechanical device employing same 有权
    机电系统的抗静电技术和采用该机电系统的机电装置

    公开(公告)号：US20090065928A1

    公开(公告)日：2009-03-12

    申请号：US12264774

    申请日：2008-11-04

    Applicant: Markus Lutz ,  Aaron Partidge ,  Wilhelm Frey ,  Markus Ulm ,  Matthias Metz ,  Brian Stark ,  Gary Yama

    Inventor： Markus Lutz ,  Aaron Partidge ,  Wilhelm Frey ,  Markus Ulm ,  Matthias Metz ,  Brian Stark ,  Gary Yama

    IPC: H01L23/12

    CPC classification number: B81C1/0096 ,  B81B3/0005 ,  B81C2201/112 ,  B82Y30/00 ,  H01L2224/13 ,  H01L2924/1461 ,  H01L2924/00

    Abstract: A mechanical structure is disposed in a chamber, at least a portion of which is defined by the encapsulation structure. A first method provides a channel cap having at least one preform portion disposed over or in at least a portion of an anti-stiction channel to seal the anti-stiction channel, at least in part. A second method provides a channel cap having at least one portion disposed over or in at least a portion of an anti-stiction channel to seal the anti-stiction channel, at least in part. The at least one portion is fabricated apart from the electromechanical device and thereafter affixed to the electromechanical device. A third method provides a channel cap having at least one portion disposed over or in at least a portion of the anti-stiction channel to seal an anti-stiction channel, at least in part. The at least one portion may comprise a wire ball, a stud, metal foil or a solder preform. A device includes a substrate, an encapsulation structure and a mechanical structure. An anti-stiction layer is disposed on at least a portion of the mechanical structure. An anti-stiction channel is formed in at least one of the substrate and the encapsulation structure. A cap has at least one preform portion disposed over or in at least a portion of the anti-stiction channel to seal the anti-stiction channel, at least in part.

    Abstract translation: 机械结构设置在室中，其至少一部分由封装结构限定。 第一种方法提供了通道盖，其具有至少部分地设置在防静电通道的上方或至少一部分中的至少一个预制件部分，以密封抗静电通道。 第二种方法提供了通道盖，其具有至少部分地设置在防静电通道上方或至少一部分中的至少一个部分，以密封抗静脉通道。 该至少一个部分与机电装置分开制造，然后固定在机电装置上。 第三种方法提供了通道盖，其具有至少部分地设置在防静电通道上方或至少一部分中的至少一个部分，以密封抗静脉通道。 所述至少一个部分可以包括线球，螺柱，金属箔或焊料预制件。 一种器件包括衬底，封装结构和机械结构。 抗静电层设置在机械结构的至少一部分上。 在基板和封装结构中的至少一个中形成抗静电通道。 帽至少部分地具有设置在抗静电通道上方或至少一部分中的至少一个预制件部分，以密封抗静电通道。

    Microelectromechanical devices and fabrication methods
    10.
    发明申请
    Microelectromechanical devices and fabrication methods 有权
    微机电装置及制造方法

    公开(公告)号：US20080122020A1

    公开(公告)日：2008-05-29

    申请号：US11594525

    申请日：2006-11-07

    Applicant: Matthias Metz ,  Zhiyu Pan ,  Brian Stark ,  Markus Ulm ,  Gary Yama

    Inventor： Matthias Metz ,  Zhiyu Pan ,  Brian Stark ,  Markus Ulm ,  Gary Yama

    IPC: H01L29/84 ,  H01L21/56

    CPC classification number: B81C1/00301 ,  B81B2207/015 ,  B81B2207/097 ,  B81C2203/0136 ,  B81C2203/0145 ,  H01L21/56 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: There are many inventions described and illustrated herein. In one aspect, the present invention is directed to a MEMS device, and technique of fabricating or manufacturing a MEMS device, having mechanical structures encapsulated in a chamber prior to final packaging. An embodiment further includes location of a piezoelectric material as part of a semiconductor sensing structure. The semiconductor sensing structure, in conjunction with the piezoelectric material, can be used as a sensing device to provide an output signal associated with a sensed event.

    Abstract translation: 这里描述和说明了许多发明。 在一个方面，本发明涉及MEMS器件，以及制造或制造MEMS器件的技术，其具有在最终封装之前封装在腔室中的机械结构。 实施例还包括作为半导体感测结构的一部分的压电材料的位置。 结合压电材料的半导体感测结构可以用作感测装置以提供与感测到的事件相关联的输出信号。

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