Pixel structure, LCD panel, and manufacturing method thereof
    1.
    发明授权
    Pixel structure, LCD panel, and manufacturing method thereof 有权
    像素结构,LCD面板及其制造方法

    公开(公告)号:US09111815B2

    公开(公告)日:2015-08-18

    申请号:US13478541

    申请日:2012-05-23

    摘要: An embodiment of the disclosed technology provides a pixel structure, comprising a TFT, a reflective region and a transmissive region, wherein the reflective region comprises a reflective region insulation layer, a reflection layer on the reflective region insulation layer and a reflective region pixel electrode on the reflection layer, and the transmissive region comprises a transmissive region pixel electrode, wherein the reflective region pixel electrode and the transmissive region pixel electrode form an integral structure, and the integral structure of the pixel electrodes is connected with the drain electrode of the TFT, wherein the organic layer in the reflective region is formed on an array substrate prior to a gate electrode of the TFT, and the reflection layer in the reflective region and the gate electrode of the TFT are formed in a same patterning process by using a same metal layer.

    摘要翻译: 所公开的技术的一个实施例提供了一种像素结构,包括TFT,反射区域和透射区域,其中反射区域包括反射区域绝缘层,反射区域绝缘层上的反射层和反射区域像素电极 反射层和透射区域包括透射区域像素电极,其中反射区域像素电极和透射区域像素电极形成一体结构,并且像素电极的整体结构与TFT的漏极连接, 其中反射区域中的有机层在TFT的栅电极之前形成在阵列衬底上,并且反射区域中的反射层和TFT的栅极电极通过使用相同的金属在相同的图案化工艺中形成 层。

    ARRAY SUBSTRATE, MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE
    2.
    发明申请
    ARRAY SUBSTRATE, MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE 审中-公开
    阵列基板,其制造方法和显示装置

    公开(公告)号:US20140054581A1

    公开(公告)日:2014-02-27

    申请号:US13878475

    申请日:2012-12-23

    IPC分类号: H01L27/12

    摘要: Embodiments of the invention relate to an array substrate, a manufacturing method thereof and a display device comprising the array substrate. The array substrate comprises a gate line and a data line which define a pixel region, the pixel region comprises a thin film transistor region and an electrode pattern region, a gate electrode, a gate insulation layer, an active layer, a source electrode, a drain electrode and a passivation layer are formed in the thin film transistor region, the gate insulation layer, a pixel electrode, the passivation layer and a common electrode are formed in the electrode pattern region, and the common electrode and the pixel electrode form a multi-dimensional electric field. A color resin layer is formed between the gate insulation layer and the pixel electrode.

    摘要翻译: 本发明的实施例涉及阵列基板,其制造方法和包括阵列基板的显示装置。 阵列基板包括栅极线和限定像素区域的数据线,像素区域包括薄膜晶体管区域和电极图案区域,栅极电极,栅极绝缘层,有源层,源极电极, 漏电极和钝化层形成在薄膜晶体管区域中,栅极绝缘层,像素电极,钝化层和公共电极形成在电极图案区域中,并且公共电极和像素电极形成多个 维电场。 在栅极绝缘层和像素电极之间形成着色树脂层。

    Mask plate, fattening method and method for manufacturing array substrate
    3.
    发明授权
    Mask plate, fattening method and method for manufacturing array substrate 有权
    面膜,育肥方法及阵列基板的制造方法

    公开(公告)号:US08900776B2

    公开(公告)日:2014-12-02

    申请号:US13347865

    申请日:2012-01-11

    IPC分类号: G03F1/76 G03F1/68 H01L27/12

    CPC分类号: G03F1/76 G03F1/50 H01L27/1288

    摘要: An embodiment of the disclosed technology provides a mask plate for photolithography process comprising a first pattern region, a second pattern region having a different exposure level from that of the first pattern region, and a redundant pattern provided between the first pattern region and the second pattern region, wherein the redundant pattern is configured for forming a redundant photoresist pattern so as to prevent developer diffusion at different concentrations across the photoresist redundant pattern.

    摘要翻译: 所公开技术的实施例提供了一种用于光刻工艺的掩模板,其包括第一图案区域,具有与第一图案区域不同的曝光水平的第二图案区域以及设置在第一图案区域和第二图案之间的冗余图案 区域,其中所述冗余图案被配置用于形成冗余光刻胶图案,以便阻止在所述光致抗蚀剂冗余图案上的不同浓度的显影剂扩散。

    Liquid crystal display and array substrate
    4.
    发明授权
    Liquid crystal display and array substrate 有权
    液晶显示器和阵列基板

    公开(公告)号:US08698149B2

    公开(公告)日:2014-04-15

    申请号:US13457825

    申请日:2012-04-27

    IPC分类号: H01L31/00

    摘要: An embodiment of the disclosed technology discloses an array substrate comprising: a base substrate; a first layer transparent common electrode formed on the base substrate; a gate metal common electrode formed on the first layer transparent common electrode; an insulation layer formed on the gate metal common electrode, with via holes being formed in the insulation layer; and a second layer transparent common electrode formed on the insulation layer. A side portion of via holes is in contact with the gate metal common electrode, another side portion is in contact with the first layer transparent common electrode, such that the second layer transparent common electrode is connected electrically with the first layer transparent common electrode and the gate metal common electrode in the via holes.

    摘要翻译: 所公开技术的一个实施例公开了一种阵列基板,包括:基底; 形成在所述基底基板上的第一层透明公共电极; 形成在第一层透明公共电极上的栅极金属共电极; 形成在所述栅极金属公共电极上的绝缘层,在所述绝缘层中形成有通孔; 以及形成在绝缘层上的第二层透明公共电极。 通孔的侧部与栅极金属公共电极接触,另一侧部与第一层透明公共电极接触,使得第二层透明公共电极与第一层透明公共电极电连接, 栅极金属公共电极在通孔中。

    Mouse mover
    5.
    外观设计

    公开(公告)号:USD1049124S1

    公开(公告)日:2024-10-29

    申请号:US29839353

    申请日:2022-05-20

    申请人: Feng Zhang

    设计人: Feng Zhang

    摘要: FIG. 1 is a perspective view of a mouse mover showing my new design;
    FIG. 2 is a front view thereof;
    FIG. 3 is a rear view thereof;
    FIG. 4 is a left side view thereof;
    FIG. 5 is a right side view thereof;
    FIG. 6 is a top view thereof;
    FIG. 7 is a bottom view thereof; and,
    FIG. 8 is a rear side perspective view thereof.
    The broken lines in the drawings depict portions of the mouse mover that form no part of the claimed design.