公开(公告)号：US07667258B2

公开(公告)日：2010-02-23

申请号：US11625130

申请日：2007-01-19

申请人： Gurtej S. Sandhu ,  Kevin R. Shea ,  Chris W. Hill ,  Kevin J. Torek

发明人： Gurtej S. Sandhu ,  Kevin R. Shea ,  Chris W. Hill ,  Kevin J. Torek

IPC分类号： H01L27/108 ,  H01L21/8242

CPC分类号： H01L28/91 ,  H01L27/10852

摘要： Double-sided container capacitors are formed using sacrificial layers. A sacrificial layer is formed within a recess in a structural layer. A lower electrode is formed within the recess. The sacrificial layer is removed to create a space to allow access to the sides of the structural layer. The structural layer is removed, creating an isolated lower electrode. The lower electrode can be covered with a capacitor dielectric and upper electrode to form a double-sided container capacitor.

摘要翻译： 使用牺牲层形成双面容器电容器。 在结构层的凹部内形成牺牲层。 下部电极形成在凹部内。 去除牺牲层以产生允许接近结构层的侧面的空间。 去除结构层，形成隔离的下电极。 下电极可以用电容器电介质和上电极覆盖以形成双面容器电容器。

公开(公告)号：US07329576B2

公开(公告)日：2008-02-12

申请号：US11021639

申请日：2004-12-22

申请人： Gurtej S. Sandhu ,  Kevin R. Shea ,  Chris W. Hill ,  Kevin J. Torek

发明人： Gurtej S. Sandhu ,  Kevin R. Shea ,  Chris W. Hill ,  Kevin J. Torek

IPC分类号： H01L21/8242

CPC分类号： H01L28/91 ,  H01L27/10852

摘要： Double-sided container capacitors are formed using sacrificial layers. A sacrificial layer is formed within a recess in a structural layer. A lower electrode is formed within the recess. The sacrificial layer is removed to create a space to allow access to the sides of the structural layer. The structural layer is removed, creating an isolated lower electrode. The lower electrode can be covered with a capacitor dielectric and upper electrode to form a double-sided container capacitor.

摘要翻译： 使用牺牲层形成双面容器电容器。 在结构层的凹部内形成牺牲层。 下部电极形成在凹部内。 去除牺牲层以产生允许接近结构层的侧面的空间。 去除结构层，形成隔离的下电极。 下电极可以用电容器电介质和上电极覆盖以形成双面容器电容器。

公开(公告)号：US06930058B2

公开(公告)日：2005-08-16

申请号：US10420246

申请日：2003-04-21

申请人： Chris W. Hill ,  Weimin Li ,  Gurtej S. Sandhu

发明人： Chris W. Hill ,  Weimin Li ,  Gurtej S. Sandhu

IPC分类号： C23C16/40 ,  C23C16/44 ,  C23C16/455 ,  H01L21/316 ,  H01L21/31 ,  H01L21/469 ,  H01L21/76 ,  H01L21/8238

CPC分类号： C23C16/45523 ,  C23C16/401 ,  H01L21/02126 ,  H01L21/02129 ,  H01L21/02271 ,  H01L21/31625

摘要： A substrate is positioned within a deposition chamber. At least two gaseous precursors are fed to the chamber which collectively comprise silicon, an oxidizer comprising oxygen and dopant which become part of the deposited doped silicon dioxide. The feeding is over at least two different time periods and under conditions effective to deposit a doped silicon dioxide layer on the substrate. The time periods and conditions are characterized by some period of time when one of said gaseous precursors comprising said dopant is flowed to the chamber in the substantial absence of flowing any of said oxidizer precursor. In one implementation, the time periods and conditions are effective to at least initially deposit a greater quantity of doped silicon dioxide within at least some gaps on the substrate as compared to any doped silicon dioxide deposited atop substrate structure which define said gaps.

摘要翻译： 衬底位于沉积室内。 将至少两种气体前体进料到共同包含硅的室，包含氧和掺杂剂的氧化剂成为沉积的掺杂二氧化硅的一部分。 进料至少在两个不同的时间段内并且在有效沉积掺杂的二氧化硅层的条件下在基板上。 时间段和条件的特征在于一段时间，其中一种所述包含所述掺杂剂的气态前体在基本上不流动任何所述氧化剂前体的情况下流动到所述室。 在一个实施方案中，与沉积在限定所述间隙的衬底结构上的任何掺杂二氧化硅相比，时间段和条件有效地至少在衬底上的至少一些间隙内沉积更大量的掺杂二氧化硅。

公开(公告)号：US07470632B2

公开(公告)日：2008-12-30

申请号：US11204509

申请日：2005-08-16

申请人： Chris W. Hill ,  Weimin Li ,  Gurtej S. Sandhu

发明人： Chris W. Hill ,  Weimin Li ,  Gurtej S. Sandhu

IPC分类号： H01L21/31 ,  H01L21/469

CPC分类号： C23C16/45523 ,  C23C16/401 ,  H01L21/02126 ,  H01L21/02129 ,  H01L21/02271 ,  H01L21/31625

摘要： A substrate is positioned within a deposition chamber. At least two gaseous precursors are fed to the chamber which collectively comprise silicon, an oxidizer comprising oxygen and dopant which become part of the deposited doped silicon dioxide. The feeding is over at least two different time periods and under conditions effective to deposit a doped silicon dioxide layer on the substrate. The time periods and conditions are characterized by some period of time when one of said gaseous precursors comprising said dopant is flowed to the chamber in the substantial absence of flowing any of said oxidizer precursor. In one implementation, the time periods and conditions are effective to at least initially deposit a greater quantity of doped silicon dioxide within at least some gaps on the substrate as compared to any doped silicon dioxide deposited atop substrate structure which define said gaps.

摘要翻译： 衬底位于沉积室内。 将至少两种气体前体进料到共同包含硅的室，包含氧和掺杂剂的氧化剂成为沉积的掺杂二氧化硅的一部分。 进料至少在两个不同的时间段内并且在有效沉积掺杂的二氧化硅层的条件下在基板上。 时间段和条件的特征在于一段时间，其中一种所述包含所述掺杂剂的气态前体在基本上不流动任何所述氧化剂前体的情况下流动到所述室。 在一个实施方案中，与沉积在限定所述间隙的衬底结构上的任何掺杂二氧化硅相比，时间段和条件有效地至少在衬底上的至少一些间隙内沉积更大量的掺杂二氧化硅。

公开(公告)号：US07361614B2

公开(公告)日：2008-04-22

申请号：US11404703

申请日：2006-04-14

申请人： Garo J. Derderian ,  Chris W. Hill

发明人： Garo J. Derderian ,  Chris W. Hill

IPC分类号： H01L21/469

CPC分类号： H01L21/02164 ,  C23C16/0272 ,  C23C16/402 ,  H01L21/02145 ,  H01L21/02214 ,  H01L21/02271 ,  H01L21/31612 ,  H01L21/76227

摘要： This invention includes methods of depositing a silicon dioxide comprising layer in the fabrication of integrated circuitry, and to methods of forming trench isolation in the fabrication of integrated circuitry. In one implementation, a method of depositing a silicon dioxide comprising layer in the fabrication of integrated circuitry includes flowing an aluminum containing organic precursor to a chamber containing a semiconductor substrate effective to deposit an aluminum comprising layer over the substrate. An alkoxysilanol is flowed to the substrate comprising the aluminum comprising layer within the chamber effective to deposit a silicon dioxide comprising layer over the substrate. At least one halogen is provided within the chamber during at least one of the aluminum containing organic precursor flowing and the alkoxysilanol flowing under conditions effective to reduce rate of the deposit of the silicon dioxide comprising layer over the substrate than would otherwise occur under identical conditions but for providing the halogen. Other implementations are contemplated.

摘要翻译： 本发明包括在制造集成电路中沉积含二氧化硅的层的方法以及在集成电路的制造中形成沟槽隔离的方法。 在一个实施方案中，在集成电路的制造中沉积含二氧化硅的层的方法包括将含有铝的有机前体流动到含有半导体衬底的室，该半导体衬底有效地在衬底上沉积含铝层。 烷氧基硅烷流到包含室内的包含铝的基材的基材中，有效地将二氧化硅包含层沉积在基材上。 在含铝的有机前驱体和烷氧基硅烷中的至少一种中，至少有一个卤素在有效地降低衬底上沉积二氧化硅层的条件下流动的条件下流动，这与在相同条件下将会发生的情况相反，但是 用于提供卤素。 考虑其他实现。

公开(公告)号：US06433378B1

公开(公告)日：2002-08-13

申请号：US09501736

申请日：2000-02-11

申请人： Chris W. Hill

发明人： Chris W. Hill

IPC分类号： H01L27108

CPC分类号： H01L21/02164 ,  H01L21/02129 ,  H01L21/022 ,  H01L21/02271 ,  H01L21/02304 ,  H01L21/31612 ,  Y10S438/906

摘要： A semiconductor processing method for filling structural gaps includes depositing a substantially boron free silicon oxide comprising material at a first average deposition rate over an exposed semiconductive material in a gap between wordline constructions and at a second average deposition rate less than the first average deposition rate over the wordline constructions. A reduced gap having a second aspect ratio less than or equal to a first aspect ratio of the original gap may be provided. An integrated circuit includes a pair of wordline constructions separated by a gap therebetween in areas where the wordline constructions do not cover an underlying semiconductive substrate. A layer of substantially boron free silicon oxide material has a first thickness over the substrate within the gap and has a second thickness less than the first thickness over the wordline constructions.

摘要翻译： 用于填充结构间隙的半导体处理方法包括在第一平均沉积速率之上沉积基本上无硼的氧化硅的材料，其在暴露的半导体材料之间，在字线结构之间的间隙中，并以小于第一平均沉积速率的第二平均沉积速率沉积 字线结构。 可以提供具有小于或等于原始间隙的第一纵横比的第二纵横比的减小的间隙。 集成电路包括一对字线结构，其中字线结构不覆盖下面的半导体衬底的区域之间由间隙隔开。 基本上无硼的氧化硅材料层在间隙内具有衬底上的第一厚度，并且具有比字线结构上的第一厚度小的第二厚度。

公开(公告)号：US06940171B2

公开(公告)日：2005-09-06

申请号：US10100526

申请日：2002-03-18

申请人： Chris W. Hill

发明人： Chris W. Hill

IPC分类号： H01L21/316 ,  H01L21/768 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L21/02129 ,  H01L21/022 ,  H01L21/02271 ,  H01L21/31612 ,  H01L21/31625 ,  H01L21/76801 ,  H01L21/76837 ,  Y10S257/903 ,  Y10S438/958 ,  Y10S438/981

摘要： A multiple dielectric device and its method of manufacture overlaying a semiconductor material, including a substrate, an opening relative to the substrate, the opening having an aspect ratio greater than about two, a first dielectric layer in the opening, wherein a portion of the opening not filled with the first dielectric layer has an aspect ratio of not greater than about two, and a second dielectric layer over said first dielectric layer. The deposition rates of the first and second dielectric layers may be achieved through changes in process settings, such as temperature, reactor chamber pressure, dopant concentration, flow rate, and a spacing between the shower head and the assembly. The dielectric layer of present invention provides a first layer dielectric having a low deposition rate as a first step, and an efficiently formed second dielectric layer as a second completing step.

摘要翻译： 一种覆盖半导体材料的多介质器件及其制造方法，包括衬底，相对于衬底的开口，开口具有大于约2的纵横比，开口中的第一介电层，其中开口部分 未填充有第一介电层的纵横比不大于约2，第二电介质层在所述第一介电层上。 第一和第二电介质层的沉积速率可以通过工艺设置的变化来实现，诸如温度，反应器室压力，掺杂剂浓度，流速以及淋浴头和组件之间的间隔。 本发明的电介质层提供作为第一步骤具有低沉积速率的第一层电介质和作为第二完成步骤的有效形成的第二介电层。

公开(公告)号：US06596641B2

公开(公告)日：2003-07-22

申请号：US09797898

申请日：2001-03-01

申请人： Mark E. Jost ,  Chris W. Hill

发明人： Mark E. Jost ,  Chris W. Hill

IPC分类号： H01L21302

CPC分类号： H01L21/02129 ,  C23C16/401 ,  C23C16/4485 ,  C23C16/45523 ,  H01L21/022 ,  H01L21/02271 ,  H01L21/31116 ,  H01L21/31625 ,  H01L21/76801 ,  H01L21/76802 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76897 ,  Y10S438/935

摘要： A chemical vapor deposition method includes providing a semiconductor substrate within a chemical vapor deposition chamber. At least one liquid deposition precursor is vaporized with a vaporizer to form a flowing vaporized precursor stream. The flowing vaporized precursor stream is initially bypassed from entering the chamber for a first period of time while the substrate is in the deposition chamber. After the first period of time, the flowing vaporized precursor stream is directed to flow into the chamber with the substrate therein under conditions effective to chemical vapor deposit a layer over the substrate. A method of etching a contact opening over a node location on a semiconductor substrate is disclosed.

摘要翻译： 化学气相沉积方法包括在化学气相沉积室内提供半导体衬底。 至少一个液体沉积前体用蒸发器蒸发以形成流动的蒸发的前体物流。 当衬底处于沉积室中时，首先将流动的汽化的前体物流绕过第一时间段进入该室。 在第一时间段之后，在有效使化学气相沉积衬底上的层的条件下，使流动的蒸发的前体物流被引导到其中具有衬底的腔室中。 公开了一种在半导体衬底上的节点位置上蚀刻接触开口的方法。

公开(公告)号：US6100186A

公开(公告)日：2000-08-08

申请号：US60164

申请日：1998-04-14

申请人： Chris W. Hill

发明人： Chris W. Hill

IPC分类号： H01L21/285 ,  H01L21/768 ,  H01L21/4763

CPC分类号： H01L21/76856 ,  H01L21/28518 ,  H01L21/28562 ,  H01L21/76843 ,  H01L21/76879 ,  H01L21/76847

摘要： A contact is selectively formed in a contact hole in an insulating layer deposited on a silicon substrate. The contact hole exposes a portion of the substrate. The contact is formed by selectively forming a first layer of titanium silicide in the contact hole on the exposed portion of the substrate. A layer of titanium nitride is then selectively formed on the first layer of titanium silicide. A second layer of titanium silicide is thereafter selectively formed on the layer of titanium nitride to form the contact.

摘要翻译： 在沉积在硅衬底上的绝缘层的接触孔中选择性地形成接触。 接触孔露出基板的一部分。 通过在衬底的暴露部分上的接触孔中选择性地形成第一层硅化钛来形成接触。 然后在第一层硅化钛上选择性地形成一层氮化钛。 然后在氮化钛层上选择性地形成第二层硅化钛以形成接触。

公开(公告)号：US07429541B2

公开(公告)日：2008-09-30

申请号：US11215934

申请日：2005-08-31

申请人： Garo J. Derderian ,  Chris W. Hill

发明人： Garo J. Derderian ,  Chris W. Hill

IPC分类号： H01L21/469

CPC分类号： H01L21/02164 ,  C23C16/0272 ,  C23C16/402 ,  H01L21/02145 ,  H01L21/02214 ,  H01L21/02271 ,  H01L21/31612 ,  H01L21/76227

摘要： This invention includes methods of depositing a silicon dioxide comprising layer in the fabrication of integrated circuitry, and to methods of forming trench isolation in the fabrication of integrated circuitry. In one implementation, a method of depositing a silicon dioxide comprising layer in the fabrication of integrated circuitry includes flowing an aluminum containing organic precursor to a chamber containing a semiconductor substrate effective to deposit an aluminum comprising layer over the substrate. An alkoxysilanol is flowed to the substrate comprising the aluminum comprising layer within the chamber effective to deposit a silicon dioxide comprising layer over the substrate. At least one halogen is provided within the chamber during at least one of the aluminum containing organic precursor flowing and the alkoxysilanol flowing under conditions effective to reduce rate of the deposit of the silicon dioxide comprising layer over the substrate than would otherwise occur under identical conditions but for providing the halogen. Other implementations are contemplated.

摘要翻译： 本发明包括在制造集成电路中沉积含二氧化硅的层的方法以及在集成电路的制造中形成沟槽隔离的方法。 在一个实施方案中，在集成电路的制造中沉积含二氧化硅的层的方法包括将含有铝的有机前体流动到含有半导体衬底的室，该半导体衬底有效地在衬底上沉积含铝层。 烷氧基硅烷流到包含室内的包含铝的基材的基材中，有效地将二氧化硅包含层沉积在基材上。 在含铝的有机前驱体和烷氧基硅烷中的至少一种中，至少有一个卤素在有效地降低衬底上沉积二氧化硅层的条件下流动的条件下流动，这与在相同条件下将会发生的情况相反，但是 用于提供卤素。 考虑其他实现。