公开(公告)号：US4907734A

公开(公告)日：1990-03-13

申请号：US263806

申请日：1988-10-28

申请人： H. Ward Conru ,  Stephen E. Gons ,  Gordon C. Osborne, Jr. ,  Douglas W. Phelps, Jr. ,  Stephen G. Starr ,  William C. Ward

发明人： H. Ward Conru ,  Stephen E. Gons ,  Gordon C. Osborne, Jr. ,  Douglas W. Phelps, Jr. ,  Stephen G. Starr ,  William C. Ward

IPC分类号： H01R43/00 ,  B23K20/02 ,  B23K20/10 ,  B23K20/22 ,  B23K35/00 ,  H01L21/00 ,  H01L21/607 ,  H01R43/02 ,  H05K3/32 ,  H05K3/34

CPC分类号： H01L24/85 ,  B23K20/023 ,  B23K20/10 ,  B23K20/22 ,  B23K35/007 ,  H01L24/03 ,  H01L24/05 ,  H01L24/48 ,  H01R43/02 ,  H01L2224/04042 ,  H01L2224/05624 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/456 ,  H01L2224/48463 ,  H01L2224/48507 ,  H01L2224/48624 ,  H01L2224/48724 ,  H01L2224/48799 ,  H01L2224/78301 ,  H01L2224/85201 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/85365 ,  H01L2224/85815 ,  H01L24/45 ,  H01L24/78 ,  H01L2924/00011 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10253 ,  H05K3/328 ,  H05K3/3457

摘要： A compression bond is formed between a gold or gold alloy wire and lead/tin solder by forming a head on the wire and forcing the head into a pad of the solder by thermosonic, or thermocompression, or ultrasonic compression bonding techniques. This forms a gold/tin intermetallic compound which in turn forms the bond. The head of the wire is maintained out of contact with any underlying surface, and surrounded by the solder.

公开(公告)号：US5086018A

公开(公告)日：1992-02-04

申请号：US694719

申请日：1991-05-02

申请人： H. Ward Conru ,  Gary H. Irish ,  Francis J. Pakulski ,  William J. Slattery ,  Stephen G. Starr ,  William C. Ward

发明人： H. Ward Conru ,  Gary H. Irish ,  Francis J. Pakulski ,  William J. Slattery ,  Stephen G. Starr ,  William C. Ward

IPC分类号： H01L21/60 ,  H01L21/56 ,  H01L23/495 ,  H01L25/065 ,  H01L25/07 ,  H01L25/18

CPC分类号： H01L24/32 ,  H01L21/56 ,  H01L23/4951 ,  H01L24/05 ,  H01L24/06 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/04042 ,  H01L2224/05556 ,  H01L2224/05599 ,  H01L2224/06136 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48463 ,  H01L2224/48599 ,  H01L2224/73215 ,  H01L2224/85909 ,  H01L2224/92147 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06579 ,  H01L2225/06596 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253

摘要： A method of making a semiconductor chip in which the conductive path between the chip and the lead frame via wires can be easily and reproduceably improved. This is accomplished by improving the bond between the wires and the lead frame members to which the wires are joined and by creating additional contacts between each wire and its respective lead even if the bonded contact breaks or fails at or immediately adjacent to the bonding point. This is accomplished by placing an insulating layer on the active surface of each chip, carrying input and output bonding pads thereon, to which lead frame conductors have been connected by bonding wires. The insulating layer is a thermosetting adhesive and is placed over the lead frame, the bonding wires and the active face of the semiconductor chip so that when a lamination force is applied to the insulating layer the wires will be crushed and held against their respective pads and against the respective leads to which they are connected and the active face of the semiconductor protected by the adhesive bonding thereto. In this way greater contact between the wires and the leads is enhanced and defects or failure in conductivity therebetween reduced or eliminated.

摘要翻译： 一种制造半导体芯片的方法，其中可以容易且可再现地改善芯片和引线框架之间的导线通过导线。 这是通过改善导线与引线框架构件之间的接合而实现的，并且通过在每个导线与其相应引线之间产生附加的接触，即使接合的接触在接合点处或紧邻接合点处断裂或失效。 这通过在每个芯片的有源表面上放置绝缘层来实现，该绝缘层在其上承载有引线框架导体已经通过接合线连接的输入和输出接合焊盘。 绝缘层是热固性粘合剂，并且放置在引线框架，接合线和半导体芯片的有源面之上，使得当层压力施加到绝缘层时，电线将被压碎并保持抵靠它们各自的焊盘，并且 抵靠它们连接的各个引线，并且被粘合剂保护的半导体的有源面与其结合。 以这种方式，电线和引线之间的更大的接触增强，并且导电性的缺陷或故障减少或消除。

公开(公告)号：US5151559A

公开(公告)日：1992-09-29

申请号：US805214

申请日：1991-12-11

申请人： H. Ward Conru ,  Gary H. Irish ,  Francis J. Pakulski ,  William J. Slattery ,  Stephen G. Starr ,  William C. Ward

发明人： H. Ward Conru ,  Gary H. Irish ,  Francis J. Pakulski ,  William J. Slattery ,  Stephen G. Starr ,  William C. Ward

IPC分类号： H01L21/56 ,  H01L23/495 ,  H01L25/065

CPC分类号： H01L24/32 ,  H01L21/56 ,  H01L23/4951 ,  H01L25/0657 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48464 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06579 ,  H01L2225/06596 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/10253

摘要： This is a semiconductor chip in which the conductive path between the chip and the lead frame via wires can be easily and reproduceably improved. This is accomplished by improving the bond between the wires and the lead frame members to which the wires are joined and by creating additional contacts between each wire and its respective lead even if the bonded contact breaks or fails at or immediately adjacent to the bonding point. This is accomplished by placing an insulating layer on the active surface of each chip, carrying input and output bonding pads thereon, to which lead frame conductors have been connected by bonding wires. The insulating layer is a thermosetting adhesive and is placed over the lead frame, the bonding wires and the active face of the semiconductor chip so that when a lamination force is applied to the insulating layer the wires will be crushed and held against their respective pads and against the respective leads to which they are connected and the active face of the semiconductor protected by the adhesive bonding thereto. In this way greater contact between the wires and the leads is enhanced and defects or failure in conductivity therebetween reduced or eliminated.

摘要翻译： 这是一种半导体芯片，其中可以容易且可再生地改善芯片和引线框架之间通过导线的导电路径。 这是通过改善导线与引线框架构件之间的接合而实现的，并且通过在每个导线与其相应引线之间产生附加的接触，即使接合的接触在接合点处或紧邻接合点处断裂或失效。 这通过在每个芯片的有源表面上放置绝缘层来实现，该绝缘层在其上承载有引线框架导体已经通过接合线连接的输入和输出接合焊盘。 绝缘层是热固性粘合剂，并且放置在引线框架，接合线和半导体芯片的有源面之上，使得当层压力施加到绝缘层时，电线将被压碎并保持抵靠它们各自的焊盘，并且 抵靠它们连接的各个引线，并且被粘合剂保护的半导体的有源面与其结合。 以这种方式，电线和引线之间的更大的接触增强，并且导电性的缺陷或故障减少或消除。

公开(公告)号：US4965654A

公开(公告)日：1990-10-23

申请号：US428533

申请日：1989-10-30

申请人： Friedrich A. Karner ,  Douglas W. Phelps, Jr. ,  Stephen G. Starr ,  William C. Ward

发明人： Friedrich A. Karner ,  Douglas W. Phelps, Jr. ,  Stephen G. Starr ,  William C. Ward

IPC分类号： H01L23/36 ,  H01L21/60 ,  H01L23/495 ,  H01L23/50

CPC分类号： H01L24/83 ,  H01L23/4951 ,  H01L23/49531 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48465 ,  H01L2224/73215 ,  H01L2224/83101 ,  H01L2224/8319 ,  H01L2224/838 ,  H01L2224/92147 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0665 ,  H01L2924/14 ,  H01L2924/3011

摘要： A plastic encapsulated semiconductor package in which the connecting lead frame members are deposited over the surface of the device together with a covering ground plane so as to provide enhanced electrical and thermal coupling of the members and the device and so reduce the signal to noise ratio by a factor or greater than three over that available in other similar plastic encapsulated packages while simultaneously improving the transfer of heat out of the package.In particular, a lead frame having a plurality of conductors is attached to a major active surface of a semiconductor chip via a ground plane which, in the preferred embodiment, is a multilayered structure containing an insulated integral, uniform ground plane positioned between the lead frame and the chip and adhesively and insulatively joined to both of them. Wires connect terminals on the major active surface of the semiconductor chip to the ground plane and to selective lead frame conductors. The lead frame, the ground plane structure, the semiconductor chip, and the wires which connect the semiconductor chip terminals to the ground plane and to selected lead frame conductors are encapsulated with a suitable insulating material to form a semiconductor module or package.

公开(公告)号：US4821945A

公开(公告)日：1989-04-18

申请号：US68679

申请日：1987-07-01

申请人： Judith A. Chase ,  Douglas W. Phelps, Jr. ,  Robert J. Redmond ,  Stephen G. Starr

发明人： Judith A. Chase ,  Douglas W. Phelps, Jr. ,  Robert J. Redmond ,  Stephen G. Starr

IPC分类号： B21F15/10 ,  B23K20/00 ,  H01L21/60 ,  H01L21/607 ,  B23K31/02 ,  B23K5/22 ,  B23K37/00

CPC分类号： H01L24/78 ,  B23K20/005 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/78901 ,  H01L2224/85205 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/15787

摘要： A system of single lead clamping and bonding in the assembly of integrated circuit devices. A capillary bonder has a clamp member rotatably mounted around the capillary for movement with the bond head. The clamp is moveable vertically to contact and clamp a terminal to be bonded. The clamp is rotatable to orient itself with respect to the terminal and the fine wire. The capillary and clamp move under computer control to make a series of bonds, typically between lead frame fingers and terminals on a semiconductor device.

公开(公告)号：US5576246A

公开(公告)日：1996-11-19

申请号：US458848

申请日：1995-06-02

申请人： Harold W. Conru ,  Francis E. Froebel ,  Albert J. Gregoritsch, Jr. ,  Sheldon C. Rieley ,  Stephen G. Starr ,  Ronald R. Uttecht ,  Eric J. White ,  Jens G. Pohl

发明人： Harold W. Conru ,  Francis E. Froebel ,  Albert J. Gregoritsch, Jr. ,  Sheldon C. Rieley ,  Stephen G. Starr ,  Ronald R. Uttecht ,  Eric J. White ,  Jens G. Pohl

IPC分类号： H01L23/50 ,  H01L23/00 ,  H01L23/495 ,  H01L21/60

CPC分类号： H01L23/564 ,  H01L23/4951 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48465 ,  H01L2224/73215 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/3011 ,  Y10T29/49121

摘要： A lead on chip (LOC) semiconductor leadframe package provides notched lead-fingers to eliminate mechanical shear-stress at the peripheral edge of a semiconductor chip. Opposite rows of substantially flat cantilevered lead-fingers are attached by double-sided adhesive tape in thermal contact with the active face of a chip. The lead-fingers are routed in personalized paths over the face of the chip to cover a large surface area to aid heat dissipation. All wirebond connections between the lead-fingers and the chip are made at a centerline connection strip running down the center of the chip. Each of the cantilevered lead-fingers has a notched portion positioned directly over the vulnerable peripheral chip edge to reduce thermal, mechanical shear-stress. Additionally, since corrosion typically follows a lead path, the notch provides increasing path length to prevent corrosive ingress over the chip face.

摘要翻译： 片上芯片（LOC）半导体引线框封装提供缺口引线以消除半导体芯片外围边缘的机械剪切应力。 基本上平坦的悬臂式引指的相对排通过双面胶带与芯片的主动面热接触。 引线指状物以个性化的路径布置在芯片的表面上以覆盖大的表面积以有助于散热。 引线指和芯片之间的所有引线键合都是在沿芯片中心延伸的中心线连接条上制成的。 每个悬臂的引指具有直接位于脆弱的外围芯片边缘上方的切口部分，以减少热，机械剪切应力。 此外，由于腐蚀通常遵循引导路径，所以凹口提供增加的路径长度以防止在芯片表面上的腐蚀性侵入。

公开(公告)号：US5545921A

公开(公告)日：1996-08-13

申请号：US334478

申请日：1994-11-04

申请人： Harold W. Conru ,  Francis E. Froebel ,  Albert J. Gregoritsch, Jr. ,  Sheldon C. Rieley ,  Stephen G. Starr ,  Ronald R. Uttecht ,  Eric J. White ,  Jens G. Pohl

发明人： Harold W. Conru ,  Francis E. Froebel ,  Albert J. Gregoritsch, Jr. ,  Sheldon C. Rieley ,  Stephen G. Starr ,  Ronald R. Uttecht ,  Eric J. White ,  Jens G. Pohl

IPC分类号： H01L23/50 ,  H01L23/00 ,  H01L23/495 ,  H01L23/48

CPC分类号： H01L23/564 ,  H01L23/4951 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48465 ,  H01L2224/73215 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/3011 ,  Y10T29/49121

摘要： A lead on chip (LOC) semiconductor leadframe package provides notched lead-fingers to eliminate mechanical shear-stress at the peripheral edge of a semiconductor chip. Opposite rows of substantially flat cantilevered lead-fingers are attached by double-sided adhesive tape in thermal contact with the active face of a chip. The lead-fingers are routed in personalized paths over the face of the chip to cover a large surface area to aid heat dissipation. All wirebond connections between the lead-fingers and the chip are made at a centerline connection strip running down the center of the chip. Each of the cantilevered lead-fingers has a notched portion positioned directly over the vulnerable peripheral chip edge to reduce thermal, mechanical shear-stress. Additionally, since corrosion typically follows a lead path, the notch provides an increasing path length to prevent corrosive ingress over the chip face.

摘要翻译： 片上芯片（LOC）半导体引线框封装提供缺口引线以消除半导体芯片外围边缘的机械剪切应力。 基本上平坦的悬臂式引指的相对排通过双面胶带与芯片的主动面热接触。 引线指状物以个性化的路径布置在芯片的表面上以覆盖大的表面积以有助于散热。 引线指和芯片之间的所有引线键合都是在沿芯片中心延伸的中心线连接条上制成的。 每个悬臂的引指具有直接位于脆弱的外围芯片边缘上方的切口部分，以减少热，机械剪切应力。 此外，由于腐蚀通常遵循引导路径，所以凹口提供增加的路径长度以防止在芯片表面上的腐蚀性侵入。