公开(公告)号：US07080988B2

公开(公告)日：2006-07-25

申请号：US11137061

申请日：2005-05-25

申请人： Harry Hedler ,  Roland Irsigler ,  Thorsten Meyer ,  Andreas Wolter

发明人： Harry Hedler ,  Roland Irsigler ,  Thorsten Meyer ,  Andreas Wolter

IPC分类号： H01R12/00 ,  H05K1/00

CPC分类号： H05K3/4007 ,  G01R1/06711 ,  G01R1/07357 ,  H05K3/326 ,  H05K2201/0133 ,  H05K2201/0367

摘要： The present invention relates to an elastic contact-connecting device. An elastic elevation 3 is applied to a carrier area 2 of a carrier 1. The elastic elevation 3 has a first oblique area 4, a second ramp 5 and a roof area 6. The first oblique area 4 has a lesser inclination (30) with regard to the carrier area 2 than the second oblique area 5. A contact region 20 is applied to the roof area 6 of the elastic elevation. The contact region 20 is connected to other structures 12 on the carrier 1 via a conductor track 10. For this purpose, the conductor track 10 is guided over the first oblique area 4. If a mating contact is pressed onto the contact region 20, the elastic elevation yields, but presses against the mating contact on account of its elastic property and thus enables a reliable contact. In this case, essentially only the second oblique area 5 is deformed; the first oblique area 4 and the conductor track 10 applied thereto are not subjected to any mechanical stress.

摘要翻译： 本发明涉及弹性接触连接装置。 弹性高度3被施加到载体1的载体区域2。 弹性高度3具有第一倾斜区域4，第二斜坡5和屋顶区域6。 第一倾斜区域4相对于载体区域2具有比第二倾斜区域5更小的倾斜度（30）。 接触区域20被施加到弹性高度的屋顶区域6。 接触区域20经由导体轨道10连接到载体1上的其它结构12。 为此，导体轨道10被引导在第一倾斜区域4上。 如果配合接触件被按压到接触区域20上，则由于其弹性而使弹性高度屈服，而是压靠配合接触，因此能够进行可靠的接触。 在这种情况下，基本上仅第二倾斜区域5变形; 施加到其上的第一倾斜区域4和导体轨道10不会受到任何机械应力。

公开(公告)号：US07274107B2

公开(公告)日：2007-09-25

申请号：US11038465

申请日：2005-01-21

申请人： Harry Hedler ,  Thorsten Meyer ,  Andreas Wolter

发明人： Harry Hedler ,  Thorsten Meyer ,  Andreas Wolter

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L23/49827 ,  H01L21/50 ,  H01L23/04 ,  H01L23/13 ,  H01L23/16 ,  H01L23/3114 ,  H01L23/3128 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/83 ,  H01L2224/2919 ,  H01L2224/32014 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/49175 ,  H01L2224/73215 ,  H01L2224/8385 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/12044 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： The present invention relates to semiconductor devices. According to the present invention a semiconductor device is described, comprising: a substrate for carrying a semiconductor chip on a first surface of said substrate; said semiconductor chip being punctually attached to said substrate on said first surface of said substrate via a single attachment point; and means for protecting said semiconductor chip on said first surface of said substrate at least protecting said semiconductor chip laterally.

摘要翻译： 本发明涉及半导体器件。 根据本发明，描述了一种半导体器件，包括：用于在所述衬底的第一表面上承载半导体芯片的衬底; 所述半导体芯片通过单个连接点准时地附接到所述基板的所述第一表面上的所述基板; 以及用于保护所述衬底的所述第一表面上的所述半导体芯片至少保护所述半导体芯片的装置。

公开(公告)号：US20050282410A1

公开(公告)日：2005-12-22

申请号：US11137061

申请日：2005-05-25

申请人： Harry Hedler ,  Roland Irsigler ,  Thorsten Meyer ,  Andreas Wolter

发明人： Harry Hedler ,  Roland Irsigler ,  Thorsten Meyer ,  Andreas Wolter

IPC分类号： G01R1/067 ,  G01R1/073 ,  H01L21/58 ,  H01R12/00 ,  H05K3/32 ,  H05K3/40

CPC分类号： H05K3/4007 ,  G01R1/06711 ,  G01R1/07357 ,  H05K3/326 ,  H05K2201/0133 ,  H05K2201/0367

摘要： The present invention relates to an elastic contact-connecting device. An elastic elevation 3 is applied to a carrier area 2 of a carrier 1. The elastic elevation 3 has a first oblique area 4, a second ramp 5 and a roof area 6. The first oblique area 4 has a lesser inclination (30) with regard to the carrier area 2 than the second oblique area 5. A contact region 20 is applied to the roof area 6 of the elastic elevation. The contact region 20 is connected to other structures 12 on the carrier 1 via a conductor track 10. For this purpose, the conductor track 10 is guided over the first oblique area 4. If a mating contact is pressed onto the contact region 20, the elastic elevation yields, but presses against the mating contact on account of its elastic property and thus enables a reliable contact. In this case, essentially only the second oblique area 5 is deformed; the first oblique area 4 and the conductor track 10 applied thereto are not subjected to any mechanical stress.

摘要翻译： 本发明涉及弹性接触连接装置。 弹性高度3被施加到载体1的载体区域2。 弹性高度3具有第一倾斜区域4，第二斜坡5和屋顶区域6。 第一倾斜区域4相对于载体区域2具有比第二倾斜区域5更小的倾斜度（30）。 接触区域20被施加到弹性高度的屋顶区域6。 接触区域20经由导体轨道10连接到载体1上的其它结构12。 为此，导体轨道10被引导在第一倾斜区域4上。 如果配合接触件被按压到接触区域20上，则由于其弹性而使弹性高度屈服，而是压靠配合接触，因此能够进行可靠的接触。 在这种情况下，基本上仅第二倾斜区域5变形; 施加到其上的第一倾斜区域4和导体轨道10不会受到任何机械应力。

公开(公告)号：US20060163727A1

公开(公告)日：2006-07-27

申请号：US11038465

申请日：2005-01-21

申请人： Harry Hedler ,  Thorsten Meyer ,  Andreas Wolter

发明人： Harry Hedler ,  Thorsten Meyer ,  Andreas Wolter

IPC分类号： H01L23/48

CPC分类号： H01L23/49827 ,  H01L21/50 ,  H01L23/04 ,  H01L23/13 ,  H01L23/16 ,  H01L23/3114 ,  H01L23/3128 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/83 ,  H01L2224/2919 ,  H01L2224/32014 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/49175 ,  H01L2224/73215 ,  H01L2224/8385 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/12044 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： The present invention relates to semiconductor devices. According to the present invention a semiconductor device is described, comprising: a substrate for carrying a semiconductor chip on a first surface of said substrate; said semiconductor chip being punctually attached to said substrate on said first surface of said substrate via a single attachment point; and means for protecting said semiconductor chip on said first surface of said substrate at least protecting said semiconductor chip laterally.

摘要翻译： 本发明涉及半导体器件。 根据本发明，描述了一种半导体器件，包括：用于在所述衬底的第一表面上承载半导体芯片的衬底; 所述半导体芯片通过单个连接点准时地附接到所述基板的所述第一表面上的所述基板; 以及用于保护所述衬底的所述第一表面上的所述半导体芯片至少保护所述半导体芯片的装置。

公开(公告)号：US07928590B2

公开(公告)日：2011-04-19

申请号：US11464784

申请日：2006-08-15

申请人： Andreas Wolter ,  Harry Hedler ,  Matthias Georgi

发明人： Andreas Wolter ,  Harry Hedler ,  Matthias Georgi

IPC分类号： H01L23/29

CPC分类号： H01L25/0657 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2225/06586 ,  H01L2225/06589 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012

摘要： Integrated circuit assembly including a die stack assembly having a heat dissipation device thermally coupled to a lateral of surface the die stack assembly. The die stack assembly includes a plurality integrated circuits placed on each other. In another embodiment a heat dissipation device comprising an encapsulant is thermally coupled to and surrounds a die stack assembly that includes a plurality of integrated circuits placed on each other. At least one heat conducting intermediate layer between integrated circuits is thermally coupled to the heat dissipation device.

摘要翻译： 集成电路组件包括具有散热装置的管芯堆叠组件，所述散热装置热耦合到模具堆叠组件的表面侧面。 模具堆叠组件包括彼此放置的多个集成电路。 在另一个实施例中，包括密封剂的散热装置热耦合到并包围包括彼此放置的多个集成电路的管芯堆叠组件。 集成电路之间的至少一个导热中间层热耦合到散热装置。

公开(公告)号：US20090212420A1

公开(公告)日：2009-08-27

申请号：US12035645

申请日：2008-02-22

申请人： Harry Hedler ,  Roland Irsigler ,  Andreas Wolter

发明人： Harry Hedler ,  Roland Irsigler ,  Andreas Wolter

IPC分类号： H01L23/48 ,  H01L21/56

CPC分类号： H01L23/3128 ,  H01L21/56 ,  H01L21/6835 ,  H01L23/5389 ,  H01L25/50 ,  H01L2221/68377 ,  H01L2224/16 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/82039 ,  H01L2224/92144 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/19011 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19103 ,  H01L2924/19105 ,  H01L2924/30105

摘要： Fabricating an integrated circuit device includes providing a semiconductor substrate comprising a first surface and a sec-ond surface, forming a wiring layer on the first surface of the semiconductor substrate, providing a circuit chip, and arranging the circuit chip on the wiring layer of the semi-conductor substrate. The fabricating further includes forming an embedding layer on the wiring layer and on the circuit chip, the embedding layer encapsulating the circuit chip, thinning the semiconductor substrate at the second surface after forming the embedding layer, and forming a conductive via in the semiconductor substrate being electrically coupled to the wiring layer and exposed at the second surface of the semiconductor substrate. Moreover, an integrated circuit de-vice is described.

摘要翻译： 制造集成电路器件包括提供包括第一表面和第二表面的半导体衬底，在半导体衬底的第一表面上形成布线层，提供电路芯片，并将电路芯片布置在 半导体衬底。 所述制造还包括在布线层和电路芯片上形成嵌入层，所述嵌入层封装所述电路芯片，在形成所述嵌入层之后使所述第二表面上的所述半导体衬底变薄，并且在所述半导体衬底中形成导电通孔， 电耦合到布线层并暴露在半导体基板的第二表面。 此外，还描述了集成电路设备。

公开(公告)号：US08049310B2

公开(公告)日：2011-11-01

申请号：US12060731

申请日：2008-04-01

申请人： Andreas Wolter ,  Harry Hedler ,  Roland Irsigler

发明人： Andreas Wolter ,  Harry Hedler ,  Roland Irsigler

IPC分类号： H01L21/768

CPC分类号： H01L23/481 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L25/0657 ,  H01L2224/02126 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/10125 ,  H01L2224/13009 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/0002 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12044 ,  H01L2924/00 ,  H01L2224/05552

摘要： A semiconductor device is provided configured to be electrically connected to another device by through silicon interconnect technology. The semiconductor device includes a semiconductor substrate with at least one through hole. A through silicon conductor extends inside the through hole from the upper side to the bottom side of the semiconductor substrate. The through silicon conductor is electrical isolated from the semiconductor substrate and includes a conductor bump at one of its ends. Between the inner surface of the through hole and the through silicon conductor a gap is formed. The gap surrounds the through silicon conductor on one side of the semiconductor substrate having the conductor bump, and extends from this side of the substrate into the substrate. The gap is filled with a flexible dielectric material.

摘要翻译： 半导体器件被配置为通过硅互连技术与另一器件电连接。 半导体器件包括具有至少一个通孔的半导体衬底。 贯通硅导体从半导体基板的上侧到下侧延伸穿过通孔。 通硅导体与半导体衬底电隔离并且在其一端处包括导体凸块。 在通孔的内表面和贯通硅导体之间形成间隙。 间隙围绕具有导体突起的半导体衬底的一侧上的贯通硅导体，并且从衬底的该侧延伸到衬底中。 间隙填充有柔性电介质材料。

公开(公告)号：US20110217812A1

公开(公告)日：2011-09-08

申请号：US13109825

申请日：2011-05-17

申请人： Harry Hedler ,  Roland Irsigler ,  Andreas Wolter

发明人： Harry Hedler ,  Roland Irsigler ,  Andreas Wolter

IPC分类号： H01L21/98 ,  H01L21/60 ,  H01L21/56

CPC分类号： H01L23/3128 ,  H01L21/56 ,  H01L21/6835 ,  H01L23/5389 ,  H01L25/50 ,  H01L2221/68377 ,  H01L2224/16 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/82039 ,  H01L2224/92144 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/19011 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19103 ,  H01L2924/19105 ,  H01L2924/30105

摘要： Fabricating an integrated circuit device includes providing a semiconductor substrate comprising a first surface and a second surface, forming a wiring layer on the first surface of the semiconductor substrate, providing a circuit chip, and arranging the circuit chip on the wiring layer of the semiconductor substrate. The fabricating further includes forming an embedding layer on the wiring layer and on the circuit chip, the embedding layer encapsulating the circuit chip, thinning the semiconductor substrate at the second surface after forming the embedding layer, and forming a conductive via in the semiconductor substrate being electrically coupled to the wiring layer and exposed at the second surface of the semiconductor substrate. Moreover, an integrated circuit device is described.

摘要翻译： 制造集成电路器件包括提供包括第一表面和第二表面的半导体衬底，在半导体衬底的第一表面上形成布线层，提供电路芯片，并将电路芯片布置在半导体衬底的布线层上 。 所述制造还包括在布线层和电路芯片上形成嵌入层，所述嵌入层封装所述电路芯片，在形成所述嵌入层之后使所述第二表面上的所述半导体衬底变薄，并且在所述半导体衬底中形成导电通孔， 电耦合到布线层并暴露在半导体基板的第二表面。 此外，描述了集成电路器件。

公开(公告)号：US20080042261A1

公开(公告)日：2008-02-21

申请号：US11464784

申请日：2006-08-15

申请人： Andreas Wolter ,  Harry Hedler ,  Matthias Georgi

发明人： Andreas Wolter ,  Harry Hedler ,  Matthias Georgi

IPC分类号： H01L23/34 ,  H01L21/00

CPC分类号： H01L25/0657 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2225/06586 ,  H01L2225/06589 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012

摘要： Integrated circuit assembly including a die stack assembly having a heat dissipation device thermally coupled to a lateral of surface the die stack assembly. The die stack assembly includes a plurality integrated circuits placed on each other. In another embodiment a heat dissipation device comprising an encapsulant is thermally coupled to and surrounds a die stack assembly that includes a plurality of integrated circuits placed on each other. At least one heat conducting intermediate layer between integrated circuits is thermally coupled to the heat dissipation device.

摘要翻译： 集成电路组件包括具有散热装置的管芯堆叠组件，所述散热装置热耦合到模具堆叠组件的表面侧面。 模具堆叠组件包括彼此放置的多个集成电路。 在另一个实施例中，包括密封剂的散热装置热耦合到并包围包括彼此放置的多个集成电路的管芯堆叠组件。 集成电路之间的至少一个导热中间层热耦合到散热装置。

公开(公告)号：US20090243047A1

公开(公告)日：2009-10-01

申请号：US12060731

申请日：2008-04-01

申请人： Andreas Wolter ,  Harry Hedler ,  Roland Irsigler

发明人： Andreas Wolter ,  Harry Hedler ,  Roland Irsigler

IPC分类号： H01L23/48 ,  H01L21/44

CPC分类号： H01L23/481 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L25/0657 ,  H01L2224/02126 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/10125 ,  H01L2224/13009 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/0002 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12044 ,  H01L2924/00 ,  H01L2224/05552

摘要： A semiconductor device is provided configured to be electrically connected to another device by through silicon interconnect technology. The semiconductor device includes a semiconductor substrate with at least one through hole. A through silicon conductor extends inside the through hole from the upper side to the bottom side of the semiconductor substrate. The through silicon conductor is electrical isolated from the semiconductor substrate and includes a conductor bump at one of its ends. Between the inner surface of the through hole and the through silicon conductor a gap is formed. The gap surrounds the through silicon conductor on one side of the semiconductor substrate having the conductor bump, and extends from this side of the substrate into the substrate. The gap is filled with a flexible dielectric material.

摘要翻译： 半导体器件被配置为通过硅互连技术与另一器件电连接。 半导体器件包括具有至少一个通孔的半导体衬底。 贯通硅导体从半导体基板的上侧到下侧延伸穿过通孔。 通硅导体与半导体衬底电隔离并且在其一端处包括导体凸块。 在通孔的内表面和贯通硅导体之间形成间隙。 间隙围绕具有导体突起的半导体衬底的一侧上的贯通硅导体，并且从衬底的该侧延伸到衬底中。 间隙填充有柔性电介质材料。