公开(公告)号：US4794445A

公开(公告)日：1988-12-27

申请号：US78999

申请日：1987-07-29

申请人： Hideo Homma ,  Yutaka Misawa ,  Naohiro Momma

发明人： Hideo Homma ,  Yutaka Misawa ,  Naohiro Momma

IPC分类号： H01L29/73 ,  H01L21/20 ,  H01L21/331 ,  H01L21/74 ,  H01L21/762 ,  H01L29/732 ,  H01L23/08 ,  H01L23/54

CPC分类号： H01L21/2007 ,  H01L21/74 ,  H01L21/76264 ,  H01L21/76297 ,  H01L29/7325 ,  H01L21/76275 ,  H01L21/76281

摘要： A semiconductor device has a structure in which two semiconductor substrates are coupled to each other through a semiconductor oxide film and a metal silicide film, and a semiconductor element, for example, a bi-polar transistor is formed in the semiconductor substrate on the metal silicide film side, whereby a metal silicide layer having a high melting point is provided beneath one region of the bi-polar transistor for example, an n.sup.+ buried collector layer and in ohmic contact with the n.sup.+ buried collector layer. An electrical isolation between the adjacent semiconductor elements is made by an insulating layer.

公开(公告)号：US4735916A

公开(公告)日：1988-04-05

申请号：US13252

申请日：1987-02-10

申请人： Hideo Homma ,  Yutaka Misawa ,  Naohiro Momma

发明人： Hideo Homma ,  Yutaka Misawa ,  Naohiro Momma

IPC分类号： H01L27/06 ,  H01L21/033 ,  H01L21/3213 ,  H01L21/331 ,  H01L21/336 ,  H01L21/8234 ,  H01L21/8249 ,  H01L29/73 ,  H01L29/732 ,  H01L29/78 ,  H01L21/385

CPC分类号： H01L29/66272 ,  H01L21/0337 ,  H01L21/32137 ,  H01L21/8249 ,  H01L29/41783 ,  H01L29/6659 ,  H01L29/78 ,  H01L29/66545

摘要： A method of fabricating a semiconductor device includes the steps of: forming at least one first semiconductor region of a first conductivity type and at least one second semiconductor region of a second conductivity type in a main surface of a semiconductor layer of the first conductivity type; forming a three-layer film having a desired shape on each of the first and second semiconductor regions, the three-layer film being made up of a bottom layer which is a conductive film, an intermediate layer which is a silicon nitride film, and a top layer which is a polycrystalline silicon film doped with one of arsenic and phosphorus; forming a first insulating layer on the side wall of the three-layer film; forming a second polycrystalline silicon film on the whole surface, and diffusing one of arsenic and phosphorus from the first polycrystalline silicon film into the second polycrystalline silicon film; selectively etching off the first polycrystalline silicon film and that portion of the second polycrystalline silicon film, in which one of arsenic and phosphorus has been diffused; forming a second insulating layer at least on the surface of the portion of the second polycrystalline silicon film which exists on the second semiconductor region; removing the silicon nitride film and the conductive film which exist on the second semiconductor region, while using the second insulating layer as a mask, to form an aperture; and forming a third polycrystalline silicone film so that the aperture is covered by the third polycrystalline silicon film.

摘要翻译： 一种制造半导体器件的方法包括以下步骤：在第一导电类型的半导体层的主表面中形成第一导电类型的至少一个第一半导体区域和第二导电类型的至少一个第二半导体区域; 在第一和第二半导体区域中的每一个上形成具有期望形状的三层膜，该三层膜由作为导电膜的底层，作为氮化硅膜的中间层和 顶层，其是掺杂有砷和磷之一的多晶硅膜; 在三层膜的侧壁上形成第一绝缘层; 在整个表面上形成第二多晶硅膜，并将砷和磷中的一种从第一多晶硅膜扩散到第二多晶硅膜中; 选择性地蚀刻出第一多晶硅膜和其中砷和磷之一已经扩散的第二多晶硅膜的那部分; 至少在所述第二半导体区域上存在的所述第二多晶硅膜的所述部分的表面上形成第二绝缘层; 在使用第二绝缘层作为掩模的同时，除去存在于第二半导体区域上的氮化硅膜和导电膜，以形成孔径; 以及形成第三多晶硅膜，使得所述孔被所述第三多晶硅膜覆盖。

公开(公告)号：US4415385A

公开(公告)日：1983-11-15

申请号：US291042

申请日：1981-08-07

申请人： Osamu Saito ,  Hideo Homma ,  Hirokazu Inoue ,  Naohiro Momma

发明人： Osamu Saito ,  Hideo Homma ,  Hirokazu Inoue ,  Naohiro Momma

IPC分类号： C30B31/10 ,  H01L21/223

CPC分类号： C30B31/10 ,  H01L21/223

摘要： A dual-enclosure semi-closed diffusion wherein an outer enclosure is evacuatable and an inner enclosure has a limited aperture, the inner enclosure includes a diffusion vessel having an aperture and a baffle for partially blocking the aperture to leave the limited aperture.The outer enclosure is not directly exposed to impurity vapor and sustains a pressure difference, while the inner enclosure is not subjected to a substantial pressure difference.

摘要翻译： 双外壳半封闭扩散，其中外壳是可抽空的并且内壳具有有限的孔，所述内壳包括扩散容器，所述扩散容器具有孔和挡板，用于部分地阻挡孔以离开有限的孔。 外壳不会直接暴露于杂质蒸气并保持压力差，而内壳不会受到显着的压差。

公开(公告)号：US5084355A

公开(公告)日：1992-01-28

申请号：US336788

申请日：1989-04-13

申请人： Shigeru Takahashi ,  Takuya Fukuda ,  Toshiya Satoh ,  Seikichi Tanno ,  Michio Ohue ,  Naohiro Momma ,  Yutaka Misawa

发明人： Shigeru Takahashi ,  Takuya Fukuda ,  Toshiya Satoh ,  Seikichi Tanno ,  Michio Ohue ,  Naohiro Momma ,  Yutaka Misawa

IPC分类号： G11B7/243 ,  G11B7/244 ,  G11B7/253 ,  G11B7/2533 ,  G11B7/254 ,  G11B7/257 ,  G11B7/2578 ,  G11B7/26 ,  H01L23/14 ,  H01L23/498 ,  H05K3/38

CPC分类号： H05K3/388 ,  G11B7/2533 ,  G11B7/257 ,  G11B7/26 ,  H01L23/145 ,  H01L23/49866 ,  G11B2007/24306 ,  G11B2007/25706 ,  G11B2007/25708 ,  G11B2007/2571 ,  G11B7/2578 ,  H01L2924/0002 ,  Y10S428/90 ,  Y10S428/901 ,  Y10T428/31678

摘要： A laminar structure comprising an organic material and an inorganic material; for example, a coating structure on an organic substrate comprising an organic material on which an inorganic film must be formed and a method of producing the structure, a structure which is suitable for increasing the reliability of an optical disk and a method of producing this, a wiring structure on an organic substrate comprising the organic material on which electric wiring must be formed and a method of producing this, and a structure suitable for increasing the reliability of a semiconductor integrated circuit device and a method of producing this. In order to provide a laminar structure which exhibits a high degree of reliability with respect to prevention of cracks or separation and which comprises an organic material and an inorganic material and a method of producing this structure and a device which utilizes this structure, the present invention provides a laminar structure on an organic substrate comprising the organic substrate comprising an organic material and a thin film which is caused to adhere to the surface of the organic substrate and which comprises an inorganic material a second element which produces a metal bonding or covalent bonding with the first element that forms the thin film being contained in the organic substrate in the vicinity of the surface thereof.

公开(公告)号：US20050132814A1

公开(公告)日：2005-06-23

申请号：US11049872

申请日：2005-02-04

申请人： Shinya Satou ,  Satoshi Shimada ,  Atsuo Watanabe ,  Yasuo Onose ,  Seiji Kuryu ,  Atsushi Miyazaki ,  Junichi Horie ,  Naohiro Momma

发明人： Shinya Satou ,  Satoshi Shimada ,  Atsuo Watanabe ,  Yasuo Onose ,  Seiji Kuryu ,  Atsushi Miyazaki ,  Junichi Horie ,  Naohiro Momma

IPC分类号： B81B3/00 ,  B81B7/00 ,  G01L7/08 ,  G01L9/00 ,  H01L21/00

CPC分类号： B81C1/00333 ,  B81B2201/0264 ,  B81B2203/0127 ,  B81C1/00293 ,  B81C2203/0145 ,  G01L9/0042 ,  G01L9/0073

摘要： The object of the present invention is to propose an etch channel sealing structure characterized by excellent impermeability to moisture and resistance to temporal change of the diaphragm in the pressure sensor produced according to the sacrificial layer etching technique, and to provide a pressure sensor characterized by excellent productivity and durability. After a very small gap is formed by the sacrificial layer etching technique, silicon oxide film is deposited by the CVD technique or the like, there by sealing the etch channel. Further, impermeable thin film of polysilicon or the like is formed to cover the oxide film. This allows an etch channel sealing structure to be simplified in the pressure sensor produced according to the sacrificial layer etching technique, and prevents entry of moisture into the cavity, thereby improving moisture resistance. Moreover, sealing material with small film stress reduces temporal deformation of the diaphragm.

摘要翻译： 本发明的目的是提出一种蚀刻通道密封结构，其特征在于对根据牺牲层蚀刻技术制造的压力传感器中的防潮性和抗隔膜的时间变化具有优异的防渗性，并且提供了一种特征在于优异的压力传感器 生产力和耐久性。 在通过牺牲层蚀刻技术形成非常小的间隙之后，通过密封蚀刻通道，通过CVD技术等沉积氧化硅膜。 此外，形成多晶硅等的不渗透性薄膜以覆盖氧化物膜。 这允许在根据牺牲层蚀刻技术产生的压力传感器中简化蚀刻通道密封结构，并且防止水分进入空腔，从而改善耐湿性。 此外，具有小膜应力的密封材料减小了隔膜的时间变形。

公开(公告)号：USRE34158E

公开(公告)日：1993-01-12

申请号：US744514

申请日：1991-08-13

申请人： Atsuo Watanabe ,  Takahiro Nagano ,  Takahide Ikeda ,  Naohiro Momma ,  Ryuichi Saito

发明人： Atsuo Watanabe ,  Takahiro Nagano ,  Takahide Ikeda ,  Naohiro Momma ,  Ryuichi Saito

IPC分类号： H01L21/762 ,  H01L21/763 ,  H01L21/8238 ,  H01L27/06 ,  H01L27/092

CPC分类号： H01L27/0928 ,  H01L21/76224 ,  H01L21/763 ,  H01L21/823892 ,  H01L27/0623

摘要： A monolithic complementary semiconductor device comprising n-type and p-type well regions separated by a dielectric isolation region extending from the surface into the substrate region. The well region includes a highly doped buried region which is located at the bottom of the well region and separates an active region in the wall from the substrate region. The isolation region is deeper than the buried region. The well-to-well isolation is enhanced by the combination of the buried region and the deep dielectric isolation region. Packing density and the high speed operation can also be improved.

公开(公告)号：US4879041A

公开(公告)日：1989-11-07

申请号：US172583

申请日：1988-03-24

申请人： Hideaki Kurokawa ,  Akira Yamada ,  Yasuo Koseki ,  Harumi Matsuzaki ,  Katsuya Ebara ,  Sankichi Takahashi ,  Hiroaki Yoda ,  Nobuatsu Hayashi ,  Isao Okouchi ,  Yukio Hishinuma ,  Naohiro Momma

发明人： Hideaki Kurokawa ,  Akira Yamada ,  Yasuo Koseki ,  Harumi Matsuzaki ,  Katsuya Ebara ,  Sankichi Takahashi ,  Hiroaki Yoda ,  Nobuatsu Hayashi ,  Isao Okouchi ,  Yukio Hishinuma ,  Naohiro Momma

IPC分类号： B01D3/06 ,  C02F1/04

CPC分类号： B01D61/364 ,  B01D3/06 ,  C02F1/045 ,  Y10S210/90

摘要： The present invention relates to a process for producing ultra-pure water, an apparatus for producing said ultra-pure water and a process for using the ultra-pure water produced according to said process. More particularly, the present invention relates to a process for producing ultra-pure water which comprises boiling a raw water to vaporize off the volatile components from the raw water, subsequently generating steam from the water, contacting the steam with a hydrophobic, porous, gas-permeable and liquid-impermeable membrane to make the steam permeate the membrane, and then condensing the steam, as well as to an apparatus for producing said ultra-pure water and a process for using said ultra-pure water.

公开(公告)号：US4862240A

公开(公告)日：1989-08-29

申请号：US85260

申请日：1987-08-12

申请人： Atsuo Watanabe ,  Takahiro Nagano ,  Takahide Ikeda ,  Naohiro Momma ,  Ryuichi Saito

发明人： Atsuo Watanabe ,  Takahiro Nagano ,  Takahide Ikeda ,  Naohiro Momma ,  Ryuichi Saito

IPC分类号： H01L29/78 ,  H01L21/74 ,  H01L21/762 ,  H01L21/763 ,  H01L21/8238 ,  H01L27/06 ,  H01L27/092

CPC分类号： H01L21/76224 ,  H01L21/74 ,  H01L21/76205 ,  H01L21/763 ,  H01L21/823892 ,  H01L27/092 ,  H01L27/0623

摘要： A monolithic complementary semiconductor device comprising n-type and p-type well regions separated by a dielectric isolation region extending from the surface into the substrate region. The well region includes a highly doped buried region which is located at the bottom of the well region and separates an active region in the well from the substrate region. The isolation region is deeper than the buried region. The well-to-well isolation is enhanced by the combination of the buried region and the deep dielectric isolation region. Packing density and the high speed operation can also be improved.

摘要翻译： 一种单片互补半导体器件，包括由从表面延伸到衬底区域的电介质隔离区隔开的n型和p型阱区。 阱区域包括高度掺杂的掩埋区域，其位于阱区域的底部并且将阱中的有源区域与衬底区域分离。 隔离区域比掩埋区域深。 通过掩埋区域和深介电隔离区域的组合增强了井对阱隔离。 包装密度和高速运转也可以提高。

公开(公告)号：US5883403A

公开(公告)日：1999-03-16

申请号：US720017

申请日：1996-09-27

申请人： Katsumi Ishikawa ,  Katsuaki Saito ,  Yutaka Sato ,  Atsuo Watanabe ,  Shuji Katoh ,  Naohiro Momma

发明人： Katsumi Ishikawa ,  Katsuaki Saito ,  Yutaka Sato ,  Atsuo Watanabe ,  Shuji Katoh ,  Naohiro Momma

IPC分类号： H01L29/32 ,  H01L29/74 ,  H01L31/111

CPC分类号： H01L29/74 ,  H01L29/32 ,  H01L29/861 ,  Y10S257/913

摘要： In a semiconductor device, such as a diode and thyristor, having at least one pn junction between a pair of main surfaces, a first main electrode formed on the surface of one of the main surfaces and a second main electrode formed on the surface of the other one of the main surfaces, a semiconductor lattice defect is formed such that its lattice defect density increases gradually in the direction from the first main electrode to the second main electrode. Since the distribution of the carrier density in the conduction state can be flattened, the reverse recovery charge can be reduced substantially without causing the ON-state voltage to increase.

摘要翻译： 在诸如二极管和晶闸管之类的半导体器件中，在一对主表面之间具有至少一个pn结，形成在一个主表面的表面上的第一主电极和形成在主表面上的第二主电极 主表面中的另一个，形成半导体晶格缺陷，使得其晶格缺陷密度在从第一主电极到第二主电极的方向上逐渐增加。 由于载流子密度在导通状态下的分布可以变平，所以可以大大降低反向恢复电荷，而不会导致导通状态电压增加。

公开(公告)号：US5726488A

公开(公告)日：1998-03-10

申请号：US243325

申请日：1994-05-16

申请人： Atsuo Watanabe ,  Yoshiaki Yazawa ,  Atsushi Hiraishi ,  Masataka Minami ,  Takahiro Nagano ,  Takahide Ikeda ,  Naohiro Momma

发明人： Atsuo Watanabe ,  Yoshiaki Yazawa ,  Atsushi Hiraishi ,  Masataka Minami ,  Takahiro Nagano ,  Takahide Ikeda ,  Naohiro Momma

IPC分类号： H01L21/8234 ,  H01L21/8238 ,  H01L21/8249 ,  H01L27/06 ,  H01L27/088 ,  H01L27/092 ,  H01L29/78 ,  H01L27/02

CPC分类号： H01L27/0623 ,  H01L21/8238 ,  H01L21/8249 ,  Y10S257/921

摘要： A semiconductor device has a well region formed in the surface of a substrate, and has functional portions such as MOSFET and bipolar transistor formed in the well region. The carrier concentration profile of the well region assumes the shape of a valley in the direction of depth thereof, and a minimum point thereof has a concentration of smaller than 5.times.10.sup.15 cm.sup.-3 and is located at a position within 1.6 .mu.m from the surface of the substrate. Preferably, the minimum point should have a concentration of greater than 5.times.10.sup.14 cm.sup.-3 but smaller than 5.times.10.sup.15 cm.sup.-3, and more preferably a concentration of greater than 1.times.10.sup.15 cm.sup.-3 but smaller than 5.times.10.sup.15 cm.sup.-3.

摘要翻译： 半导体器件具有在衬底的表面中形成的阱区，并且具有形成在阱区中的诸如MOSFET和双极晶体管的功能部分。 阱区域的载流子浓度分布呈深谷方向的谷状，其最小点浓度小于5×10 15 cm -3，位于距离其表面1.6m以内的位置 底物。 优选地，最小点应该具有大于5×10 14 cm -3但小于5×10 15 cm -3的浓度，更优选大于1×10 15 cm -3但小于5×10 15 cm -3的浓度。