Abstract:
The new structure of a memory cell which enables avoiding the problem of a step without increasing the number of processes, the structure of a semiconductor integrated circuit in which a common part of the same substrate in a manufacturing process is increased and the structure of the semiconductor integrated circuit which allows measures for environment obstacles without increasing the number of processes are disclosed. Memory cell structure in which a capacitor is formed in the uppermost layer of plural metal wiring layers by connecting the storage node of the capacitor to a diffusion layer via plugs and pads is adopted. It is desirable that a dielectric film formed in a metal wiring layer under the uppermost layer and a supplementary capacitor composed of a storage node and a plate electrode are connected to the capacitor. It is also desirable that the plate electrode of the capacitor covers the chip.
Abstract:
A semiconductor device has a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type contacted by respective first and second electrodes. A semi-insulating layer extends between the first and second electrodes and there is a first insulating layer between the semi-insulating layer and the first semiconductor region. The sheet resistivity of the semi-insulating layer varies, and this improves the high breakdown voltage of the p-n junction of the semiconductor device between the first and second semiconductor layers, by acting as a shield for charges included on a passivation insulation layer covering the semi-insulating layer and the first and second electrodes. Third semiconductor regions, with corresponding third electrodes, extend around, and are spaced from, the second semiconductor region. The third electrodes extend over the parts of the first semiconductor region adjacent the third semiconductor regions, and this also serve to improve the breakdown voltage. The second electrode may also extend over the part of the first semiconductor region adjacent the second semiconductor region to cover the p-n junction therebetween.
Abstract:
In a plasma processing apparatus which forms a gaseous raw material into a plasma by using electron cyclotron resonance and processes a substrate, leading-edge opening portions of an introduction tube into which a gaseous raw material is introduced are formed in the inner wall surface of the container in such a way that they do not project within the vacuum container. A heater is wound around the introduction pipe so that the opening portions thereof can be heated. With this construction, even if a gaseous raw material which is a liquid or solid at normal temperature and normal pressure is made to flow, the gaseous raw material can be prevented from being liquefied or solidified in the opening portions of the introduction pipe, and the opening portions of the introduction pipe can be prevented from being clogged. In addition, since there are no projections within the vacuum container, the propagation of microwaves is not impeded, making it possible to uniformity process the substrate.
Abstract:
In a system for transferring a plate-shaped member with interleaving paper thereon, a suction adhesion device included in a suction adhesion unit includes suction pads that adhere to a surface of a glass plate by suction with interleaving paper in between the surface and the suction pads; an air blowing device blows air between the adhered glass plate and a glass plate positioned below the adhered glass plate; a robot moves the suction adhesion unit; a clamping device includes a pair of pushing members that are arranged at both sides, respectively, of the glass plates and move toward the glass plates to come close to each other; and at least before the suction adhesion unit lifts the adhered glass plate, a controller causes the pair of pushing members to move to push protruding portions of pieces of interleaving paper, the protruding portions protruding from the sides of the glass plates.
Abstract:
A drive motor mounting structure of an electric vehicle, including: a drive motor unit (12) having its front part attached to a vehicle body member (17) in a front part of a vehicle (10) by use of a front motor mount (27); and a rigid robust member (31) disposed in front of and obliquely above the drive motor unit (12), and above and in front of the front motor mount (27).
Abstract:
An SOG film 16 obtained by heat-treating a polysilazan type SOG film at high temperature of about 800° C. is used as a planarized insulating film to be formed on the gate electrode (9; see FIGS. 31 and 32) of a MISFET (Qs, Qn, Qp) A polysilazan SOG film (57) not subjected to such a heat treatment is used as interlayer insulating film arranged among upper wiring layers (54, 55, 56, 62, 63).
Abstract:
In a DRAM having a capacitor-over-bitline structure in which the capacitive insulating film of an information storing capacitive element C is formed of a high dielectric material such as Ta2O5 (tantalum oxide) film 46, the portions of bit lines BL and first-layer interconnect lines 23 to 26 of a peripheral circuit which are in contact with at least an underlying silicon oxide film 28 are formed of a W film, the bit lines BL and the interconnect lines 23 to 26 being arranged below the information storing capacitive element C, whereby the adhesion at the interface between the bit lines BL and the interconnect lines 23 to 26 and the silicon oxide film is improved in terms of high-temperature heat treatment to be performed when the capacitive insulating film is being formed.
Abstract translation:在具有电容器的位线结构的DRAM中,信息存储电容元件C的电容绝缘膜由诸如Ta 2 O 5(氧化钽)膜46的高电介质材料形成,位线BL和第一 - 与W膜形成的与外部电路至少底层的氧化硅膜28接触的层间布线23〜26,位线BL和布线23〜26配置在信息存储电容元件C的下方 从而在形成电容绝缘膜时进行的高温热处理方面提高了位线BL与布线23〜26之间界面处的粘附性和氧化硅膜。
Abstract:
In a system for transferring a plate-shaped member with interleaving paper thereon, a suction adhesion device included in a suction adhesion unit includes suction pads that adhere to a surface of a glass plate by suction with interleaving paper in between the surface and the suction pads; an air blowing device blows air between the adhered glass plate and a glass plate positioned below the adhered glass plate; a robot moves the suction adhesion unit; a clamping device includes a pair of pushing members that are arranged at both sides, respectively, of the glass plates and move toward the glass plates to come close to each other; and at least before the suction adhesion unit lifts the adhered glass plate, a controller causes the pair of pushing members to move to push protruding portions of pieces of interleaving paper, the protruding portions protruding from the sides of the glass plates.
Abstract:
The new structure of a memory cell which enables avoiding the problem of a step without increasing the number of processes, the structure of a semiconductor integrated circuit in which a common part of the same substrate in a manufacturing process is increased and the structure of the semiconductor integrated circuit which allows measures for environment obstacles without increasing the number of processes are disclosed. Memory cell structure in which a capacitor is formed in the uppermost layer of plural metal wiring layers by connecting the storage node of the capacitor to a diffusion layer via plugs and pads is adopted. It is desirable that a dielectric film formed in a metal wiring layer under the uppermost layer and a supplementary capacitor composed of a storage node and a plate electrode are connected to the capacitor. It is also desirable that the plate electrode of the capacitor covers the chip.
Abstract:
In a DRAM having a capacitor-over-bitline structure in which the capacitive insulating film of an information storing capacitive element C is formed of a high dielectric material such as Ta2O5 (tantalum oxide) film 46, the portions of bit lines BL and first-layer interconnect lines 23 to 26 of a peripheral circuit which are in contact with at least an underlying silicon oxide film 28 are formed of a W film, the bit lines BL and the interconnect lines 23 to 26 being arranged below the information storing capacitive element C, whereby the adhesion at the interface between the bit lines BL and the interconnect lines 23 to 26 and the silicon oxide film is improved in terms of high-temperature heat treatment to be performed when the capacitive insulating film is being formed.
Abstract translation:在具有电容器的位线结构的DRAM中,信息存储电容元件C的电容绝缘膜由诸如Ta 2 O 5(氧化钽)膜46的高电介质材料形成,位线BL和第一 - 与W膜形成的与外部电路至少底层的氧化硅膜28接触的层间布线23〜26,位线BL和布线23〜26配置在信息存储电容元件C的下方 从而在形成电容绝缘膜时进行的高温热处理方面提高了位线BL与布线23〜26之间界面处的粘附性和氧化硅膜。