"> Fluorosurfactant in photoresist for amorphous
    2.
    发明授权
    Fluorosurfactant in photoresist for amorphous "Teflon" patterning 失效
    无定形“特氟龙”图案的光致抗蚀剂中的含氟表面活性剂

    公开(公告)号:US5403437A

    公开(公告)日:1995-04-04

    申请号:US148773

    申请日:1993-11-05

    CPC分类号: G03F7/085 G03F7/0046

    摘要: This is a device and method of forming such, wherein the device has an amorphous "TEFLON" (TFE AF) layer. The method comprising: depositing an TFE AF layer 36 on a substrate; combining a fluorosurfactant with a first material to produce a second material 38; and depositing the second material 38 on the TFE AF layer 36. The method may include: patterning and etching the second material; removing the second material; and forming a third material 42 on the TFE AF layer 44. The third material may be a metal or a semiconductor. The ZFSNF fluorosurfactant may be combined with a photoresist and then patterned and etched. The TFE AF layer may also be heated. A second coating of the second material may also be added.

    摘要翻译: 这是一种形成这种装置和方法,其中该装置具有非晶“TEFLON”(TFE AF)层。 该方法包括:在衬底上沉积TFE AF层36; 将含氟表面活性剂与第一材料组合以产生第二材料38; 并将第二材料38沉积在TFE AF层36上。该方法可以包括:图案化和蚀刻第二材料; 去除第二种材料; 并在TFE AF层44上形成第三材料42.第三材料可以是金属或半导体。 ZFSNF含氟表面活性剂可与光致抗蚀剂组合,然后进行图案化和蚀刻。 TFE AF层也可以被加热。 还可以添加第二材料的第二涂层。

    Low mass optical coating for thin film detectors
    7.
    发明授权
    Low mass optical coating for thin film detectors 失效
    用于薄膜检测器的低质量光学涂层

    公开(公告)号:US5929441A

    公开(公告)日:1999-07-27

    申请号:US883736

    申请日:1997-06-27

    IPC分类号: G01J5/08 G01J5/10 G01J5/22

    摘要: A thermal detector having an optical coating comprising a porous film 64. The porous film preferably comprises a xerogel or aerogel and is greater than 80% porous. An optional optical impedance matching layer 66 may be deposited over the porous film 64. Advantages include decreased thickness of the thermal sensor, improved acuity of the image produced by the system, lower manufacturing temperatures, and the ability to use electrodes that are opaque to infrared energy.

    摘要翻译: 具有包括多孔膜64的光学涂层的热检测器。多孔膜优选包含干凝胶或气凝胶,并且大于80%多孔。 可选的光阻抗匹配层66可以沉积在多孔膜64上。优点包括减小热传感器的厚度,改善系统产生的图像的锐度,降低制造温度,以及使用对红外线不透明的电极的能力 能源。

    OPERATING METHOD OF NON-VOLATILE MEMORY DEVICE
    8.
    发明申请
    OPERATING METHOD OF NON-VOLATILE MEMORY DEVICE 审中-公开
    非易失性存储器件的操作方法

    公开(公告)号:US20090021986A1

    公开(公告)日:2009-01-22

    申请号:US12236999

    申请日:2008-09-24

    IPC分类号: G11C11/34

    摘要: An operating method for a non-volatile memory device is applicable on a non-volatile memory device in which a substrate is disposed. The substrate includes a trench, a first conductive type first well region disposed in the substrate, and a second conductive type second well region disposed above the first conductive type first well region. The operating method includes applying a first voltage to a control gate, a second voltage to a drain region, and a third voltage to a source region. Besides, a channel F-N tunneling effect is employed to program a memory cell.

    摘要翻译: 用于非易失性存储器件的操作方法适用于其中设置衬底的非易失性存储器件。 衬底包括沟槽,设置在衬底中的第一导电类型的第一阱区域和设置在第一导电类型的第一阱区域上方的第二导电类型的第二阱区域。 操作方法包括将第一电压施加到控制栅极,将第二电压施加到漏极区域,并将第三电压施加到源极区域。 此外,采用信道F-N隧道效应来对存储器单元进行编程。

    OPERATING METHOD OF A NON-VOLATILE MEMORY
    9.
    发明申请
    OPERATING METHOD OF A NON-VOLATILE MEMORY 审中-公开
    非易失性存储器的操作方法

    公开(公告)号:US20070263448A1

    公开(公告)日:2007-11-15

    申请号:US11778657

    申请日:2007-07-17

    IPC分类号: G11C11/34 G11C16/04

    摘要: A non-volatile memory is provided. A substrate has at least two isolation structures therein to define an active area. A well is located in the substrate. A shallow doped region is located in the well. At least two stacked gate structures are located on the substrate. Pocket doped regions are located in the substrate at the peripheries of the stacked gate structures; each of the pocket doped regions extends under the stacked gate structure. Drain regions are located in the pocket doped regions at the peripheries of the stacked gate structures. An auxiliary gate layer is located on the substrate between the stacked gate structures. A gate dielectric layer is located between the auxiliary gate layer and the substrate and between the auxiliary gate layer and the stacked gate structure. Plugs are located on the substrate and extended to connect with the pocket doped region and the drain regions therein.

    摘要翻译: 提供非易失性存储器。 衬底在其中具有至少两个隔离结构以限定有效区域。 一个井位于基板中。 浅掺杂区域位于井中。 至少两个堆叠的栅极结构位于衬底上。 袋状掺杂区域位于堆叠栅极结构的周边的衬底中; 每个口袋掺杂区域在堆叠的栅极结构之下延伸。 漏极区位于堆叠栅极结构的周边的口袋掺杂区域中。 辅助栅极层位于堆叠栅极结构之间的衬底上。 栅极电介质层位于辅助栅极层和衬底之间,并且位于辅助栅极层和堆叠栅极结构之间。 插头位于衬底上并延伸以与其中的口袋掺杂区域和漏极区域连接。