公开(公告)号：US20210351077A1

公开(公告)日：2021-11-11

申请号：US17382399

申请日：2021-07-22

Applicant: Infineon Technologies AG

Inventor： Francisco Javier Santos Rodriguez ,  Günter Denifl ,  Tobias Hoechbauer ,  Martin Huber ,  Wolfgang Lehnert ,  Roland Rupp ,  Hans-Joachim Schulze

IPC: H01L21/78 ,  H01L21/02

Abstract: A method for processing a wide band gap semiconductor wafer includes: depositing a support layer including semiconductor material at a back side of a wide band gap semiconductor wafer, the wide band gap semiconductor wafer having a band gap larger than the band gap of silicon; depositing an epitaxial layer at a front side of the wide band gap semiconductor wafer; and splitting the wide band gap semiconductor wafer along a splitting region to obtain a device wafer comprising at least a part of the epitaxial layer, and a remaining wafer comprising the support layer.

公开(公告)号：US20170032992A1

公开(公告)日：2017-02-02

申请号：US14814559

申请日：2015-07-31

Applicant: Infineon Technologies AG

Inventor： Tobias Hoechbauer

IPC: H01L21/673 ,  C23C16/458 ,  C23C16/46 ,  H01L21/677 ,  C23C16/455

CPC classification number: H01L21/67383 ,  C23C16/455 ,  C23C16/458 ,  C23C16/4584 ,  C23C16/46 ,  H01L21/67353 ,  H01L21/67739 ,  H01L21/68735 ,  H01L21/6875 ,  H01L21/68771

Abstract: A substrate carrier may include: a carrier plate including a plurality of substrate receiving regions; each substrate receiving region may include at least one first recess portion having a first depth and at least one second recess portion having a second depth, the second depth being greater than the first depth; and a carrier plate mounting structure configured to support the carrier plate.

Abstract translation: 衬底载体可以包括：载体板，包括多个衬底接收区域; 每个衬底接收区域可以包括具有第一深度的至少一个第一凹部和具有第二深度的至少一个第二凹部，第二深度大于第一深度; 以及构造成支撑所述承载板的承载板安装结构。

公开(公告)号：US20140264374A1

公开(公告)日：2014-09-18

申请号：US13827253

申请日：2013-03-14

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Christian Hecht ,  Tobias Hoechbauer ,  Roland Rupp ,  Hans-Joachim Schulze

IPC: H01L21/02 ,  H01L29/16

CPC classification number: H01L21/02529 ,  H01L21/76254 ,  H01L29/1608

Abstract: A method for manufacturing a silicon carbide substrate for an electrical silicon carbide device includes providing a silicon carbide dispenser wafer including a silicon face and a carbon face and depositing a silicon carbide epitaxial layer on the silicon face. Further, the method includes implanting ions with a predefined energy characteristic forming an implant zone within the epitaxial layer, so that the ions are implanted with an average depth within the epitaxial layer corresponding to a designated thickness of an epitaxial layer of the silicon carbide substrate to be manufactured. Furthermore, the method comprises bonding an acceptor wafer onto the epitaxial layer so that the epitaxial layer is arranged between the dispenser wafer and the acceptor wafer. Further, the epitaxial layer is split along the implant zone so that a silicon carbide substrate represented by the acceptor wafer with an epitaxial layer with the designated thickness is obtained.

Abstract translation: 一种用于制造用于电碳化硅器件的碳化硅衬底的方法包括提供包括硅面和碳面的碳化硅分配器晶片，并在硅表面上沉积碳化硅外延层。 此外，该方法包括以预定的能量特性注入离子，在外延层内形成注入区，使得离子注入到外延层内的对应于碳化硅衬底外延层的指定厚度的平均深度， 制造。 此外，该方法包括将受体晶片结合到外延层上，使得外延层布置在分配器晶片和受主晶片之间。 此外，外延层沿着注入区域分裂，从而获得由具有指定厚度的外延层的受主晶片表示的碳化硅衬底。

公开(公告)号：US12249504B2

公开(公告)日：2025-03-11

申请号：US17743006

申请日：2022-05-12

Applicant: Infineon Technologies AG

Inventor： Bernhard Goller ,  Alexander Christian Binter ,  Tobias Hoechbauer ,  Martin Huber ,  Iris Moder ,  Matteo Piccin ,  Francisco Javier Santos Rodriguez ,  Hans-Joachim Schulze

IPC: H01L21/02 ,  H01L21/288 ,  H01L21/78

Abstract: pa The method of processing a semiconductor wafer includes forming one or more epitaxial layers over its first main surface. It also involves forming one or more porous layers within the semiconductor wafer or within the epitaxial layers. Together, the semiconductor wafer, the epitaxial layer(s), and the porous layer(s) form a substrate. Next, doped regions of a semiconductor device are formed within the epitaxial layer(s). After forming these doped regions, a non-porous part of the semiconductor wafer is separated from the rest of the substrate along the porous layer(s).

公开(公告)号：US11887894B2

公开(公告)日：2024-01-30

申请号：US17382399

申请日：2021-07-22

Applicant: Infineon Technologies AG

Inventor： Francisco Javier Santos Rodriguez ,  Günter Denifl ,  Tobias Hoechbauer ,  Martin Huber ,  Wolfgang Lehnert ,  Roland Rupp ,  Hans-Joachim Schulze

IPC: H01L21/78 ,  H01L21/02 ,  H01L21/18

CPC classification number: H01L21/7813 ,  H01L21/02016 ,  H01L21/185 ,  H01L21/7806

Abstract: A method for processing a wide band gap semiconductor wafer includes: depositing a support layer including semiconductor material at a back side of a wide band gap semiconductor wafer, the wide band gap semiconductor wafer having a band gap larger than the band gap of silicon; depositing an epitaxial layer at a front side of the wide band gap semiconductor wafer; and splitting the wide band gap semiconductor wafer along a splitting region to obtain a device wafer comprising at least a part of the epitaxial layer, and a remaining wafer comprising the support layer.

公开(公告)号：US11721547B2

公开(公告)日：2023-08-08

申请号：US13827253

申请日：2013-03-14

Applicant: Infineon Technologies AG

Inventor： Christian Hecht ,  Tobias Hoechbauer ,  Roland Rupp ,  Hans-Joachim Schulze

IPC: H01L21/02 ,  H01L21/762 ,  H01L29/16

CPC classification number: H01L21/02529 ,  H01L21/76254 ,  H01L29/1608

Abstract: A method for manufacturing a silicon carbide substrate for an electrical silicon carbide device includes providing a silicon carbide dispenser wafer including a silicon face and a carbon face and depositing a silicon carbide epitaxial layer on the silicon face. Further, the method includes implanting ions with a predefined energy characteristic forming an implant zone within the epitaxial layer, so that the ions are implanted with an average depth within the epitaxial layer corresponding to a designated thickness of an epitaxial layer of the silicon carbide substrate to be manufactured. Furthermore, the method comprises bonding an acceptor wafer onto the epitaxial layer so that the epitaxial layer is arranged between the dispenser wafer and the acceptor wafer. Further, the epitaxial layer is split along the implant zone so that a silicon carbide substrate represented by the acceptor wafer with an epitaxial layer with the designated thickness is obtained.

公开(公告)号：US20230127556A1

公开(公告)日：2023-04-27

申请号：US17743006

申请日：2022-05-12

Applicant: Infineon Technologies AG

Inventor： Bernhard Goller ,  Alexander Binter ,  Tobias Hoechbauer ,  Martin Huber ,  Iris Moder ,  Matteo Piccin ,  Francisco Javier Santos Rodriguez ,  Hans-Joachim Schulze

IPC: H01L21/02 ,  H01L21/288 ,  H01L21/78

Abstract: A method of processing a semiconductor wafer includes: forming one or more epitaxial layers over a first main surface of the semiconductor wafer; forming one or more porous layers in the semiconductor wafer or in the one or more epitaxial layers, wherein the semiconductor wafer, the one or more epitaxial layers and the one or more porous layers collectively form a substrate; forming doped regions of a semiconductor device in the one or more epitaxial layers; and after forming the doped regions of the semiconductor device, separating a non-porous part of the semiconductor wafer from a remainder of the substrate along the one or more porous layers.

公开(公告)号：US20170309484A1

公开(公告)日：2017-10-26

申请号：US15136573

申请日：2016-04-22

Applicant: Infineon Technologies AG

Inventor： Mihai Draghici ,  Romain Esteve ,  Craig Arthur Fisher ,  Gerald Unegg ,  Tobias Hoechbauer ,  Christian Heidorn

IPC: H01L21/225 ,  H01L21/311 ,  H01L21/027 ,  H01L21/02 ,  H01L21/324 ,  H01L21/04

CPC classification number: H01L21/2254 ,  H01L21/02115 ,  H01L21/02266 ,  H01L21/02271 ,  H01L21/0273 ,  H01L21/0455 ,  H01L21/31111 ,  H01L21/324 ,  H01L29/1608

Abstract: A method of defect reduction for a SiC layer includes activating dopants disposed in the SiC layer, depositing a carbon-rich layer on the SiC layer after activating the dopants, tempering the carbon-rich layer so as to form graphite on the SiC layer, and diffusing carbon from the graphite into the SiC layer. Carbon diffused from the graphite fills carbon vacancies in the SiC layer.