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1.
公开(公告)号:US20170103894A1
公开(公告)日:2017-04-13
申请号:US15288349
申请日:2016-10-07
Applicant: Infineon Technologies AG
Inventor: Thomas Aichinger , Wolfgang Bergner , Romain Esteve , Daniel Kueck , Dethard Peters , Victorina Poenariu , Gerald Reinwald , Roland Rupp , Gerald Unegg
CPC classification number: H01L21/0475 , H01L21/049 , H01L21/3065 , H01L29/0661 , H01L29/0696 , H01L29/1095 , H01L29/1608 , H01L29/401 , H01L29/42376 , H01L29/4238 , H01L29/66068 , H01L29/7813 , H01L29/8613
Abstract: A trench is formed that extends from a main surface into a crystalline silicon carbide semiconductor layer. A mask is formed that includes a mask opening exposing the trench and a rim section of the main surface around the trench. By irradiation with a particle beam a first portion of the semiconductor layer exposed by the mask opening and a second portion outside of the vertical projection of the mask opening and directly adjoining to the first portion are amorphized. A vertical extension of the amorphized second portion gradually decreases with increasing distance to the first portion. The amorphized first and second portions are removed.
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公开(公告)号:US10256097B2
公开(公告)日:2019-04-09
申请号:US15846591
申请日:2017-12-19
Applicant: Infineon Technologies AG
Inventor: Ravi Keshav Joshi , Romain Esteve , Roland Rupp , Francisco Javier Santos Rodriguez , Gerald Unegg
IPC: H01L21/04 , H01L29/06 , H01L29/10 , H01L29/45 , H01L29/66 , H01L29/732 , H01L29/808 , H01L29/861 , H01L29/417 , H01L29/423 , H01L29/08 , H01L29/78 , H01L29/16 , H01L29/739
Abstract: A semiconductor device includes a silicon carbide semiconductor body and a metal contact structure. Interface particles including a silicide kernel and a carbon cover on a surface of the silicide kernel are formed directly between the silicon carbide semiconductor body and the metal contact structure. Between neighboring ones of the interface particles, the metal contact structure directly adjoins the silicon carbide semiconductor body.
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公开(公告)号:US20180076036A1
公开(公告)日:2018-03-15
申请号:US15582940
申请日:2017-05-01
Applicant: Infineon Technologies AG
Inventor: Ravi Keshav Joshi , Romain Esteve , Markus Kahn , Kurt Pekoll , Juergen Steinbrenner , Gerald Unegg
IPC: H01L21/04 , H01L29/16 , H01L21/324 , H01L29/45 , H01L21/02
CPC classification number: H01L21/0485 , H01L21/0217 , H01L21/28518 , H01L21/324 , H01L21/76897 , H01L29/1608 , H01L29/45 , H01L29/66068 , H01L29/665 , H01L29/7802
Abstract: A silicon-carbide substrate that includes: a doped silicon-carbide contact region directly adjoining a main surface of the substrate, and a dielectric layer covering the main surface is provided. A protective layer is formed on the silicon-carbide substrate such that the protective layer covers the dielectric layer and exposes the doped silicon-carbide contact region at the main surface. A metal layer that conforms to the protective layer and directly contacts the exposed doped silicon-carbide contact region is deposited. A first rapid thermal anneal process is performed. A thermal budget of the first rapid thermal anneal process is selected to cause the metal layer to form a silicide with the doped silicon-carbide contact region during the first rapid thermal anneal process without causing the metal layer to form a silicide with the protective layer during the first rapid thermal anneal process.
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公开(公告)号:US10049879B2
公开(公告)日:2018-08-14
申请号:US15582940
申请日:2017-05-01
Applicant: Infineon Technologies AG
Inventor: Ravi Keshav Joshi , Romain Esteve , Markus Kahn , Kurt Pekoll , Juergen Steinbrenner , Gerald Unegg
Abstract: A silicon-carbide substrate that includes: a doped silicon-carbide contact region directly adjoining a main surface of the substrate, and a dielectric layer covering the main surface is provided. A protective layer is formed on the silicon-carbide substrate such that the protective layer covers the dielectric layer and exposes the doped silicon-carbide contact region at the main surface. A metal layer that conforms to the protective layer and directly contacts the exposed doped silicon-carbide contact region is deposited. A first rapid thermal anneal process is performed. A thermal budget of the first rapid thermal anneal process is selected to cause the metal layer to form a silicide with the doped silicon-carbide contact region during the first rapid thermal anneal process without causing the metal layer to form a silicide with the protective layer during the first rapid thermal anneal process.
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公开(公告)号:US09666482B1
公开(公告)日:2017-05-30
申请号:US15265081
申请日:2016-09-14
Applicant: Infineon Technologies AG
Inventor: Ravi Keshav Joshi , Romain Esteve , Markus Kahn , Kurt Pekoll , Juergen Steinbrenner , Gerald Unegg
CPC classification number: H01L21/0485 , H01L21/0217 , H01L21/28518 , H01L21/324 , H01L21/76897 , H01L29/1608 , H01L29/45 , H01L29/66068 , H01L29/665 , H01L29/7802
Abstract: A silicon-carbide substrate that includes a doped contact region and a dielectric layer is provided. A protective layer is formed on the dielectric layer. A structured mask is formed on the protective layer. Sections of the protective layer and the dielectric layer that are exposed by openings in the mask are removed. The structured mask is removed. A metal layer is deposited such that a first portion of the metal layer directly contacts the doped contact region and a second portion of the metal layer lines the remaining sections of the protective layer and the dielectric layer. A first rapid thermal anneal process is performed. After performing the first rapid thermal anneal process, the second portion of the metal layer and the remaining section of the protective layer are removed without removing the first portion of the metal layer.
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6.
公开(公告)号:US10217636B2
公开(公告)日:2019-02-26
申请号:US15919918
申请日:2018-03-13
Applicant: Infineon Technologies AG
Inventor: Thomas Aichinger , Victorina Poenariu , Wolfgang Bergner , Romain Esteve , Daniel Kueck , Dethard Peters , Gerald Reinwald , Roland Rupp , Gerald Unegg
IPC: H01L29/16 , H01L29/66 , H01L21/02 , H01L21/04 , H01L29/10 , H01L29/78 , H01L29/40 , H01L29/861 , H01L29/06 , H01L21/3065 , H01L29/423
Abstract: A trench is formed that extends from a main surface into a crystalline silicon carbide semiconductor layer. A mask is formed that includes a mask opening exposing the trench and a rim section of the main surface around the trench. By irradiation with a particle beam a first portion of the semiconductor layer exposed by the mask opening and a second portion outside of the vertical projection of the mask opening and directly adjoining to the first portion are amorphized. A vertical extension of the amorphized second portion gradually decreases with increasing distance to the first portion. The amorphized first and second portions are removed.
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7.
公开(公告)号:US20180204725A1
公开(公告)日:2018-07-19
申请号:US15919918
申请日:2018-03-13
Applicant: Infineon Technologies AG
Inventor: Thomas Aichinger , Victorina Poenariu , Wolfgang Bergner , Romain Esteve , Daniel Kueck , Dethard Peters , Gerald Reinwald , Roland Rupp , Gerald Unegg
IPC: H01L21/04 , H01L29/861 , H01L29/78 , H01L29/66 , H01L29/423 , H01L29/40 , H01L21/3065 , H01L29/16 , H01L29/10 , H01L29/06
CPC classification number: H01L21/0475 , H01L21/049 , H01L21/3065 , H01L29/0661 , H01L29/0696 , H01L29/1095 , H01L29/1608 , H01L29/401 , H01L29/42376 , H01L29/4238 , H01L29/66068 , H01L29/7813 , H01L29/8613
Abstract: A trench is formed that extends from a main surface into a crystalline silicon carbide semiconductor layer. A mask is formed that includes a mask opening exposing the trench and a rim section of the main surface around the trench. By irradiation with a particle beam a first portion of the semiconductor layer exposed by the mask opening and a second portion outside of the vertical projection of the mask opening and directly adjoining to the first portion are amorphized. A vertical extension of the amorphized second portion gradually decreases with increasing distance to the first portion. The amorphized first and second portions are removed.
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公开(公告)号:US20170309484A1
公开(公告)日:2017-10-26
申请号:US15136573
申请日:2016-04-22
Applicant: Infineon Technologies AG
Inventor: Mihai Draghici , Romain Esteve , Craig Arthur Fisher , Gerald Unegg , Tobias Hoechbauer , Christian Heidorn
IPC: H01L21/225 , H01L21/311 , H01L21/027 , H01L21/02 , H01L21/324 , H01L21/04
CPC classification number: H01L21/2254 , H01L21/02115 , H01L21/02266 , H01L21/02271 , H01L21/0273 , H01L21/0455 , H01L21/31111 , H01L21/324 , H01L29/1608
Abstract: A method of defect reduction for a SiC layer includes activating dopants disposed in the SiC layer, depositing a carbon-rich layer on the SiC layer after activating the dopants, tempering the carbon-rich layer so as to form graphite on the SiC layer, and diffusing carbon from the graphite into the SiC layer. Carbon diffused from the graphite fills carbon vacancies in the SiC layer.
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9.
公开(公告)号:US20180174840A1
公开(公告)日:2018-06-21
申请号:US15846591
申请日:2017-12-19
Applicant: Infineon Technologies AG
Inventor: Ravi Keshav Joshi , Romain Esteve , Roland Rupp , Francisco Javier Santos Rodriguez , Gerald Unegg
CPC classification number: H01L21/0485 , H01L29/0688 , H01L29/0692 , H01L29/0813 , H01L29/0878 , H01L29/1075 , H01L29/1095 , H01L29/1608 , H01L29/41708 , H01L29/42304 , H01L29/45 , H01L29/6606 , H01L29/66068 , H01L29/732 , H01L29/7395 , H01L29/7805 , H01L29/7813 , H01L29/8083 , H01L29/861 , H01L29/8611 , H01L2924/0002
Abstract: A semiconductor device includes a silicon carbide semiconductor body and a metal contact structure. Interface particles including a silicide kernel and a carbon cover on a surface of the silicide kernel are formed directly between the silicon carbide semiconductor body and the metal contact structure. Between neighboring ones of the interface particles, the metal contact structure directly adjoins the silicon carbide semiconductor body.
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10.
公开(公告)号:US09934972B2
公开(公告)日:2018-04-03
申请号:US15288349
申请日:2016-10-07
Applicant: Infineon Technologies AG
Inventor: Thomas Aichinger , Wolfgang Bergner , Romain Esteve , Daniel Kueck , Dethard Peters , Victorina Poenariu , Gerald Reinwald , Roland Rupp , Gerald Unegg
IPC: H01L21/04 , H01L21/02 , H01L21/265 , H01L29/78 , H01L29/66 , H01L29/16 , H01L29/10 , H01L29/40 , H01L29/861 , H01L29/06 , H01L21/3065 , H01L29/423
CPC classification number: H01L21/0475 , H01L21/049 , H01L21/3065 , H01L29/0661 , H01L29/0696 , H01L29/1095 , H01L29/1608 , H01L29/401 , H01L29/42376 , H01L29/4238 , H01L29/66068 , H01L29/7813 , H01L29/8613
Abstract: A trench is formed that extends from a main surface into a crystalline silicon carbide semiconductor layer. A mask is formed that includes a mask opening exposing the trench and a rim section of the main surface around the trench. By irradiation with a particle beam a first portion of the semiconductor layer exposed by the mask opening and a second portion outside of the vertical projection of the mask opening and directly adjoining to the first portion are amorphized. A vertical extension of the amorphized second portion gradually decreases with increasing distance to the first portion. The amorphized first and second portions are removed.
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