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    VERTICAL DIODES IN STACKED TRANSISTOR TECHNOLOGIES
    2.
    发明申请
    VERTICAL DIODES IN STACKED TRANSISTOR TECHNOLOGIES 有权

    公开(公告)号：US20230089395A1

    公开(公告)日：2023-03-23

    申请号：US17448373

    申请日：2021-09-22

    申请人： INTEL CORPORATION

    发明人： Benjamin Orr ,  Nicholas A. Thomson ,  Ayan Kar ,  Nathan D. Jack ,  Kalyan C. Kolluru ,  Patrick Morrow ,  Cheng-Ying Huang ,  Charles C. Kuo

    IPC分类号： H01L27/06 ,  H01L27/092 ,  H01L29/66 ,  H01L21/8238

    摘要： Integrated circuits including vertical diodes. In an example, a first transistor is above a second transistor. The first transistor includes a first semiconductor body extending laterally from a first source or drain region. The first source or drain region includes one of a p-type dopant or an n-type dopant. The second transistor includes a second semiconductor body extending laterally from a second source or drain region. The second source or drain region includes the other of the p-type dopant or the n-type dopant. The first source or drain region and second source or drain region are at least part of a diode structure, which may have a PN junction (e.g., first and second source/drain regions are merged) or a PIN junction (e.g., first and second source/drain regions are separated by an intrinsic semiconductor layer, or a dielectric layer and the first and second semiconductor bodies are part of the junction).

    TRANSISTOR DEVICES WITH EXTENDED DRAIN
    3.
    发明公开
    TRANSISTOR DEVICES WITH EXTENDED DRAIN 审中-公开

    公开(公告)号：US20240088136A1

    公开(公告)日：2024-03-14

    申请号：US17943557

    申请日：2022-09-13

    申请人： Intel Corporation

    发明人： Ayan Kar ,  Nicholas A. Thomson ,  Kalyan C. Kolluru ,  Benjamin Orr

    IPC分类号： H01L27/02

    CPC分类号： H01L27/027

    摘要： An integrated circuit structure includes a sub-fin, a source region in contact with a first portion of the sub-fin, and a drain region in contact with a second portion of the sub-fin. A body including semiconductor material is above the sub-fin, where the body extends laterally between the source region and the drain region. A gate structure is on the body and includes (i) a gate electrode, and (ii) a gate dielectric between the gate electrode and the body. In an example, a first distance between the drain region and the gate electrode is at least two times a second distance between the source region and the gate electrode, where the first and second distances are measured in a same horizontal plane that runs in a direction parallel to the body. In an example, the body is a nanoribbon, a nanosheet, a nanowire, or a fin.

    TRANSISTOR DEVICES WITH INTEGRATED DIODES
    7.
    发明公开
    TRANSISTOR DEVICES WITH INTEGRATED DIODES 审中-公开

    公开(公告)号：US20240088133A1

    公开(公告)日：2024-03-14

    申请号：US17943840

    申请日：2022-09-13

    申请人： INTEL CORPORATION

    发明人： Nicholas A. Thomson ,  Ayan Kar ,  Kalyan C. Kolluru ,  Mauro J. Kobrinksy ,  Benjamin Orr

    IPC分类号： H01L27/02 ,  H01L23/528 ,  H01L29/06 ,  H01L29/861

    CPC分类号： H01L27/0255 ,  H01L23/5283 ,  H01L27/0266 ,  H01L29/0673 ,  H01L29/8611

    摘要： An integrated circuit structure includes a sub-fin having a first type of dopant, a first diffusion region having the first type of dopant and in contact with the sub-fin, and a second diffusion region and a third diffusion region having a second type of dopant and in contact with the sub-fin. The first type of dopant is one of p-type or n-type dopant, and where the second type of dopant is the other of the p-type or n-type dopant. A first body of semiconductor material extends from the second diffusion region to the third diffusion region, and a second body of semiconductor material extends from the first diffusion region towards the second diffusion region. The first diffusion region is a tap diffusion region contacting the sub-fin. In an example, the first diffusion region facilitates formation of a diode for electrostatic discharge (ESD) protection of the integrated circuit structure.

    LATERAL DIODES IN STACKED TRANSISTOR TECHNOLOGIES
    10.
    发明申请
    LATERAL DIODES IN STACKED TRANSISTOR TECHNOLOGIES 有权

    公开(公告)号：US20230088578A1

    公开(公告)日：2023-03-23

    申请号：US17448385

    申请日：2021-09-22

    申请人： INTEL CORPORATION

    发明人： Nicholas A. Thomson ,  Ayan Kar ,  Benjamin Orr ,  Kalyan C. Kolluru ,  Nathan D. Jack ,  Patrick Morrow ,  Cheng-Ying Huang ,  Charles C. Kuo

    IPC分类号： H01L27/02 ,  H01L27/092 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/786 ,  H01L21/02 ,  H01L29/66 ,  H01L21/8238

    摘要： Integrated circuits including lateral diodes. In an example, diodes are formed with laterally neighboring source and drain regions (diffusion regions) configured with different polarity epitaxial growths (e.g., p-type and n-type), to provide an anode and cathode of the diode. In some such cases, dopants may be used in the channel region to create or otherwise enhance a PN or PIN junction between the diffusion regions and the semiconductor material of a channel region. The channel region can be, for instance, one or more nanoribbons or other such semiconductor bodies that extend between the oppositely-doped diffusion regions. In some cases, nanoribbons making up the channel region are left unreleased, thereby preserving greater volume through which diode current can flow. Other features include skipped epitaxial regions, elongated gate structures, using isolation structures in place of gate structures, and/or sub-fin conduction paths that are supplemental or alternative to a channel-based conduction paths.