PRESSURE SENSING AND CONTROL FOR SEMICONDUCTOR WAFER PROBING
    5.
    发明申请
    PRESSURE SENSING AND CONTROL FOR SEMICONDUCTOR WAFER PROBING 有权
    用于半导体波形探测的压力感测和控制

    公开(公告)号:US20150145544A1

    公开(公告)日:2015-05-28

    申请号:US14560138

    申请日:2014-12-04

    CPC classification number: G01R31/2891 G01R1/06794 G01R1/07364

    Abstract: A wafer probing system includes a probe card assembly having a plurality of individual probe structures configured make contact with a semiconductor wafer mounted on a motor driven wafer chuck, with each probe structure configured with a pressure sensing unit integrated therewith; and a controller configured to drive the probe card assembly with one or more piezoelectric driver units response to feedback from the pressure sensing units of the individual probe structures.

    Abstract translation: 晶片探测系统包括探针卡组件,其具有构造成与安装在马达驱动晶片卡盘上的半导体晶片接触的多个单独的探针结构,每个探针结构配置有与其集成的压力感测单元; 以及控制器,被配置为用一个或多个压电驱动器单元来驱动探针卡组件,以响应来自各个探针结构的压力感测单元的反馈。

    INTERCONNECT STRUCTURE WITH ENHANCED RELIABILITY
    8.
    发明申请
    INTERCONNECT STRUCTURE WITH ENHANCED RELIABILITY 有权
    具有增强可靠性的互连结构

    公开(公告)号:US20150056806A1

    公开(公告)日:2015-02-26

    申请号:US14529431

    申请日:2014-10-31

    Abstract: An improved interconnect structure including a dielectric layer having a conductive feature embedded therein, the conductive feature having a first top surface that is substantially coplanar with a second top surface of the dielectric layer; a metal cap layer located directly on the first top surface, wherein the metal cap layer does not substantially extend onto the second top surface; a first dielectric cap layer located directly on the second top surface, wherein the first dielectric cap layer does not substantially extend onto the first top surface and the first dielectric cap layer is thicker than the metal cap layer; and a second dielectric cap layer on the metal cap layer and the first dielectric cap layer. A method of forming the interconnect structure is also provided.

    Abstract translation: 一种改进的互连结构,其包括具有嵌入其中的导电特征的介电层,所述导电特征具有与介电层的第二顶表面基本共面的第一顶表面; 金属盖层直接位于第一顶表面上,其中金属盖层基本上不延伸到第二顶表面上; 位于所述第二顶表面上的第一电介质盖层,其中所述第一电介质盖层基本上不延伸到所述第一顶表面上,并且所述第一电介质盖层比所述金属盖层厚; 以及金属盖层和第一电介质盖层上的第二电介质盖层。 还提供了形成互连结构的方法。

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