公开(公告)号：US20240079348A1

公开(公告)日：2024-03-07

申请号：US18231245

申请日：2023-08-07

Applicant: InnoLux Corporation

Inventor： Ker-Yih Kao ,  Cheng-Chi Wang ,  Yen-Fu Liu ,  Ju-Li Wang ,  Jui-Jen Yueh

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L29/786

CPC classification number: H01L23/562 ,  H01L23/3128 ,  H01L23/49822 ,  H01L24/08 ,  H01L29/78603 ,  H01L2224/08225

Abstract: An electronic device includes a chip and a circuit structure layer overlapped with the chip. The circuit structure layer includes a redistribution structure layer and an element structure layer, and the redistribution structure layer and the element structure layer are electrically connected to the chip. At least one of the redistribution structure layer and the element structure layer includes at least one opening, and in a normal direction of the electronic device, the at least one opening is overlapped with aside of the chip.

公开(公告)号：US20250106985A1

公开(公告)日：2025-03-27

申请号：US18809368

申请日：2024-08-20

Applicant: Innolux Corporation

Inventor： Ju-Li Wang ,  Po-Yun Hsu ,  Ker-Yih Kao

IPC: H05K1/02 ,  H05K1/11 ,  H05K1/18

Abstract: An electronic device having a central area and a peripheral area surrounding the central area is provided. The electronic device includes a substrate, a through hole, a buffer layer, a first circuit structure, an electronic component and a first pad. The substrate has a first surface and a second surface opposite to the first surface. The through hole penetrates through the substrate and has a first through hole and a second through hole. The buffer layer covers the first surface, the second surface, an inner wall of the first through hole and an inner wall of the second through hole. The first circuit structure is disposed on the first surface. The first through hole corresponds to the central area, the second through hole corresponds to the peripheral area, and a width of the second through hole is greater than a width of the first through hole.

公开(公告)号：US20250006577A1

公开(公告)日：2025-01-02

申请号：US18675129

申请日：2024-05-27

Applicant: Innolux Corporation

Inventor： Mei-Yen Chen ,  Ju-Li Wang ,  Yen-Fu Liu

IPC: H01L23/31 ,  H01L23/00 ,  H01L23/40 ,  H01L23/498

Abstract: An electronic device including an electronic element, an encapsulation layer, a circuit structure, a bonding element, and a bolt is provided. The encapsulation layer surrounds the electronic element. The circuit structure is electrically connected to the electronic element. The bonding element is electrically connected to the electronic element via the circuit structure. The bolt is disposed between the circuit structure and the encapsulation layer. A manufacturing method of an electronic device is also provided.

公开(公告)号：US20250140671A1

公开(公告)日：2025-05-01

申请号：US18896935

申请日：2024-09-26

Applicant: Innolux Corporation

Inventor： Cheng-Chi Wang ,  Wen-Hsiang Liao ,  Jui-Jen Yueh ,  Ju-Li Wang

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/00 ,  H01L23/31 ,  H01L23/367

Abstract: An electronic device includes an electronic unit and a circuit structure. The circuit structure is electrically connected to the electronic unit and includes a first circuit structure, a second circuit structure, a bonding pad, and an adjustment layer. The first circuit structure includes at least one first circuit layer and at least one first insulation layer. The second circuit structure is disposed between the electronic unit and the first circuit structure, and includes at least one second circuit layer and at least one second insulation layer. The bonding pad and the adjustment layer are disposed between the second circuit structure and the first circuit structure. A coefficient of thermal expansion of the adjustment layer is smaller than that of at least one of the at least one first insulation layer of the first circuit structure and the at least one second insulation layer of the second circuit structure.

公开(公告)号：US20240258241A1

公开(公告)日：2024-08-01

申请号：US18406204

申请日：2024-01-07

Applicant: InnoLux Corporation

Inventor： Jui-Jen YUEH ,  Cheng-Chi Wang ,  Ju-Li Wang

IPC: H01L23/538 ,  H01L21/56 ,  H01L23/00

CPC classification number: H01L23/5386 ,  H01L21/568 ,  H01L24/13 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L23/5383 ,  H01L25/03 ,  H01L25/16 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13155 ,  H01L2224/16227 ,  H01L2224/19 ,  H01L2224/211

Abstract: The present disclosure provides an electronic device and a manufacturing method. The electronic device includes a base layer, a first redistribution structure, a first electronic unit, a second electronic unit, a protecting layer, and a connecting component. The base layer includes at least one via structure. The first redistribution structure is disposed on the base layer, and the first electronic unit and the second electronic unit are disposed on the first redistribution structure. The protecting layer surrounds the first electronic unit and the second electronic unit, and the first electronic unit and the second electronic unit are electrically connected to the connecting component through the first redistribution structure and the at least one via structure.

公开(公告)号：US20240363549A1

公开(公告)日：2024-10-31

申请号：US18613040

申请日：2024-03-21

Applicant: Innolux Corporation

Inventor： Wei-Yuan Cheng ,  Ju-Li Wang

IPC: H01L23/00 ,  H01L21/48 ,  H01L23/367 ,  H01L23/538 ,  H01L25/16

CPC classification number: H01L23/562 ,  H01L21/4846 ,  H01L23/367 ,  H01L23/5384 ,  H01L23/5386 ,  H01L24/32 ,  H01L24/33 ,  H01L25/16 ,  H01L24/13 ,  H01L24/16 ,  H01L24/73 ,  H01L2224/13105 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/73204

Abstract: An electronic device includes a substrate, a circuit layer, at least one electronic unit, a stress adjustment layer, and a buffer layer. The substrate has a first surface and a second surface opposite to each other and at least one side connected to the first surface and the second surface. The circuit layer is disposed on the first surface of the substrate. The at least one electronic unit is electronically connected to the circuit layer. The stress adjustment layer is disposed on the second surface of the substrate. The buffer layer surrounds the substrate, wherein the stress adjustment layer is located between the substrate and the buffer layer, and the buffer layer is in contact with the at least one side of the substrate.

公开(公告)号：US20240258297A1

公开(公告)日：2024-08-01

申请号：US18409824

申请日：2024-01-11

Applicant: InnoLux Corporation

Inventor： Kuang-Ming FAN ,  Ju-Li Wang ,  Chin-Ming Huang ,  Sheng-Nan Chen

IPC: H01L25/00 ,  H01L23/00 ,  H01L23/48 ,  H01L23/498 ,  H01L23/544 ,  H01L25/065

CPC classification number: H01L25/50 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/544 ,  H01L24/08 ,  H01L24/94 ,  H01L25/0655 ,  H01L2223/54426 ,  H01L2224/08225 ,  H01L2224/94 ,  H01L2924/181

Abstract: A manufacturing method of an electronic device and an electronic device are disclosed. The method includes: forming an intermediate layer on a first carrier, patterning the intermediate layer to form alignment marks; forming a release layer on the first carrier; disposing chips on the release layer, each chip including a bonding pad and a surface; forming an insulating layer surrounding the chips on the release layer to form a package structure; transferring the package structure to a second carrier, enabling the surface of each chip to face away from the second carrier and to be exposed by an upper surface of the insulating layer, a step difference formed between the surface of each chip and at least a portion of the upper surface of the insulating layer in a normal direction; and forming a redistribution layer electrically connected to each chip through the bonding pads on the package structure.

公开(公告)号：US20240130040A1

公开(公告)日：2024-04-18

申请号：US18462434

申请日：2023-09-07

Applicant: Innolux Corporation

Inventor： Ker-Yih Kao ,  Kuang-Ming Fan ,  Chia-Lin Yang ,  Jui-Jen Yueh ,  Ju-Li Wang

IPC: H05K1/02 ,  H05K3/28

CPC classification number: H05K1/0296 ,  H05K3/28 ,  H05K2201/09063

Abstract: Disclosed are a conductive film and a test component. A conductive film includes a supporting layer, a circuit layer and a protective layer. The supporting layer has a first surface and a second surface opposite to the first surface. The supporting layer supports the circuit layer. The circuit layer includes a first protruding part, a second protruding part and a connecting part. The first protruding part is disposed on the first surface. The second protruding part is disposed on the second surface. The connecting part is disposed between the first protruding part and the second protruding part. The first protruding part is connected to the second protruding part through the connecting part. The protective layer covers the first protruding part. The conductive film and the test component of the disclosed embodiments may have a buffering effect or increase the service life.