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公开(公告)号:US20210307153A1
公开(公告)日:2021-09-30
申请号:US16828447
申请日:2020-03-24
Applicant: Intel Corporation
Inventor: Feroz MOHAMMAD , Ralph V. MIELE , Thomas BOYD , Steven A. KLEIN , Gregorio R. MURTAGIAN , Eric W. BUDDRIUS , Daniel NEUMANN , Rolf LAIDO
Abstract: Embodiments disclosed herein include assemblies. In an embodiment, an assembly comprises a socket and a bolster plate on a board, where the bolster plate has load studs and an opening that surrounds the socket; a shim having first and second ends; and a carrier on the bolster plate, where the carrier has an opening and cutouts. The shim may have an opening through the first end as the second end is affixed to the carrier. The opening of the shim entirely over one cutout from a corner region of the carrier. In an embodiment, the assembly comprises an electronic package in the opening of the carrier, where the electronic package is affixed to the carrier, and a heatsink over the electronic package and carrier, where the first end is directly coupled to a surface of the heatsink and a surface of one load stud of the bolster plate.
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公开(公告)号:US20240421025A1
公开(公告)日:2024-12-19
申请号:US18290289
申请日:2021-12-16
Applicant: Intel Corporation
Inventor: Lianchang DU , Jeffory L. SMALLEY , Srikant NEKKANTY , Eric W. BUDDRIUS , Yi ZENG , Xinjun ZHANG , Maoxin YIN , Zhichao ZHANG , Chen ZHANG , Yuehong FAN , Mingli ZHOU , Guoliang YING , Yinglei REN , Chong J. ZHAO , Jun LU , Kai WANG , Timothy Glen HANNA , Vijaya K. BODDU , Mark A. SCHMISSEUR , Lijuan FENG
IPC: H01L23/367 , H01L23/538 , H01L25/065 , H01R13/627
Abstract: A semiconductor chip package is described. The semiconductor chip package has a substrate. The substrate has side I/Os on the additional surface area of the substrate. The side I/Os are coupled to I/Os of a semiconductor chip within the semiconductor chip package. A cooling assembly has also been described. The cooling assembly has a passageway to guide a cable to connect to a semiconductor chip's side I/Os that are located between a base of a cooling mass and an electronic circuit board that is between a bolster plate and a back plate and that is coupled to second I/Os of the semiconductor chip through a socket that the semiconductor chip's package is plugged into.
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公开(公告)号:US20210410317A1
公开(公告)日:2021-12-30
申请号:US17474974
申请日:2021-09-14
Applicant: Intel Corporation
Inventor: Phil GENG , Ralph V. MIELE , David SHIA , Jeffory L. SMALLEY , Eric W. BUDDRIUS , Sean T. SIVAPALAN , Olaotan ELENITOBA-JOHNSON , Mengqi LIU
IPC: H05K7/14 , H01L23/053 , H01L23/40 , H01L23/32
Abstract: An apparatus is described. The apparatus includes a back plate, where, an electronic circuit board is to be placed between the back plate and a thermal cooling mass for a semiconductor chip package. The back plate includes a first material and a second material. The first material has greater stiffness than the second material. The back plate further includes at least one of: a third material having greater stiffness than the second material; re-enforcement wires composed of the first material; a plug composed of the second material that is inserted into a first cavity in the first material, a stud inserted into a second cavity in the plug. An improved bolster plate having inner support arms has also been described.
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公开(公告)号:US20220196507A1
公开(公告)日:2022-06-23
申请号:US17133554
申请日:2020-12-23
Applicant: Intel Corporation
Inventor: Prabhakar SUBRAHMANYAM , Yi XIA , Ying-Feng PANG , Victor POLYANKO , Mark BIANCO , Bijoyraj SAHU , Minh T.D. LE , Carlos ALVIZO FLORES , Javier AVALOS GARCIA , Adriana LOPEZ INIGUEZ , Luz Karine SANDOVAL GRANADOS , Michael BERKTOLD , Damion SEARLS , Jin YANG , David SHIA , Samer MELHEM , Jeffrey Ryan CONNER , Hemant DESAI , John RAATZ , Richard DISCHLER , Bergen ANDERSON , Eric W. BUDDRIUS , Kenan ARIK , Barrett M. FANEUF , Lianchang DU , Yuehong FAN , Shengzhen ZHANG , Yuyang XIA , Jun ZHANG , Yuan Li , Catharina BIBER , Kristin L. WELDON , Brendan T. PAVELEK
Abstract: An apparatus is described. The apparatus includes a cover to enclose a junction between respective ends of first and second fluidic conduits. The first and second fluidic conduits transport a coolant fluid within an electronic system. The apparatus also includes a leak detection device to be located within a region that is enclosed by the cover when the junction is enclosed by the cover. The leak detection device is to detect a leak of the coolant fluid at the junction when the junction is enclosed by the cover. The first and second fluidic conduits extend outside the cover when the junction is enclosed by the cover. Another apparatus is also described. The other apparatus includes a leak detection device to detect a leak of coolant fluid from a specific component or junction in a liquid cooling system of an electronic system.
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公开(公告)号:US20220102889A1
公开(公告)日:2022-03-31
申请号:US17033386
申请日:2020-09-25
Applicant: Intel Corporation
Inventor: Thomas BOYD , Feifei CHENG , Eric W. BUDDRIUS , Mohanraj PRABHUGOUD
Abstract: Embodiments disclosed herein include sockets and electronic packages with socket architectures. In an embodiment, a socket comprises a housing with a first surface and a second surface. In an embodiment, a plurality of interconnect pins pass through the housing. In an embodiment, an alignment hole is provided through the housing. In an embodiment, an alignment post extending out from the first surface of the housing is also provided.
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