公开(公告)号：US11984685B2

公开(公告)日：2024-05-14

申请号：US17001113

申请日：2020-08-24

Applicant: Intel Corporation

Inventor： Phil Geng ,  Xiang Li ,  George Vergis ,  Mani Prakash

IPC: H01R13/629 ,  H01R12/72 ,  H01R13/631 ,  H01R13/635 ,  H05K5/02

CPC classification number: H01R13/62988 ,  H01R12/721 ,  H01R13/631 ,  H01R13/635 ,  H05K5/0295

Abstract: An embodiment of a latch apparatus for a circuit board comprises a first latch body with a retention mechanism for the circuit board, a second latch body with a coupling mechanism for a connector, and a spring mechanism mechanically coupled between the first latch body and the second latch body. Other embodiments are disclosed and claimed.

公开(公告)号：US10950958B2

公开(公告)日：2021-03-16

申请号：US16021269

申请日：2018-06-28

Applicant: Intel Corporation

Inventor： Phil Geng ,  Xiang Li ,  Mani Prakash ,  George Vergis

IPC: H01R13/62 ,  H01R13/64 ,  H01R13/627 ,  H01R12/70 ,  H05K1/14 ,  H01R12/73 ,  H05K3/36 ,  H01R12/72 ,  H05K1/11

Abstract: A memory module connector includes a memory module receiving slot configured to receive a memory module. The memory module connector further includes a restraining mechanism configured to release the memory module if a force applied by the memory module to the restraining mechanism is above a pre-determined force threshold.

公开(公告)号：US10141241B2

公开(公告)日：2018-11-27

申请号：US14767843

申请日：2014-09-27

Applicant: INTEL CORPORATION

Inventor： Jeffory L. Smalley ,  Susan F. Smith ,  Mani Prakash ,  Tao Liu ,  Henry C. Bosak ,  Harvey R. Kofstad ,  Almanzo T. Ortiz

IPC: H01L23/367 ,  H01L23/40 ,  H01L23/433 ,  H01L25/065

Abstract: An apparatus including a primary device and at least one secondary device coupled in a planar array to a substrate; a first passive heat exchanger disposed on the primary device and having an opening over an area corresponding to the at least one secondary device; a second passive heat exchanger disposed on the at least one secondary device; at least one first spring operable to apply a force to the first heat exchanger in a direction of the primary device; and at least one second spring operable to apply a force to the second heat exchanger in the direction of the secondary device. A method including placing a passive heat exchanger on a multi-chip package, and deflecting a spring to apply a force in a direction of an at least one secondary device on the package.

公开(公告)号：US20190165503A1

公开(公告)日：2019-05-30

申请号：US16264944

申请日：2019-02-01

Applicant: Intel Corporation

Inventor： Phil Geng ,  Xiang Li ,  George Vergis ,  Mani Prakash

IPC: H01R12/70 ,  H01R12/73

Abstract: An embodiment of a connector housing for a circuit board may include a connector body to receive the circuit board, and a relaxation mechanism mechanically coupled to the connector body to relax stress on the connector housing and maintain the circuit board received in the connector body under a load which exceeds a load threshold. Other embodiments are disclosed and claimed.

公开(公告)号：US20190141845A1

公开(公告)日：2019-05-09

申请号：US16220631

申请日：2018-12-14

Applicant: Intel Corporation

Inventor： Mani Prakash ,  Thomas T. Holden ,  Aaron Gorius ,  Michael T. Crocker ,  Matthew J. Adiletta ,  Russell Aoki

IPC: H05K5/00 ,  H05K5/02 ,  H05K7/02

Abstract: A configurable processor module includes a central processing unit (CPU) package mounted to a CPU substrate, which may be mounted to a circuit board substrate. The CPU substrate may include physical resources usable by the CPU package, which may not be included or duplicated on the circuit board substrate. As such, features of the CPU package that are unavailable on the circuit board substrate may be available on the CPU substrate. Additionally, the CPU substrate and physical resources may be selected and designed so as to provide varying levels of functionality across different compute devices that use the same type of CPU package.

公开(公告)号：US09832876B2

公开(公告)日：2017-11-28

申请号：US14575775

申请日：2014-12-18

Applicant: INTEL CORPORATION

Inventor： Mani Prakash ,  Thomas T. Holden ,  Jeffory L. Smalley ,  Ram S. Viswanath ,  Bassam N. Coury ,  Dimitrios Ziakas ,  Chong J. Zhao ,  Jonathan W. Thibado ,  Gregorio R. Murtagian ,  Kuang C. Liu ,  Rajasekaran Swaminathan ,  Zhichao Zhang ,  John M. Lynch ,  David J. Llapitan ,  Sanka Ganesan ,  Xiang Li ,  George Vergis

IPC: H05K1/18 ,  H01L23/00 ,  H01R12/71 ,  H01R12/79

CPC classification number: H05K1/181 ,  H01L23/00 ,  H01L23/498 ,  H01L2224/16225 ,  H01L2924/15311 ,  H01R12/712 ,  H01R12/79 ,  H05K2201/10159 ,  H05K2201/10325 ,  Y02P70/611

Abstract: Configurable central processing unit (CPU) package substrates are disclosed. A package substrate is described that includes a processing device interface. The package substrate also includes a memory device electrical interface disposed on the package substrate. The package substrate also includes a removable memory mechanical interface disposed proximately to the memory device electrical interface. The removable memory mechanical interface is to allow a memory device to be easily removed from the package substrate after attachment of the memory device to the package substrate.

公开(公告)号：US09806003B2

公开(公告)日：2017-10-31

申请号：US15197129

申请日：2016-06-29

Applicant: Intel Corporation

Inventor： Jeffory L. Smalley ,  Susan F. Smith ,  Thu Huynh ,  Mani Prakash

IPC: H01L23/42 ,  H01L25/00 ,  H05K1/02 ,  H05K7/20 ,  H01L23/427 ,  H01L25/065

CPC classification number: H01L23/427 ,  H01L23/3672 ,  H01L23/473 ,  H01L25/0655 ,  H01L25/50 ,  H05K1/0203 ,  H05K7/20336 ,  H05K7/20409 ,  H05K7/20509 ,  H05K2201/10522

Abstract: An apparatus including a primary device and at least one secondary device coupled to a substrate; a heat exchanger disposed on the primary device and on the at least one secondary device, wherein the heat exchanger includes at least one portion disposed over an area corresponding to the primary device or the at least one second device including a deflectable surface; and at least one thermally conductive conduit coupled to the heat exchanger. A method including placing a heat exchanger on a multi-chip package, the heat exchanger including the heat exchanger including at least one floating section operable to move in a direction toward or away from at least one of the plurality of dice and at least one thermally conductive conduit disposed in a channel of the heat exchanger and connected to the at least one floating section; and coupling the heat exchanger to the multi-chip package.

公开(公告)号：US10790603B2

公开(公告)日：2020-09-29

申请号：US16264944

申请日：2019-02-01

Applicant: Intel Corporation

Inventor： Phil Geng ,  Xiang Li ,  George Vergis ,  Mani Prakash

IPC: H01R12/70 ,  H01R12/73

Abstract: An embodiment of a connector housing for a circuit board may include a connector body to receive the circuit board, and a relaxation mechanism mechanically coupled to the connector body to relax stress on the connector housing and maintain the circuit board received in the connector body under a load which exceeds a load threshold. Other embodiments are disclosed and claimed.

公开(公告)号：US20190044262A1

公开(公告)日：2019-02-07

申请号：US16021269

申请日：2018-06-28

Applicant: Intel Corporation

Inventor： Phil Geng ,  Xiang Li ,  Mani Prakash ,  George Vergis

IPC: H01R12/70 ,  H05K1/14 ,  H01R12/73

Abstract: A memory module connector includes a memory module receiving slot configured to receive a memory module. The memory module connector further includes a restraining mechanism configured to release the memory module if a force applied by the memory module to the restraining mechanism is above a pre-determined force threshold.

公开(公告)号：US09935033B2

公开(公告)日：2018-04-03

申请号：US14918119

申请日：2015-10-20

Applicant: Intel Corporation

Inventor： Susan F. Smith ,  Jeffory L. Smalley ,  Mani Prakash ,  Thu Huynh

IPC: H01L23/00 ,  H01L23/367 ,  H01L25/00 ,  H01L25/065 ,  H01L23/427 ,  H01L21/48 ,  H01L23/40

CPC classification number: H01L23/3672 ,  H01L21/4882 ,  H01L23/40 ,  H01L23/4006 ,  H01L23/427 ,  H01L25/065 ,  H01L25/50 ,  H01L2023/4037 ,  H01L2023/4056 ,  H01L2023/4068 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An apparatus including a primary device and at least one secondary device coupled in a planar array to a substrate; a first heat exchanger disposed on the primary device and having an opening over an area corresponding to the at least one secondary device; a second heat exchanger disposed in the opening on the at least one secondary device; at least one heat pipe coupled to the first heat exchanger and the second heat exchanger. A method including placing a heat exchanger on a multi-chip package, the heat exchanger including a first portion, a second portion and at least one heat pipe coupled to the first portion and the second portion; and coupling the heat exchanger to the multi-chip package.