公开(公告)号：US20160118315A1

公开(公告)日：2016-04-28

申请号：US14918119

申请日：2015-10-20

Applicant: Intel Corporation

Inventor： Susan F. Smith ,  Jeffory L. Smalley ,  Mani Prakash ,  Thu Huynh

IPC: H01L23/367 ,  H01L25/065 ,  H01L21/48 ,  H01L25/00

CPC classification number: H01L23/3672 ,  H01L21/4882 ,  H01L23/40 ,  H01L23/4006 ,  H01L23/427 ,  H01L25/065 ,  H01L25/50 ,  H01L2023/4037 ,  H01L2023/4056 ,  H01L2023/4068 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An apparatus including a primary device and at least one secondary device coupled in a planar array to a substrate; a first heat exchanger disposed on the primary device and having an opening over an area corresponding to the at least one secondary device; a second heat exchanger disposed in the opening on the at least one secondary device; at least one heat pipe coupled to the first heat exchanger and the second heat exchanger. A method including placing a heat exchanger on a multi-chip package, the heat exchanger including a first portion, a second portion and at least one heat pipe coupled to the first portion and the second portion; and coupling the heat exchanger to the multi-chip package.

Abstract translation: 一种装置，包括主要装置和至少一个辅助装置，其以平面阵列耦合到基板; 第一热交换器，其设置在所述主装置上并且在对应于所述至少一个次装置的区域上具有开口; 设置在所述至少一个次要装置的开口中的第二热交换器; 耦合到第一热交换器和第二热交换器的至少一个热管。 一种方法，包括将热交换器放置在多芯片封装上，所述热交换器包括耦合到所述第一部分和所述第二部分的第一部分，第二部分和至少一个热管; 并将热交换器耦合到多芯片封装。

公开(公告)号：US09806003B2

公开(公告)日：2017-10-31

申请号：US15197129

申请日：2016-06-29

Applicant: Intel Corporation

Inventor： Jeffory L. Smalley ,  Susan F. Smith ,  Thu Huynh ,  Mani Prakash

IPC: H01L23/42 ,  H01L25/00 ,  H05K1/02 ,  H05K7/20 ,  H01L23/427 ,  H01L25/065

CPC classification number: H01L23/427 ,  H01L23/3672 ,  H01L23/473 ,  H01L25/0655 ,  H01L25/50 ,  H05K1/0203 ,  H05K7/20336 ,  H05K7/20409 ,  H05K7/20509 ,  H05K2201/10522

Abstract: An apparatus including a primary device and at least one secondary device coupled to a substrate; a heat exchanger disposed on the primary device and on the at least one secondary device, wherein the heat exchanger includes at least one portion disposed over an area corresponding to the primary device or the at least one second device including a deflectable surface; and at least one thermally conductive conduit coupled to the heat exchanger. A method including placing a heat exchanger on a multi-chip package, the heat exchanger including the heat exchanger including at least one floating section operable to move in a direction toward or away from at least one of the plurality of dice and at least one thermally conductive conduit disposed in a channel of the heat exchanger and connected to the at least one floating section; and coupling the heat exchanger to the multi-chip package.

公开(公告)号：US10141241B2

公开(公告)日：2018-11-27

申请号：US14767843

申请日：2014-09-27

Applicant: INTEL CORPORATION

Inventor： Jeffory L. Smalley ,  Susan F. Smith ,  Mani Prakash ,  Tao Liu ,  Henry C. Bosak ,  Harvey R. Kofstad ,  Almanzo T. Ortiz

IPC: H01L23/367 ,  H01L23/40 ,  H01L23/433 ,  H01L25/065

Abstract: An apparatus including a primary device and at least one secondary device coupled in a planar array to a substrate; a first passive heat exchanger disposed on the primary device and having an opening over an area corresponding to the at least one secondary device; a second passive heat exchanger disposed on the at least one secondary device; at least one first spring operable to apply a force to the first heat exchanger in a direction of the primary device; and at least one second spring operable to apply a force to the second heat exchanger in the direction of the secondary device. A method including placing a passive heat exchanger on a multi-chip package, and deflecting a spring to apply a force in a direction of an at least one secondary device on the package.

公开(公告)号：US09494996B2

公开(公告)日：2016-11-15

申请号：US13843855

申请日：2013-03-15

Applicant: Intel Corporation

Inventor： Ankush Varma ,  Robin A. Steinbrecher ,  Susan F. Smith ,  Sandeep Ahuja ,  Vivek Garg ,  Tessil Thomas ,  Krishnakanth V. Sistla ,  Chris Poirier ,  Martin Mark T. Rowland

IPC: G06F1/32 ,  G06F1/00 ,  G06F1/20

CPC classification number: G06F1/3234 ,  G06F1/20 ,  G06F1/206 ,  G06F1/3203 ,  G06F1/324 ,  G06F1/3287 ,  Y02D10/126 ,  Y02D10/16

Abstract: A processor is described having a semiconductor chip having non volatile storage circuitry. The non volatile storage circuitry has information identifying a maximum operational frequency of the processor at which the processor's operation is guaranteed for an ambient temperature that corresponds to an extreme thermal event.

Abstract translation: 描述了具有具有非易失性存储电路的半导体芯片的处理器。 非易失性存储电路具有识别处理器的最大工作频率的信息，在该处理器处理器的操作被保证对应于极端热事件的环境温度。

公开(公告)号：US20180040536A1

公开(公告)日：2018-02-08

申请号：US15787544

申请日：2017-10-18

Applicant: Intel Corporation

Inventor： Jeffory L. Smalley ,  Susan F. Smith ,  Thu Huynh ,  Mani Prakash

IPC: H01L23/427 ,  H05K7/20 ,  H01L25/065 ,  H05K1/02 ,  H01L25/00

CPC classification number: H01L23/427 ,  H01L23/3672 ,  H01L23/473 ,  H01L24/00 ,  H01L25/0655 ,  H05K7/20336 ,  H05K7/20409 ,  H05K7/20509

Abstract: An apparatus including a primary device and at least one secondary device coupled to a substrate; a heat exchanger disposed on the primary device and on the at least one secondary device, wherein the heat exchanger includes at least one portion disposed over an area corresponding to the primary device or the at least one second device including a deflectable surface; and at least one thermally conductive conduit coupled to the heat exchanger. A method including placing a heat exchanger on a multi-chip package, the heat exchanger including the heat exchanger including at least one floating section operable to move in a direction toward or away from at least one of the plurality of dice and at least one thermally conductive conduit disposed in a channel of the heat exchanger and connected to the at least one floating section; and coupling the heat exchanger to the multi-chip package.

公开(公告)号：US09848510B2

公开(公告)日：2017-12-19

申请号：US14578037

申请日：2014-12-19

Applicant: Intel Corporation

Inventor： Vijaykumar Krithivasan ,  Jeffory L. Smalley ,  David J. Llapitan ,  Gaurav Chawla ,  Mani Prakash ,  Susan F. Smith

IPC: H01L23/32 ,  H05K7/20 ,  H01L23/36 ,  H01L23/40

CPC classification number: H05K7/2039 ,  H01L23/32 ,  H01L23/36 ,  H01L23/40 ,  H01L2924/0002 ,  H05K2201/10378 ,  H05K2201/1056 ,  H01L2924/00

Abstract: Embodiments of the present disclosure are directed towards a socket loading element and associated techniques and configurations. In one embodiment, an apparatus may include a loading element configured to transfer a compressive load from a heat spreader to a socket assembly, wherein the loading element is configured to form a perimeter around a die when the loading element is coupled with an interposer disposed between the die and the socket assembly and wherein the loading element includes an opening configured to accommodate the die. Other embodiments may be described and/or claimed.

公开(公告)号：US09935033B2

公开(公告)日：2018-04-03

申请号：US14918119

申请日：2015-10-20

Applicant: Intel Corporation

Inventor： Susan F. Smith ,  Jeffory L. Smalley ,  Mani Prakash ,  Thu Huynh

IPC: H01L23/00 ,  H01L23/367 ,  H01L25/00 ,  H01L25/065 ,  H01L23/427 ,  H01L21/48 ,  H01L23/40

CPC classification number: H01L23/3672 ,  H01L21/4882 ,  H01L23/40 ,  H01L23/4006 ,  H01L23/427 ,  H01L25/065 ,  H01L25/50 ,  H01L2023/4037 ,  H01L2023/4056 ,  H01L2023/4068 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An apparatus including a primary device and at least one secondary device coupled in a planar array to a substrate; a first heat exchanger disposed on the primary device and having an opening over an area corresponding to the at least one secondary device; a second heat exchanger disposed in the opening on the at least one secondary device; at least one heat pipe coupled to the first heat exchanger and the second heat exchanger. A method including placing a heat exchanger on a multi-chip package, the heat exchanger including a first portion, a second portion and at least one heat pipe coupled to the first portion and the second portion; and coupling the heat exchanger to the multi-chip package.

公开(公告)号：US20160183375A1

公开(公告)日：2016-06-23

申请号：US14578037

申请日：2014-12-19

Applicant: Intel Corporation

Inventor： Vijaykumar Krithivasan ,  Jeffory L. Smalley ,  David J. Llapitan ,  Gaurav Chawla ,  Mani Prakash ,  Susan F. Smith

IPC: H05K1/18 ,  H01L23/40 ,  H01L23/498 ,  B23P15/26 ,  H01L21/48 ,  H05K3/32 ,  H05K7/20 ,  H01L23/367 ,  H01L21/50

CPC classification number: H05K7/2039 ,  H01L23/32 ,  H01L23/36 ,  H01L23/40 ,  H01L2924/0002 ,  H05K2201/10378 ,  H05K2201/1056 ,  H01L2924/00

Abstract: Embodiments of the present disclosure are directed towards a socket loading element and associated techniques and configurations. In one embodiment, an apparatus may include a loading element configured to transfer a compressive load from a heat spreader to a socket assembly, wherein the loading element is configured to form a perimeter around a die when the loading element is coupled with an interposer disposed between the die and the socket assembly and wherein the loading element includes an opening configured to accommodate the die. Other embodiments may be described and/or claimed.

Abstract translation: 本公开的实施例针对套接字加载元件和相关联的技术和配置。 在一个实施例中，设备可以包括加载元件，该加载元件被配置为将压缩负载从散热器传送到插座组件，其中所述加载元件构造成当所述加载元件与设置在 模具和插座组件，并且其中装载元件包括构造成容纳模具的开口。 可以描述和/或要求保护其他实施例。