公开(公告)号：US06677217B2

公开(公告)日：2004-01-13

申请号：US10180277

申请日：2002-06-26

申请人： Jae-hyun Joo ,  Wan-don Kim ,  Seok-jun Won ,  Soon-yeon Park

发明人： Jae-hyun Joo ,  Wan-don Kim ,  Seok-jun Won ,  Soon-yeon Park

IPC分类号： H01L2120

CPC分类号： H01L28/84 ,  H01L28/55 ,  H01L28/60 ,  H01L28/90

摘要： The effective area of a MIM capacitor is increased by forming a lower electrode that includes hemispherical grain lumps. The hemispherical grain lumps are formed by heat-treating a metal layer in an oxygen and/or nitrogen atmosphere, thus oxidizing the surface of the metal layer or growing the crystal grains of the metal layer. The MIM capacitor may be formed of Pt, Ru, Rh, Os, Ir, or Pd, and the hemispherical grain lumps may be formed of Pt, Ru, Rh, Os, Ir, or Pd. Since the metal layer is primarily heat-treated during the formation of the lower electrode, it is possible to reduce the degree to which the surface morphology of the lower electrode is rapidly changed due to a heat treatment subsequent to forming a dielectric layer and an upper electrode.

摘要翻译： MIM电容器的有效面积通过形成包括半球形颗粒的下部电极而增加。 通过在氧气和/或氮气气氛中热处理金属层，从而氧化金属层的表面或生长金属层的晶粒，形成半球状晶粒块。 MIM电容器可以由Pt，Ru，Rh，Os，Ir或Pd形成，并且半球状晶粒块可以由Pt，Ru，Rh，Os，Ir或Pd形成。 由于金属层在下电极的形成期间主要进行热处理，所以可以降低由于在形成介电层和上层之后的热处理而使下电极的表面形态快速变化的程度 电极。

公开(公告)号：US06472319B2

公开(公告)日：2002-10-29

申请号：US09851910

申请日：2001-05-09

申请人： Seok-jun Won ,  Yun-jung Lee ,  Soon-yeon Park ,  Cha-young Yoo ,  Doo-sup Hwang ,  Eun-ae Chung ,  Wan-don Kim

发明人： Seok-jun Won ,  Yun-jung Lee ,  Soon-yeon Park ,  Cha-young Yoo ,  Doo-sup Hwang ,  Eun-ae Chung ,  Wan-don Kim

IPC分类号： H01L2144

CPC分类号： H01L28/55 ,  H01L28/65

摘要： A method for manufacturing a capacitor of a semiconductor memory device by a two-step thermal treatment is provided. A lower electrode is formed on a semiconductor substrate. A dielectric layer is formed over the lower electrode. An upper electrode formed of a noble metal is formed over the dielectric layer. The resultant having the upper electrode undergoes a first thermal treatment under a first atmosphere including oxygen at a first temperature which is selected to be within a range of 200-600° C., which is lower than the oxidation temperature of the upper electrode. The first thermally treated resultant undergoes a second thermal treatment under a second atmosphere without oxygen at a second temperature which is selected to be within a range of 300-900° C., which is higher than the first temperature.

摘要翻译： 提供了通过两步热处理制造半导体存储器件的电容器的方法。 在半导体衬底上形成下电极。 在下电极上形成电介质层。 在电介质层上形成由贵金属形成的上电极。 具有上电极的所得物在包含氧的第一气氛下进行第一热处理，所述第一气氛在第一温度下被选择在低于上电极的氧化温度的200-600℃的范围内。 第一热处理产物在第二温度下在没有氧的第二气氛下进行第二热处理，第二温度选择在比第一温度高的300-900℃的范围内。

公开(公告)号：US06649502B2

公开(公告)日：2003-11-18

申请号：US09859168

申请日：2001-05-16

申请人： Cha-young Yoo ,  Han-jin Lim ,  Wan-don Kim ,  Se-jin Lee ,  Soon-yeon Park ,  Yong-kuk Jeong ,  Han-mei Choi ,  Gyung-hoon Hong ,  Seok-jun Won

发明人： Cha-young Yoo ,  Han-jin Lim ,  Wan-don Kim ,  Se-jin Lee ,  Soon-yeon Park ,  Yong-kuk Jeong ,  Han-mei Choi ,  Gyung-hoon Hong ,  Seok-jun Won

IPC分类号： H01L213205

CPC分类号： H01L21/02183 ,  C23C16/405 ,  C23C16/45557 ,  H01L21/02337 ,  H01L21/02348 ,  H01L21/31604 ,  H01L28/40 ,  H01L28/56

摘要： A dielectric region for a device such as a memory cell capacitor is formed by depositing a metal oxide, such as tantalum oxide, on a substrate at a first deposition rate in a first atmosphere maintained within a first temperature range and a first pressure range that produce a first tantalum oxide layer with a desirable step coverage. Metal oxide is subsequently deposited on the first metal oxide layer in a second atmosphere maintained within a second temperature range and a second pressure range that produce a second deposition rate greater than the first deposition rate to form a second tantalum oxide layer on the first tantalum oxide layer. For example, the first atmosphere may be maintained at a temperature in a range from about 350° C. to about 460° C. and a pressure in a range from about 0.01 Torr to about 2.0 Torr during formation of a first tantalum oxide layer, and the second atmosphere may be maintained at a temperature in a range from about 400° C. to about 500° C. and a pressure in a range from about 0.1 Torr to about 10.0 Torr during formation of a second tantalum oxide layer.

公开(公告)号：US20060263977A1

公开(公告)日：2006-11-23

申请号：US11462178

申请日：2006-08-03

申请人： Wan-don Kim ,  Jae-hyun Joo ,  Seok-jun Won ,  Jung-hee Chung ,  Jin-yong Kim ,  Suk-jin Chung

发明人： Wan-don Kim ,  Jae-hyun Joo ,  Seok-jun Won ,  Jung-hee Chung ,  Jin-yong Kim ,  Suk-jin Chung

IPC分类号： H01L21/8242

CPC分类号： H01L28/84 ,  H01L27/1085

摘要： A method of fabricating a uniformly wrinkled capacitor lower electrode without the need to perform a high-temperature heat treatment and a method of fabricating a capacitor including the uniformly wrinkled capacitor lower electrode are provided. A first conductive layer is formed. Then, a second conductive layer including about 20% to about 50% of impurities is formed on the first conductive layer. Next, at least some of the impurities are exhausted from the second conductive layer by heat treating the second conductive layer. A surface of the second conductive layer is wrinkled due to the exhaustion of the impurities from the second conductive layer. A dielectric layer and an upper capacitor electrode may then be formed.

摘要翻译： 提供一种制造均匀起皱的电容器下电极而不需要执行高温热处理的方法，以及制造包括均匀起皱的电容器下电极的电容器的方法。 形成第一导电层。 然后，在第一导电层上形成包含约20％至约50％的杂质的第二导电层。 接下来，通过热处理第二导电层，至少一些杂质从第二导电层排出。 由于来自第二导电层的杂质的耗尽，第二导电层的表面起皱。 然后可以形成电介质层和上电容器电极。

公开(公告)号：US06613629B2

公开(公告)日：2003-09-02

申请号：US10213856

申请日：2002-08-07

申请人： Wan-don Kim ,  Cha-young Yoo ,  Jae-hyun Joo ,  Seok-jun Won

发明人： Wan-don Kim ,  Cha-young Yoo ,  Jae-hyun Joo ,  Seok-jun Won

IPC分类号： H01L218242

CPC分类号： H01L28/60 ,  H01L27/10852 ,  H01L28/55

摘要： Methods for manufacturing a node of a stacked capacitor are provided. A first dielectric layer having a contact plug therein is formed on an integrated circuit substrate. A second dielectric layer including a storage node hole adjacent the contact plug is formed on the first dielectric layer. A conductive layer is deposited into the storage node hole and on the second dielectric layer. The conductive layer on the second dielectric layer is removed to provide a conductive storage node in the storage node hole. After the conductive layer on the second dielectric layer is removed, the conductive storage node is heat treated to reflow the conductive storage node before additional layers are formed on the conductive storage node.

公开(公告)号：US07700454B2

公开(公告)日：2010-04-20

申请号：US11462178

申请日：2006-08-03

申请人： Wan-don Kim ,  Jae-hyun Joo ,  Seok-jun Won ,  Jung-hee Chung ,  Jin-yong Kim ,  Suk-jin Chung

发明人： Wan-don Kim ,  Jae-hyun Joo ,  Seok-jun Won ,  Jung-hee Chung ,  Jin-yong Kim ,  Suk-jin Chung

IPC分类号： H01L21/20

CPC分类号： H01L28/84 ,  H01L27/1085

摘要： A method of fabricating a uniformly wrinkled capacitor lower electrode without the need to perform a high-temperature heat treatment and a method of fabricating a capacitor including the uniformly wrinkled capacitor lower electrode are provided. A first conductive layer is formed. Then, a second conductive layer including about 20% to about 50% of impurities is formed on the first conductive layer. Next, at least some of the impurities are exhausted from the second conductive layer by heat treating the second conductive layer. A surface of the second conductive layer is wrinkled due to the exhaustion of the impurities from the second conductive layer. A dielectric layer and an upper capacitor electrode may then be formed.

摘要翻译： 提供一种制造均匀起皱的电容器下电极而不需要进行高温热处理的方法，以及制造包括均匀起皱的电容器下电极的电容器的方法。 形成第一导电层。 然后，在第一导电层上形成包含约20％至约50％的杂质的第二导电层。 接下来，通过热处理第二导电层，至少一些杂质从第二导电层排出。 由于来自第二导电层的杂质的耗尽，第二导电层的表面起皱。 然后可以形成电介质层和上电容器电极。

公开(公告)号：US06692795B2

公开(公告)日：2004-02-17

申请号：US10026205

申请日：2001-12-21

申请人： Seok-jun Won ,  Soon-yeon Park ,  Cha-young Yoo

发明人： Seok-jun Won ,  Soon-yeon Park ,  Cha-young Yoo

IPC分类号： C23C800

CPC分类号： H01L28/60 ,  C23C16/0281 ,  C23C16/18 ,  H01L21/28556 ,  H01L28/55

摘要： A method for fabricating a semiconductor device is provided. The method includes the steps of: forming an insulating layer having an opening region on a semiconductor substrate; forming a first ruthenium layer on the insulating layer and the opening region by sputtering at a first pressure; forming a second ruthenium layer on the first ruthenium layer by first chemical vapor deposition (CVD) at a first flow rate of oxygen gas and at a second pressure, wherein the second pressure is greater than the first pressure; and forming a third ruthenium layer on the second ruthenium layer by second CVD at a second flow rate of oxygen gas and at a third pressure, wherein the third pressure is greater than the first pressure.

摘要翻译： 提供一种制造半导体器件的方法。 该方法包括以下步骤：在半导体衬底上形成具有开口区域的绝缘层; 在第一压力下通过溅射在绝缘层和开口区域上形成第一钌层; 通过第一化学气相沉积（CVD）以第一氧气流量和第二压力在第一钌层上形成第二钌层，其中第二压力大于第一压力; 以及在所述第二钌层上通过第二CVD以第二流量的氧气和在第三压力下形成第三钌层，其中所述第三压力大于所述第一压力。

公开(公告)号：US06680251B2

公开(公告)日：2004-01-20

申请号：US10080000

申请日：2002-02-21

申请人： Seok-jun Won ,  Cha-young Yoo ,  Sung-tae Kim ,  Young-wook Park ,  Yun-jung Lee ,  Soon-yeon Park

发明人： Seok-jun Won ,  Cha-young Yoo ,  Sung-tae Kim ,  Young-wook Park ,  Yun-jung Lee ,  Soon-yeon Park

IPC分类号： H01L2144

CPC分类号： H01L21/28556 ,  C23C16/0272 ,  C23C16/40 ,  H01L21/28568 ,  H01L28/55 ,  H01L28/60

摘要： A layer is formed by chemical vapor depositing a seeding layer of ruthenium oxide on a substrate at a chemical vapor deposition flow rate ratio of a ruthenium source to oxygen gas. A main layer of ruthenium is chemical vapor deposited on the seeding layer by increasing the chemical vapor deposition flow rate ratio of the ruthenium source to the oxygen gas.

摘要翻译： 通过以钌源与氧气的化学气相沉积流速比在化学气相沉积基底上的氧化钌晶面层形成层。 钌的主层通过提高钌源与氧气的化学气相沉积流速比化学气相沉积在接种层上。

公开(公告)号：US07018933B2

公开(公告)日：2006-03-28

申请号：US10426743

申请日：2003-04-30

申请人： Wan-don Kim ,  Jin-won Kim ,  Seok-jun Won ,  Cha-young Yoo

发明人： Wan-don Kim ,  Jin-won Kim ,  Seok-jun Won ,  Cha-young Yoo

IPC分类号： H01L21/302 ,  H01L21/8242

CPC分类号： H01L21/02183 ,  H01L21/0228 ,  H01L21/02337 ,  H01L21/02348 ,  H01L21/31604 ,  H01L28/91

摘要： A metal-insulator-metal (MIM) capacitor of a semiconductor device, and a manufacturing method thereof, includes a lower electrode formed of a refractory metal or a conductive compound including the refractory metal, a dielectric film formed of a high dielectric material, and an upper electrode formed of a platinum-family metal or a platinum-family metal oxide. Accordingly, the MIM capacitor satisfies the criteria of step coverage, electrical characteristics and manufacturing costs, as compared to a conventional MIM capacitor in which the upper and lower electrodes are formed of the same material such as a platinum-family metal, a refractory metal or a conductive compound including the refractory metal. The capacitor is especially suitable for mass production in semiconductor fabrication processes.

公开(公告)号：US06580111B2

公开(公告)日：2003-06-17

申请号：US09863679

申请日：2001-05-23

申请人： Wan-don Kim ,  Jin-won Kim ,  Seok-jun Won ,  Cha-young Yoo

发明人： Wan-don Kim ,  Jin-won Kim ,  Seok-jun Won ,  Cha-young Yoo

IPC分类号： H01L27108

CPC分类号： H01L21/02183 ,  H01L21/0228 ,  H01L21/02337 ,  H01L21/02348 ,  H01L21/31604 ,  H01L28/91

摘要： A metal-insulator-metal (MIM) capacitor of a semiconductor device, and a manufacturing method thereof, includes a lower electrode formed of a refractory metal or a conductive compound including the refractory metal, a dielectric film formed of a high dielectric material, and an upper electrode formed of a platinum-family metal or a platinum-family metal oxide. Accordingly, the MIM capacitor satisfies the criteria of step coverage, electrical characteristics and manufacturing costs, as compared to a conventional MIM capacitor in which the upper and lower electrodes are formed of the same material such as a platinum-family metal, a refractory metal or a conductive compound including the refractory metal. The capacitor is especially suitable for mass production in semiconductor fabrication processes.

摘要翻译： 半导体器件的金属 - 绝缘体 - 金属（MIM）电容器及其制造方法包括由难熔金属形成的下电极或包含难熔金属的导电化合物，由高电介质材料形成的电介质膜，以及 由铂族金属或铂族金属氧化物形成的上电极。 因此，与常规的MIM电容器相比，MIM电容器满足阶梯覆盖，电特性和制造成本的标准，其中上电极和下电极由相同的材料形成，例如铂族金属，难熔金属或 包括难熔金属的导电化合物。 电容器特别适用于半导体制造工艺中的批量生产。