公开(公告)号：US20130087883A1

公开(公告)日：2013-04-11

申请号：US13268066

申请日：2011-10-07

申请人： James Mathew ,  Brett D. Lowe ,  Yunjun Ho ,  H. Jim Fulford ,  Jie Sun ,  Zhaoli Sun

发明人： James Mathew ,  Brett D. Lowe ,  Yunjun Ho ,  H. Jim Fulford ,  Jie Sun ,  Zhaoli Sun

IPC分类号： H01L29/06 ,  H01L21/31

CPC分类号： H01L29/0649 ,  H01L21/02164 ,  H01L21/022 ,  H01L21/02222 ,  H01L21/02271 ,  H01L21/02282 ,  H01L21/02326 ,  H01L21/02337 ,  H01L21/76229 ,  H01L27/11526 ,  H01L27/11573

摘要： A method of forming memory array and peripheral circuitry isolation includes chemical vapor depositing a silicon dioxide-comprising liner over sidewalls of memory array circuitry isolation trenches and peripheral circuitry isolation trenches formed in semiconductor material. Dielectric material is flowed over the silicon dioxide-comprising liner to fill remaining volume of the array isolation trenches and to form a dielectric liner over the silicon dioxide-comprising liner in at least some of the peripheral isolation trenches. The dielectric material is furnace annealed at a temperature no greater than about 500° C. The annealed dielectric material is rapid thermal processed to a temperature no less than about 800° C. A silicon dioxide-comprising material is chemical vapor deposited over the rapid thermal processed dielectric material to fill remaining volume of said at least some peripheral isolation trenches. Other aspects are disclosed, including integrated circuitry resulting from the disclosed methods and integrated circuitry independent of method of manufacture.

摘要翻译： 形成存储器阵列和外围电路隔离的方法包括在存储器阵列电路隔离沟槽的侧壁和在半导体材料中形成的外围电路隔离沟槽的化学气相沉积包含二氧化硅的衬垫。 电介质材料流过含二氧化硅的衬垫以填充阵列隔离沟槽的剩余体积，并在至少一些外围隔离沟槽中的含二氧化硅的衬垫上形成电介质衬垫。 电介质材料在不大于约500℃的温度下进行炉退火。退火的电介质材料被快速热处理至不低于约800℃的温度。含二氧化硅的材料经快速热化学气相沉积 处理的介电材料以填充所述至少一些外围隔离沟槽的剩余体积。 公开了其它方面，包括由公开的方法产生的集成电路和独立于制造方法的集成电路。

公开(公告)号：US08461016B2

公开(公告)日：2013-06-11

申请号：US13268066

申请日：2011-10-07

申请人： James Mathew ,  Brett D. Lowe ,  Yunjun Ho ,  H. Jim Fulford ,  Jie Sun ,  Zhaoli Sun

发明人： James Mathew ,  Brett D. Lowe ,  Yunjun Ho ,  H. Jim Fulford ,  Jie Sun ,  Zhaoli Sun

IPC分类号： H01L21/76

CPC分类号： H01L29/0649 ,  H01L21/02164 ,  H01L21/022 ,  H01L21/02222 ,  H01L21/02271 ,  H01L21/02282 ,  H01L21/02326 ,  H01L21/02337 ,  H01L21/76229 ,  H01L27/11526 ,  H01L27/11573

摘要： A method of forming memory array and peripheral circuitry isolation includes chemical vapor depositing a silicon dioxide-comprising liner over sidewalls of memory array circuitry isolation trenches and peripheral circuitry isolation trenches formed in semiconductor material. Dielectric material is flowed over the silicon dioxide-comprising liner to fill remaining volume of the array isolation trenches and to form a dielectric liner over the silicon dioxide-comprising liner in at least some of the peripheral isolation trenches. The dielectric material is furnace annealed at a temperature no greater than about 500° C. The annealed dielectric material is rapid thermal processed to a temperature no less than about 800° C. A silicon dioxide-comprising material is chemical vapor deposited over the rapid thermal processed dielectric material to fill remaining volume of said at least some peripheral isolation trenches. Other aspects are disclosed, including integrated circuitry resulting from the disclosed methods and integrated circuitry independent of method of manufacture.

摘要翻译： 形成存储器阵列和外围电路隔离的方法包括在存储器阵列电路隔离沟槽的侧壁和在半导体材料中形成的外围电路隔离沟槽的化学气相沉积包含二氧化硅的衬垫。 电介质材料流过含二氧化硅的衬垫以填充阵列隔离沟槽的剩余体积，并在至少一些外围隔离沟槽中的含二氧化硅的衬垫上形成电介质衬垫。 电介质材料在不大于约500℃的温度下进行炉退火。退火的电介质材料被快速热处理至不低于约800℃的温度。含二氧化硅的材料经快速热化学气相沉积 处理的介电材料以填充所述至少一些外围隔离沟槽的剩余体积。 公开了其它方面，包括由公开的方法产生的集成电路和独立于制造方法的集成电路。

公开(公告)号：US20130168756A1

公开(公告)日：2013-07-04

申请号：US13343087

申请日：2012-01-04

申请人： John Hopkins ,  James Mathew ,  Jie Sun ,  Gordon Haller

发明人： John Hopkins ,  James Mathew ,  Jie Sun ,  Gordon Haller

IPC分类号： H01L29/792 ,  H01L21/336

CPC分类号： H01L21/76224 ,  H01L27/11524 ,  H01L27/1157

摘要： Devices, memory arrays, and methods are disclosed. In an embodiment, one such device has a source/drain zone that has first and second active regions, and an isolation region and a dielectric plug between the first and second active regions. The dielectric plug may extend below upper surfaces of the first and second active regions and may be formed of a dielectric material having a lower removal rate than a dielectric material of the isolation region for a particular isotropic removal chemistry.

摘要翻译： 公开了设备，存储器阵列和方法。 在一个实施例中，一个这样的器件具有源极/漏极区域，其具有第一和第二有源区域，以及在第一和第二有源区域之间的隔离区域和电介质插塞。 电介质插塞可以延伸到第一和第二有源区域的上表面之下，并且可以由对于特定各向同性去除化学物质具有比隔离区域的电介质材料更低的去除速率的电介质材料形成。

公开(公告)号：US08907396B2

公开(公告)日：2014-12-09

申请号：US13343087

申请日：2012-01-04

申请人： John Hopkins ,  James Mathew ,  Jie Sun ,  Gordon Haller

发明人： John Hopkins ,  James Mathew ,  Jie Sun ,  Gordon Haller

IPC分类号： H01L29/76 ,  H01L29/94

CPC分类号： H01L21/76224 ,  H01L27/11524 ,  H01L27/1157

摘要： Devices, memory arrays, and methods are disclosed. In an embodiment, one such device has a source/drain zone that has first and second active regions, and an isolation region and a dielectric plug between the first and second active regions. The dielectric plug may extend below upper surfaces of the first and second active regions and may be formed of a dielectric material having a lower removal rate than a dielectric material of the isolation region for a particular isotropic removal chemistry.

摘要翻译： 公开了设备，存储器阵列和方法。 在一个实施例中，一个这样的器件具有源极/漏极区域，其具有第一和第二有源区域，以及在第一和第二有源区域之间的隔离区域和电介质插塞。 电介质插塞可以延伸到第一和第二有源区域的上表面之下，并且可以由对于特定各向同性去除化学物质具有比隔离区域的电介质材料更低的去除速率的电介质材料形成。

公开(公告)号：US20200228926A1

公开(公告)日：2020-07-16

申请号：US16559218

申请日：2019-09-03

申请人： Mahesh K. Banavar ,  Jie Sun ,  Shandeepa Wickramasinghe

发明人： Mahesh K. Banavar ,  Jie Sun ,  Shandeepa Wickramasinghe

IPC分类号： H04W4/029 ,  H04W4/33

摘要： A method for determining location of a target within an indoor environment, including the steps of: classifying a set of anchors having known locations within the indoor environment and a set of targets having unknown locations within the indoor environment, wherein each of the anchors and targets comprise hardware having sensors and wireless communication capabilities; creating a set of ordinal pair data sets comprising relative distances between each target and all anchors; ranking and aggregating the ordinal pair data sets to produce a set of dissimilarities that approximate distances; transforming the dissimilarities into estimated distances between each anchor and target using the known distances between the anchors as calibration; and inferring location of targets by formulating and solving a multidimensional unfolding optimization.

公开(公告)号：US20180108669A1

公开(公告)日：2018-04-19

申请号：US15296858

申请日：2016-10-18

申请人： Hongbin Zhu ,  Zhenyu Lu ,  Gordon Haller ,  Jie Sun ,  Randy J. Koval ,  John Hopkins

发明人： Hongbin Zhu ,  Zhenyu Lu ,  Gordon Haller ,  Jie Sun ,  Randy J. Koval ,  John Hopkins

IPC分类号： H01L27/115 ,  H01L29/10 ,  H01L29/51 ,  H01L21/311 ,  H01L21/28 ,  H01L21/285

CPC分类号： H01L27/11556 ,  H01L21/28273 ,  H01L21/28525 ,  H01L21/28556 ,  H01L21/31111 ,  H01L27/1157 ,  H01L27/11582 ,  H01L29/1037 ,  H01L29/513

摘要： Some embodiments include a semiconductor device having a stack structure including a source comprising polysilicon, an etch stop of oxide on the source, a select gate source on the etch stop, a charge storage structure over the select gate source, and a select gate drain over the charge storage structure. The semiconductor device may further include an opening extending vertically into the stack structure to a level adjacent to the source. A channel comprising polysilicon may be formed on a side surface and a bottom surface of the opening. The channel may contact the source at a lower portion of the opening, and may be laterally separated from the charge storage structure by a tunnel oxide. A width of the channel adjacent to the select gate source is greater than a width of the channel adjacent to the select gate drain.

公开(公告)号：US09677738B2

公开(公告)日：2017-06-13

申请号：US14211124

申请日：2014-03-14

申请人： Jie Sun ,  Christopher Hart ,  Stephen Naor

发明人： Jie Sun ,  Christopher Hart ,  Stephen Naor

IPC分类号： F21V5/00 ,  F21V3/00 ,  F21V5/04 ,  F21V29/83 ,  F21V29/77 ,  F21K9/232 ,  F21K9/60 ,  F21Y115/10

CPC分类号： F21V5/04 ,  F21K9/135 ,  F21K9/232 ,  F21K9/60 ,  F21V3/00 ,  F21V29/773 ,  F21V29/83 ,  F21Y2115/10 ,  Y02B20/30

摘要： An optical device for transforming an input light distribution from an LED light source to provide an omni-directional output light distribution for solid-state lighting is disclosed. The optical device has a conical form, comprising first and second coaxial cones of different refractive index, defined by coaxial inner and outer cone surfaces, which converge from a cone base to a rounded tip at the apex. Preferably, each of the inner and outer cone surfaces comprises a plurality of conical facets defining a grating structure. The inner cone, i.e. air cavity, is directly coupled to an LED emitter area. Cone angles and spacings of conical facets, defining inner and outer gratings, are tailored to reshape a predetermined input light distribution. Apertures assist in heat dissipation. A lightweight, compact device with high transmission efficiency can be manufactured at low cost by one-step injection molding from an optical-grade polymer, such as PMMA.

公开(公告)号：US08834982B2

公开(公告)日：2014-09-16

申请号：US13994487

申请日：2011-12-07

申请人： Wensheng Yang ,  Jie Sun ,  Xu Chen ,  Haimei Liu

发明人： Wensheng Yang ,  Jie Sun ,  Xu Chen ,  Haimei Liu

IPC分类号： B32B3/02 ,  C01B31/02 ,  B82Y40/00

CPC分类号： C01B31/0293 ,  B82Y30/00 ,  B82Y40/00 ,  C01B31/0206 ,  C01B32/15 ,  Y10T428/21

摘要： The invention relates to a carbon nanoring and a method for preparing the same. The carbon nanoring according to the present invention is composed of monolayered or multilayered coaxial carbon rings, wherein the carbon ring has a structure similar to that of a closed ring system formed by graphite sheet being rolled, and each of an axial dimension and a radial dimension of the carbon nanoring is nanoscale with the axial dimension being smaller than the radial dimension. The invention further provides a method for preparing the above carbon nanoring including calcinating in an inert atmosphere or a reducing atmosphere a layered double hydroxides obtained by intercalating a long-chain alkyl anion and a carbon source molecule, growing a carbon nanoring within a confined region between layers under the catalysis of the metal element in layers, and removing the metal and the metal oxide by dissolving in an acid to obtain the carbon nanoring. By using this method, the carbon nanoring can be effectively controlled in terms of the axial dimension, the radial dimension, and the number of layers of the carbon ring thereof. The carbon nanoring provided by the present invention has the nano-ring shaped structure and the excellent properties of carbon materials, as well as more edge carbons and dangling bonds, and thus it has broad application prospects in such field as nanodevices, energy storage and sensing.

摘要翻译： 本发明涉及一种碳纳米管及其制备方法。 根据本发明的碳纳米管由单层或多层同轴碳环组成，其中碳环的结构类似于由滚动的石墨片形成的闭环系统，其轴向尺寸和径向尺寸 的碳纳米尺寸是纳米级的，其轴向尺寸小于径向尺寸。 本发明还提供了一种制备上述碳纳米管的方法，包括在惰性气氛或还原气氛中煅烧通过插入长链烷基阴离子和碳源分子获得的层状双氢氧化物，在碳纳米管之间的限制区内生长碳纳米 在层内催化金属元素层，并通过溶解在酸中去除金属和金属氧化物以获得碳纳米。 通过使用该方法，可以根据其碳环的轴向尺寸，径向尺寸和层数有效地控制碳纳米化。 本发明提供的碳纳米管具有纳米环形结构和碳材料的优异性能，以及更多的边缘碳和悬挂键，因此在纳米器件，能量存储和感测领域具有广泛的应用前景 。

公开(公告)号：US20130273294A1

公开(公告)日：2013-10-17

申请号：US13994487

申请日：2011-12-07

申请人： Wensheng Yang ,  Jie Sun ,  Xu Chen ,  Haimei Liu

发明人： Wensheng Yang ,  Jie Sun ,  Xu Chen ,  Haimei Liu

IPC分类号： C01B31/02

CPC分类号： C01B31/0293 ,  B82Y30/00 ,  B82Y40/00 ,  C01B31/0206 ,  C01B32/15 ,  Y10T428/21

摘要： The invention relates to a carbon nanoring and a method for preparing the same. The carbon nanoring according to the present invention is composed of monolayered or multilayered coaxial carbon rings, wherein the carbon ring has a structure similar to that of a closed ring system formed by graphite sheet being rolled, and each of an axial dimension and a radial dimension of the carbon nanoring is nanoscale with the axial dimension being smaller than the radial dimension. The invention further provides a method for preparing the above carbon nanoring including calcinating in an inert atmosphere or a reducing atmosphere a layered double hydroxides obtained by intercalating a long-chain alkyl anion and a carbon source molecule, growing a carbon nanoring within a confined region between layers under the catalysis of the metal element in layers, and removing the metal and the metal oxide by dissolving in an acid to obtain the carbon nanoring. By using this method, the carbon nanoring can be effectively controlled in terms of the axial dimension, the radial dimension, and the number of layers of the carbon ring thereof. The carbon nanoring provided by the present invention has the nano-ring shaped structure and the excellent properties of carbon materials, as well as more edge carbons and dangling bonds, and thus it has broad application prospects in such field as nanodevices, energy storage and sensing.

摘要翻译： 本发明涉及一种碳纳米管及其制备方法。 根据本发明的碳纳米管由单层或多层同轴碳环组成，其中碳环的结构类似于由滚动的石墨片形成的闭环系统，其轴向尺寸和径向尺寸 的碳纳米尺寸是纳米级的，其轴向尺寸小于径向尺寸。 本发明还提供了一种制备上述碳纳米管的方法，包括在惰性气氛或还原气氛中煅烧通过嵌入长链烷基阴离子和碳源分子获得的层状双氢氧化物，在碳纳米管之间的限制区内生长碳纳米 在层内催化金属元素层，并通过溶解在酸中去除金属和金属氧化物以获得碳纳米。 通过使用该方法，可以根据其碳环的轴向尺寸，径向尺寸和层数有效地控制碳纳米化。 本发明提供的碳纳米管具有纳米环形结构和碳材料的优异性能，以及更多的边缘碳和悬挂键，因此在纳米器件，能量存储和感测领域具有广泛的应用前景 。

公开(公告)号：US08197914B2

公开(公告)日：2012-06-12

申请号：US11284193

申请日：2005-11-21

申请人： Diwakar Garg ,  Philip Bruce Henderson ,  Daniel Joseph Tempel ,  Thomas N. Jackson ,  Jie Sun

发明人： Diwakar Garg ,  Philip Bruce Henderson ,  Daniel Joseph Tempel ,  Thomas N. Jackson ,  Jie Sun

IPC分类号： H05H1/24

CPC分类号： C03C17/245 ,  C03C2217/216 ,  C03C2217/24 ,  C03C2217/241 ,  C03C2218/153 ,  C23C16/407

摘要： The present invention discloses plasma enhanced chemical vapor deposition (PECVD) process for depositing n-type and p-type zinc oxide-based transparent conducting oxides (TCOs) at low temperatures with excellent optical and electrical properties on glass and temperature sensitive materials such as plastics and polymers. Specifically, it discloses PECVD process for depositing n-type ZnO by doping it with B or F and p-type ZnO by doping it with nitrogen excellent optical and electrical properties on glass and temperature sensitive materials such as plastics and polymers for TCO application. The process utilizes a mixture of volatile zinc compound, argon and/or helium as a diluent gas, carbon dioxide as an oxidant, and a dopant or reactant to deposit the desired ZnO-based TCOs.

摘要翻译： 本发明公开了一种用于在低温下沉积n型和p型氧化锌基透明导电氧化物（TCO）的等离子体增强化学气相沉积（PECVD）工艺，在玻璃和温度敏感材料如塑料上具有优异的光学和电学性能 和聚合物。 具体地说，它公开了用于通过用B或F和p型ZnO掺杂以将氮掺杂在玻璃上的优异的光学和电学性质以及用于TCO应用的诸如塑料和聚合物的温度敏感材料来沉积n型ZnO的PECVD工艺。 该方法利用挥发性锌化合物，氩和/或氦气作为稀释气体，二氧化碳作为氧化剂和掺杂剂或反应物的混合物以沉积所需的ZnO基TCO。