中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

8 records (took 0.014 seconds)

    DATA EQUALIZING CIRCUIT AND DATA EQUALIZING METHOD
    2.
    发明申请
    DATA EQUALIZING CIRCUIT AND DATA EQUALIZING METHOD 有权
    数据均衡电路和数据均衡方法

    公开(公告)号：US20130170536A1

    公开(公告)日：2013-07-04

    申请号：US13407478

    申请日：2012-02-28

    Applicant: Chun Seok JEONG ,  Jae Jin LEE ,  Chang Sik YOO ,  Jang Woo LEE ,  Seok Joon KANG

    Inventor： Chun Seok JEONG ,  Jae Jin LEE ,  Chang Sik YOO ,  Jang Woo LEE ,  Seok Joon KANG

    IPC: H03H7/40

    CPC classification number: H04L25/03878 ,  H04L25/03012

    Abstract: A data equalizing circuit includes an equalizer configured to output data according to a control code; and a detection unit configured to divide the data into N number of calculation periods, count data transition frequencies for the N calculation periods, calculate dispersion values of the data transition frequencies for the N calculation periods, and output the control code corresponding to a largest dispersion value, in response to a counting interruption signal and a counting completion signal, wherein n is equal to or greater than 2, N is greater than n, and the data is divided to n number of unit intervals (UI), andwherein a phase shift of each of the calculation periods with respect to its corresponding UI is different from a phase shift of any of the other calculation periods with respect to its corresponding UI.

    Abstract translation: 数据均衡电路包括：均衡器，被配置为根据控制码输出数据; 以及检测单元，被配置为将数据划分为N个计算周期，用于N个计算周期的计数数据转换频率，计算N个计算周期的数据转换频率的色散值，并输出与最大色散对应的控制码 响应于计数中断信号和计数完成信号，其中n等于或大于2，N大于n，并且数据被划分为n个单位间隔（UI），并且其中相位 每个计算周期相对于其对应的UI的移位不同于任何其他计算周期相对于其对应的UI的相移。

    FLOW-CONTROLLING UNIT HAVING FUNCTION OF LIMITING TILTING ANGLE OF FLOW-CONTROLLING PIECE
    4.
    发明申请
    FLOW-CONTROLLING UNIT HAVING FUNCTION OF LIMITING TILTING ANGLE OF FLOW-CONTROLLING PIECE 审中-公开

    公开(公告)号：US20170219108A1

    公开(公告)日：2017-08-03

    申请号：US15123102

    申请日：2015-03-05

    Applicant: Jang Woo LEE

    Inventor： Jang Woo LEE

    IPC: F16K15/14 ,  E03C1/02

    CPC classification number: F16K15/144 ,  E03C1/025 ,  E03C1/08 ,  E03C2001/026 ,  G05D7/0173

    Abstract: A flow-controlling unit having a function of limiting the tilting angle of a flow-controlling piece which includes a flow-controlling plate, which is disposed perpendicular to the moving direction of a fluid in a flow channel. The flow-controlling plate includes first fluid through-holes through which the fluid passes and flow-controlling pieces which are provided in a part corresponding to the first fluid through-holes. The flow-controlling pieces are inclined in the direction of the inflow of the fluid and control the degree of opening of the first fluid through-holes by being tilted due to pressure applied from hydraulic pressure of the fluid. A tilting-angle-limiting plate has second fluid through-holes which communicate with the first fluid through-holes, wherein the diameter of the second fluid through-holes is smaller than the diameter of the first fluid through-holes, allowing the flow-controlling pieces to be supported to limit the tilting angle of the flow-controlling pieces.

    DATA EQUALIZING CIRCUIT AND DATA EQUALIZING METHOD
    5.
    发明申请
    DATA EQUALIZING CIRCUIT AND DATA EQUALIZING METHOD 有权
    数据均衡电路和数据均衡方法

    公开(公告)号：US20130170537A1

    公开(公告)日：2013-07-04

    申请号：US13407546

    申请日：2012-02-28

    Applicant: Chun Seok JEONG ,  Jae Jin LEE ,  Chang Sik YOO ,  Jang Woo LEE ,  Seok Joon KANG

    Inventor： Chun Seok JEONG ,  Jae Jin LEE ,  Chang Sik YOO ,  Jang Woo LEE ,  Seok Joon KANG

    IPC: H03H7/40

    CPC classification number: H04L25/03038

    Abstract: A data equalizing circuit includes an equalizer configured to control a gain of data according to a value of a control code and output a controller gain; and a detection unit configured to divide n cycles of the data into N periods, count data transition frequencies for n/N periods while changing the value of the control code, calculate dispersion values of data transition frequencies for 1/N periods of the data from the data transition frequencies for the n/N periods, and finally output the value of the control code corresponding to a largest dispersion value, wherein n is equal to or greater than 2 and is set such that boundaries of the respective n/N periods of the data have different positions in the 1 UI data.

    Abstract translation: 数据均衡电路包括均衡器，其被配置为根据控制码的值控制数据的增益并输出控制器增益; 以及检测单元，被配置为将数据的n个周期分成N个周期，在改变控制码的值的同时，计算n / N个周期的数据转换频率，计算数据的1 / N个周期的数据转换频率的色散值， n / N周期的数据转换频率，最后输出对应于最大色散值的控制码的值，其中n等于或大于2，并且被设置为使得各个n / N周期的边界 数据在1 UI数据中具有不同的位置。

    DATA ALIGNMENT CIRCUIT AND METHOD OF SEMICONDUCTOR MEMORY APPARATUS
    6.
    发明申请
    DATA ALIGNMENT CIRCUIT AND METHOD OF SEMICONDUCTOR MEMORY APPARATUS 有权
    数据对准电路和半导体存储器件的方法

    公开(公告)号：US20100329040A1

    公开(公告)日：2010-12-30

    申请号：US12649066

    申请日：2009-12-29

    Applicant: Chun Seok JEONG ,  Kee Teok PARK ,  Chang Sik YOO ,  Jang Woo LEE ,  Hong Jung KIM

    Inventor： Chun Seok JEONG ,  Kee Teok PARK ,  Chang Sik YOO ,  Jang Woo LEE ,  Hong Jung KIM

    IPC: G11C7/10 ,  G11C7/00 ,  G11C8/18

    CPC classification number: G11C7/22 ,  G11C7/1078 ,  G11C7/1087 ,  G11C7/1093 ,  G11C7/222

    Abstract: A data alignment circuit of a semiconductor memory apparatus includes: a data strobe clock phase control block configured to control a phase of a data strobe clock signal in response to a strobe delay code and generate a delayed strobe clock signal; a plurality of data phase control blocks configured to control phases of input data in response to data delay codes and generate delayed data; a plurality of data alignment blocks configured to latch the delayed data in response to the delayed strobe clock signal and generate latched data and aligned data; and a delay code generation block configured to perform an operation of determining phases of the latched data and generate the strobe delay code and the data delay codes.

    Abstract translation: 半导体存储装置的数据对准电路包括：数据选通时钟相位控制块，被配置为响应于选通延迟码来控制数据选通时钟信号的相位，并产生延迟的选通时钟信号; 多个数据相位控制块，被配置为响应于数据延迟码来控制输入数据的相位并产生延迟的数据; 多个数据对准块被配置为响应延迟的选通时钟信号来锁存延迟的数据，并产生锁存的数据和对准的数据; 以及延迟码生成块，被配置为执行确定所述锁存数据的相位的操作，并生成所述选通延迟码和所述数据延迟码。

    FLOW-CONTROLLING UNIT PROVIDED IN FLOW CHANNEL
    7.
    发明申请
    FLOW-CONTROLLING UNIT PROVIDED IN FLOW CHANNEL 审中-公开
    流量通道中提供的流量控制单元

    公开(公告)号：US20170068255A1

    公开(公告)日：2017-03-09

    申请号：US15123092

    申请日：2015-03-05

    Applicant: Jang Woo LEE

    Inventor： Jang Woo LEE

    IPC: G05D7/01 ,  E03C1/08 ,  E03C1/04 ,  F16K15/14 ,  E03C1/02

    CPC classification number: G05D7/0173 ,  E03C1/025 ,  E03C1/0404 ,  E03C1/08 ,  E03C2001/026 ,  F16K15/144 ,  Y10T137/784 ,  Y10T137/7843 ,  Y10T137/7875

    Abstract: A flow-controlling unit provided in a flow channel is disclosed. The flow-controlling unit provided in a flow channel, according to one embodiment of the present invention, comprises: a plate which is disposed perpendicular to the moving direction of a fluid in a flow channel, and on which are formed multiple fluid through-holes through, which the fluid passes; and one or more flow-control ling pieces which are provided in a position corresponding to the fluid through-holes, form an inclination with respect to the plate in the direction of the inflow of the fluid, are capable of tilting on the plate, and control the degree of opening of the fluid through-holes by being tilted due to pressure applied from hydraulic pressure of the fluid.

    Abstract translation: 公开了一种设置在流路中的流量控制单元。 根据本发明的一个实施例，设置在流动通道中的流量控制单元包括：垂直于流动通道中的流体的移动方向设置的板，并且其上形成有多个流体通孔 流体通过; 并且设置在与流体通孔相对应的位置处形成相对于板在流体流入方向上的倾斜的一个或多个流动控制片能够在板上倾斜，并且 通过由流体的液压施加的压力而倾斜来控制流体通孔的开度。

    AC LIGHT EMITTING DIODE HAVING FULL-WAVE LIGHT EMITTING CELL AND HALF-WAVE LIGHT EMITTING CELL
    8.
    发明申请
    AC LIGHT EMITTING DIODE HAVING FULL-WAVE LIGHT EMITTING CELL AND HALF-WAVE LIGHT EMITTING CELL 有权
    具有全波发光单元和半波发光单元的交流发光二极管

    公开(公告)号：US20110062459A1

    公开(公告)日：2011-03-17

    申请号：US12882406

    申请日：2010-09-15

    Applicant: Dae Sung KAL ,  Won Cheol SEO ,  Jang Woo LEE ,  Jin Cheol SHIN ,  Jong Kyu KIM ,  Sang Ki JIN ,  So Ra LEE

    Inventor： Dae Sung KAL ,  Won Cheol SEO ,  Jang Woo LEE ,  Jin Cheol SHIN ,  Jong Kyu KIM ,  Sang Ki JIN ,  So Ra LEE

    IPC: H01L33/08

    CPC classification number: H01L27/156 ,  H01L33/62 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: The present invention discloses an alternating current (AC) light emitting diode (LED) having half-wave light emitting cells and full-wave light emitting cells. The AC LED has a plurality of light emitting cells electrically connected between bonding pads on a single substrate. The AC LED includes a first row of half-wave light emitting cells each having an anode terminal and a cathode terminal, a second row of full-wave light emitting cells each having an anode terminal and a cathode terminal, and a third row of half-wave light emitting cells each having an anode terminal and a cathode terminal. In the AC LED, the second row is arranged between the first row and the third row, and the third row includes a pair of light emitting cells that share a cathode terminal with each other. The cathode terminal shared by the pair of light emitting cells in the third row is electrically connected to the anode terminal of a corresponding light emitting cell of the half-wave light emitting cells in the first row through a conductor that is electrically insulated from the full-wave light emitting cells in the second row.

    Abstract translation: 本发明公开了一种具有半波发光单元和全波发光单元的交流（AC）发光二极管（LED）。 AC LED具有电连接在单个基板上的焊盘之间的多个发光单元。 AC LED包括具有阳极端子和阴极端子的第一排半波发光单元，具有阳极端子和阴极端子的第二排全波发光单元，以及第三排半波发光单元 每个具有阳极端子和阴极端子的发光单元。 在AC LED中，第二行布置在第一行和第三行之间，第三行包括彼此共享阴极端子的一对发光单元。 由第三行中的一对发光单元共享的阴极端子通过与整体电绝缘的导体电连接到第一行中的半波发光单元的对应的发光单元的阳极端子 - 第二排发光单元。

Patent Agency Ranking