-
公开(公告)号：US06800187B1
公开(公告)日：2004-10-05
申请号：US09927741
申请日：2001-08-10
IPC分类号： C25D500
CPC分类号： H01L21/2885 , C23C18/1619 , C23C18/1628 , C23C18/163 , C23C18/1669 , C25D5/08 , C25D7/123 , C25D17/001 , C25D17/004 , C25D17/008
摘要： An apparatus for engaging a work piece during plating facilitates electrolyte flow during a plating operation. The apparatus helps to control the plating solution fluid dynamics and electric field shape to keep the wafer's local plating environment uniform and bubble free. The apparatus holding the work piece in a manner that facilitates electrolyte circulation patterns in which the electrolyte flows from the center of the work piece plating surface, outward toward the edge of the edge of the work piece. The apparatus holds the work piece near the work piece edges and provides a flow path for electrolyte to flow outward away from the edges of the work piece plating surface. That flow path has a “snorkel” shape in which the outlet is higher than the inlet. In addition, the flow path may have a slot shape that spans much or all of the circumference of holding apparatus. It may be made from a material that resists deformation and corrosion such as certain ceramics.
摘要翻译： 在电镀期间接合工件的装置有助于在电镀操作期间的电解液流动。 该设备有助于控制电镀溶液流体动力学和电场形状，以保持晶片的局部电镀环境均匀且无气泡。 该装置以便于电解质循环图案的方式保持工件，其中电解质从工件电镀表面的中心向外朝向工件边缘的边缘流动。 该装置将工件保持在工件边缘附近，并且提供了电解液从工件电镀表面的边缘向外流动的流动路径。 该流路具有“浮潜”形状，其中出口高于入口。 此外，流路可以具有跨越保持装置的大部分或全部圆周的槽形状。 它可以由抵抗诸如某些陶瓷的变形和腐蚀的材料制成。
-
2.发明授权公开(公告)号：US06964792B1
公开(公告)日：2005-11-15
申请号：US09927740
申请日：2001-08-10
CPC分类号： C25D5/08 , C25D7/123 , C25D17/001 , C25D17/008
摘要： The present invention provides apparatus and methods for controlling flow dynamics of a plating fluid during a plating process. The invention achieves this fluid control through use of a diffuser membrane. Plating fluid is pumped through the membrane; the design and characteristics of the membrane provide a uniform flow pattern to the plating fluid exiting the membrane. Thus a work piece, upon which a metal or other conductive material is to be deposited, is exposed to a uniform flow of plating fluid.
摘要翻译： 本发明提供了一种用于在电镀过程中控制电镀液的流动动力学的装置和方法。 本发明通过使用扩散膜来实现该流体控制。 电镀液被泵送通过膜; 膜的设计和特性为离开膜的电镀液提供均匀的流动模式。 因此，要沉积金属或其他导电材料的工件暴露于电镀液体的均匀流动。
-
公开(公告)号：US08415261B1
公开(公告)日：2013-04-09
申请号：US13270809
申请日：2011-10-11
申请人： Jonathan D. Reid , Eric G. Webb , Edmund B. Minshall , Avishai Kepten , R. Marshall Stowell , Steven T. Mayer
发明人： Jonathan D. Reid , Eric G. Webb , Edmund B. Minshall , Avishai Kepten , R. Marshall Stowell , Steven T. Mayer
CPC分类号： H01L21/7684 , C23C18/1607 , C23C18/1882 , C25D5/02 , C25D7/123 , H01L21/02074 , H01L21/288 , H01L21/2885 , H01L21/3212 , H01L21/32134 , H01L21/76831 , H01L21/76849 , H01L21/76883 , Y10S414/135
摘要： Methods of forming a capping layer on conductive lines in a semiconductor device may be characterized by the following operations: (a) providing a semiconductor substrate comprising a dielectric layer having (i) exposed conductive lines (e.g., copper lines) disposed therein, and (ii) an exposed barrier layer disposed thereon; and (b) depositing a capping layer material on at least the exposed conductive lines of the semiconductor substrate. In certain embodiments, the method may also involve removing at least a portion of a conductive layer (e.g., overburden) disposed over the barrier layer and conductive lines to expose the barrier layer.
-
公开(公告)号：US08043958B1
公开(公告)日：2011-10-25
申请号：US12875857
申请日：2010-09-03
申请人： Jonathan D. Reid , Eric G. Webb , Edmund B. Minshall , Avishai Kepten , R. Marshall Stowell , Steven T. Mayer
发明人： Jonathan D. Reid , Eric G. Webb , Edmund B. Minshall , Avishai Kepten , R. Marshall Stowell , Steven T. Mayer
IPC分类号： H01L21/302 , H01L21/461 , B24B7/00
CPC分类号： H01L21/7684 , C23C18/1607 , C23C18/1882 , C25D5/02 , C25D7/123 , H01L21/02074 , H01L21/288 , H01L21/2885 , H01L21/3212 , H01L21/32134 , H01L21/76831 , H01L21/76849 , H01L21/76883 , Y10S414/135
摘要： Methods of forming a capping layer on conductive lines in a semiconductor device may be characterized by the following operations: (a) providing a semiconductor substrate comprising a dielectric layer having (i) exposed conductive lines (e.g., copper lines) disposed therein, and (ii) an exposed barrier layer disposed thereon; and (b) depositing a capping layer material on at least the exposed conductive lines of the semiconductor substrate. In certain embodiments, the method may also involve removing at least a portion of a conductive layer (e.g., overburden) disposed over the barrier layer and conductive lines to expose the barrier layer.
摘要翻译： 在半导体器件中的导电线上形成覆盖层的方法的特征在于以下操作：（a）提供包括介电层的半导体衬底，所述电介质层具有（i）设置在其中的暴露的导电线（例如铜线）和（ ii）设置在其上的暴露的阻挡层; 和（b）在所述半导体衬底的至少暴露的导电线上沉积覆盖层材料。 在某些实施例中，该方法还可以包括移除设置在阻挡层和导电线上的导电层（例如，覆盖层）的至少一部分以暴露阻挡层。
-
公开(公告)号：US07811925B1
公开(公告)日：2010-10-12
申请号：US12184145
申请日：2008-07-31
申请人： Jonathan D. Reid , Eric G. Webb , Edmund B. Minshall , Avishai Kepten , R. Marshall Stowell , Steven T. Mayer
发明人： Jonathan D. Reid , Eric G. Webb , Edmund B. Minshall , Avishai Kepten , R. Marshall Stowell , Steven T. Mayer
IPC分类号： H01L21/302 , H01L21/461 , B24B7/00
CPC分类号： H01L21/7684 , C23C18/1607 , C23C18/1882 , C25D5/02 , C25D7/123 , H01L21/02074 , H01L21/288 , H01L21/2885 , H01L21/3212 , H01L21/32134 , H01L21/76831 , H01L21/76849 , H01L21/76883 , Y10S414/135
摘要： Methods of forming a capping layer on conductive lines in a semiconductor device may be characterized by the following operations: (a) providing a semiconductor substrate comprising a dielectric layer having (i) exposed conductive lines (e.g., copper lines) disposed therein, and (ii) an exposed barrier layer disposed thereon; and (b) depositing a capping layer material on at least the exposed conductive lines of the semiconductor substrate. In certain embodiments, the method may also involve removing at least a portion of a conductive layer (e.g., overburden) disposed over the barrier layer and conductive lines to expose the barrier layer.
摘要翻译： 在半导体器件中的导电线上形成覆盖层的方法的特征在于以下操作：（a）提供包括介电层的半导体衬底，所述电介质层具有（i）设置在其中的暴露的导电线（例如铜线）和（ ii）设置在其上的暴露的阻挡层; 和（b）在所述半导体衬底的至少暴露的导电线上沉积覆盖层材料。 在某些实施例中，该方法还可以包括移除设置在阻挡层和导电线上的导电层（例如，覆盖层）的至少一部分以暴露阻挡层。
-
公开(公告)号：US07605082B1
公开(公告)日：2009-10-20
申请号：US11251353
申请日：2005-10-13
申请人： Jonathan D. Reid , Eric G. Webb , Edmund B. Minshall , Avishai Kepten , R. Marshall Stowell , Steven T. Mayer
发明人： Jonathan D. Reid , Eric G. Webb , Edmund B. Minshall , Avishai Kepten , R. Marshall Stowell , Steven T. Mayer
IPC分类号： H01L21/44
CPC分类号： H01L21/7684 , C23C18/1607 , C23C18/1882 , C25D5/02 , C25D7/123 , H01L21/02074 , H01L21/288 , H01L21/2885 , H01L21/3212 , H01L21/32134 , H01L21/76831 , H01L21/76849 , H01L21/76883 , Y10S414/135
摘要： Methods of forming a capping layer on conductive lines in a semiconductor device may be characterized by the following operations: (a) providing a semiconductor substrate comprising a dielectric layer having (i) exposed conductive lines (e.g., copper lines) disposed therein, and (ii) an exposed barrier layer disposed thereon; and (b) depositing a capping layer material on at least the exposed conductive lines of the semiconductor substrate. In certain embodiments, the method may also involve removing at least a portion of a conductive layer (e.g., overburden) disposed over the barrier layer and conductive lines to expose the barrier layer.
摘要翻译： 在半导体器件中的导电线上形成覆盖层的方法的特征在于以下操作：（a）提供包括介电层的半导体衬底，所述电介质层具有（i）设置在其中的暴露的导电线（例如铜线）和（ ii）设置在其上的暴露的阻挡层; 和（b）在所述半导体衬底的至少暴露的导电线上沉积覆盖层材料。 在某些实施例中，该方法还可以包括移除设置在阻挡层和导电线上的导电层（例如，覆盖层）的至少一部分以暴露阻挡层。
-
公开(公告)号：US06890416B1
公开(公告)日：2005-05-10
申请号：US10318497
申请日：2002-12-11
摘要： An electroplating apparatus prevents anode-mediated degradation of electrolyte additives by creating a mechanism for maintaining separate anolyte and catholyte and preventing mixing thereof within a plating chamber. The separation is accomplished by interposing a porous chemical transport barrier between the anode and cathode. The transport barrier limits the chemical transport (via diffusion and/or convection) of all species but allows migration of ionic species (and hence passage of current) during application of sufficiently large electric fields within electrolyte.
摘要翻译： 电镀装置通过产生用于维持单独的阳极电解液和阴极电解液并防止其在电镀室内的混合的机构来防止阳极介导的电解质添加剂的降解。 分离是通过在阳极和阴极之间插入多孔化学传输屏障来实现的。 运输屏障限制了所有物种的化学传输（通过扩散和/或对流），但是在电解质中施加足够大的电场期间允许离子物质的迁移（因此电流的流动）。
-
8.发明授权Method and apparatus for uniform electroplating of thin metal seeded wafers using multiple segmented virtual anode sources 有权使用多分段虚拟阳极源均匀电镀薄金属晶种晶片的方法和装置公开(公告)号：US06773571B1
公开(公告)日：2004-08-10
申请号：US10154082
申请日：2002-05-22
申请人： Steven T. Mayer , Evan E. Patton , Brian Paul Blackman , Jonathan D. Reid , Thomas Anand Ponnuswamy , Harold D. Perry
发明人： Steven T. Mayer , Evan E. Patton , Brian Paul Blackman , Jonathan D. Reid , Thomas Anand Ponnuswamy , Harold D. Perry
IPC分类号： C25D500
CPC分类号： C25D7/123 , C25D17/001 , C25D17/12
摘要： The present invention pertains to methods and apparatus for electroplating a substantially uniform layer of a metal onto a work piece having a seed layer thereon. The total current of a plating cell is distributed among a plurality of anodes in the plating cell in order to tailor the current distribution in the plating electrolyte to compensate for resistance and voltage variation across a work piece due to the seed layer. Focusing elements are used to create “virtual anodes” in proximity to the plating surface of the work piece to further control the current distribution in the electrolyte during plating.
摘要翻译： 本发明涉及用于将基本上均匀的金属层电镀到其上具有种子层的工件上的方法和装置。 电镀单元的总电流分布在电镀单元中的多个阳极之间，以便调整电镀电解质中的电流分布，以补偿因种子层而导致的工件上的电阻和电压变化。 聚焦元件用于在工件的电镀表面附近创建“虚拟阳极”，以进一步控制电镀期间电解液中的电流分布。
-
公开(公告)号：US06551487B1
公开(公告)日：2003-04-22
申请号：US09872341
申请日：2001-05-31
申请人： Jonathan D. Reid , Steven T. Mayer , Seshasayee Varadarajan , David C. Smith , Evan E. Patton , Dinesh S. Kalakkad , Gary Lind
发明人： Jonathan D. Reid , Steven T. Mayer , Seshasayee Varadarajan , David C. Smith , Evan E. Patton , Dinesh S. Kalakkad , Gary Lind
IPC分类号： C25D500
CPC分类号： H01L21/2885 , C25D17/001 , Y10S414/135 , Y10S414/136
摘要： The orientation of a wafer with respect to the surface of an electrolyte is controlled during an electroplating process. The wafer is delivered to an electrolyte bath along a trajectory normal to the surface of the electrolyte. Along this trajectory, the wafer is angled before entry into the electrolyte for angled immersion. A wafer can be plated in an angled orientation or not, depending on what is optimal for a given situation. Also, in some designs, the wafer's orientation can be adjusted actively during immersion or during electroplating, providing flexibility in various electroplating scenarios.
摘要翻译： 在电镀过程中控制晶片相对于电解质表面的取向。 将晶片沿着垂直于电解质表面的轨迹输送到电解质浴中。 沿着该轨迹，晶片在进入电解质之前是成角度的，用于倾斜的浸入。 根据给定情况下的最佳选择，晶圆可以以倾斜的方向进行电镀。 此外，在一些设计中，晶片的取向可以在浸入期间或在电镀期间被主动调节，从而在各种电镀场景中提供灵活性。
-
公开(公告)号：US07097410B1
公开(公告)日：2006-08-29
申请号：US10379858
申请日：2003-03-04
申请人： Jonathan D. Reid , Steven T. Mayer , Seshasayee Varadarajan , David C. Smith , Evan E. Patton , Dinesh S. Kalakkad , Gary Lind , Richard S. Hill
发明人： Jonathan D. Reid , Steven T. Mayer , Seshasayee Varadarajan , David C. Smith , Evan E. Patton , Dinesh S. Kalakkad , Gary Lind , Richard S. Hill
CPC分类号： H01L21/2885 , C25D17/001 , Y10S414/135 , Y10S414/136
摘要： The orientation of a wafer with respect to the surface of an electrolyte is controlled during an electroplating process. The wafer is delivered to an electrolyte bath along a trajectory normal to the surface of the electrolyte. Along this trajectory, the wafer is angled before entry into the electrolyte for angled immersion. A wafer can be plated in an angled orientation or not, depending on what is optimal for a given situation. Also, in some designs, the wafer's orientation can be adjusted actively during immersion or during electroplating, providing flexibility in various electroplating scenarios.
摘要翻译： 在电镀过程中控制晶片相对于电解质表面的取向。 将晶片沿着垂直于电解质表面的轨迹输送到电解质浴中。 沿着该轨迹，晶片在进入电解质之前是成角度的，用于倾斜的浸入。 根据给定情况下的最佳选择，晶圆可以以倾斜的方向进行电镀。 此外，在一些设计中，晶片的取向可以在浸入期间或在电镀期间被主动调节，从而在各种电镀场景中提供灵活性。
-
-
-
-
-
-
-
-
-
搜索结果
153 条记录 (耗时 0.039 秒)
