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    Method of fabricating semiconductor device including forming epitaxial blocking layers by nitridation process
    1.
    发明授权
    Method of fabricating semiconductor device including forming epitaxial blocking layers by nitridation process 有权
    制造半导体器件的方法包括通过氮化处理形成外延阻挡层

    公开(公告)号：US08691642B2

    公开(公告)日：2014-04-08

    申请号：US13238611

    申请日：2011-09-21

    申请人： Jung-Chan Lee ,  Seung-Jae Lee ,  Yu-Gyun Shin ,  Dae-Young Kwak ,  Byung-Suk Jung

    发明人： Jung-Chan Lee ,  Seung-Jae Lee ,  Yu-Gyun Shin ,  Dae-Young Kwak ,  Byung-Suk Jung

    IPC分类号： H01L21/8238

    CPC分类号： H01L21/823814 ,  H01L21/823425

    摘要： A method of fabricating a semiconductor device includes forming gate structures on PMOS and NMOS transistor regions of the semiconductor substrate, forming epitaxial blocking layers on source/drain regions of PMOS and NMOS transistor regions using a nitridation process, then selectively removing one of the epitaxial blocking layers, and using a SEG process to form an epitaxial layer on respective source/drain regions while shielding the other source/drain regions with a remaining epitaxial blocking layer.

    摘要翻译： 制造半导体器件的方法包括在半导体衬底的PMOS和NMOS晶体管区域上形成栅极结构，使用氮化工艺在PMOS和NMOS晶体管区域的源极/漏极区域上形成外延阻挡层，然后选择性地去除外延阻挡层 并且使用SEG工艺在相应的源极/漏极区域上形成外延层，同时用剩余的外延阻挡层屏蔽另一个源极/漏极区域。

    METHOD OF FABRICATING SEMICONDUCTOR DEVICE USING EPITAXIAL BLOCKING LAYERS
    2.
    发明申请
    METHOD OF FABRICATING SEMICONDUCTOR DEVICE USING EPITAXIAL BLOCKING LAYERS 有权
    使用外延阻挡层制造半导体器件的方法

    公开(公告)号：US20120077319A1

    公开(公告)日：2012-03-29

    申请号：US13238611

    申请日：2011-09-21

    申请人： Jung-Chen Lee ,  Seung-Jae Lee ,  Yu-Gyun Shin ,  Dae-Young Kwak ,  Byung-Suk Jung

    发明人： Jung-Chen Lee ,  Seung-Jae Lee ,  Yu-Gyun Shin ,  Dae-Young Kwak ,  Byung-Suk Jung

    IPC分类号： H01L21/8238

    CPC分类号： H01L21/823814 ,  H01L21/823425

    摘要： A method of fabricating a semiconductor device includes forming gate structures on PMOS and NMOS transistor regions of the semiconductor substrate, forming epitaxial blocking layers on source/drain regions of PMOS and NMOS transistor regions using a nitridation process, then selectively removing one of the epitaxial blocking layers, and using a SEG process to form an epitaxial layer on respective source/drain regions while shielding the other source/drain regions with a remaining epitaxial blocking layer.

    摘要翻译： 制造半导体器件的方法包括在半导体衬底的PMOS和NMOS晶体管区域上形成栅极结构，使用氮化工艺在PMOS和NMOS晶体管区域的源极/漏极区域上形成外延阻挡层，然后选择性地去除外延阻挡层 并且使用SEG工艺在相应的源极/漏极区域上形成外延层，同时用剩余的外延阻挡层屏蔽另一个源极/漏极区域。

    Method of fabricating semiconductor device
    3.
    发明授权
    Method of fabricating semiconductor device 有权
    制造半导体器件的方法

    公开(公告)号：US08530303B2

    公开(公告)日：2013-09-10

    申请号：US13243147

    申请日：2011-09-23

    申请人： Jin-Bum Kim ,  Chul-Sung Kim ,  Yu-Gyun Shin ,  Dae-Yong Kim ,  Joon-Gon Lee ,  Kwang-Young Lee

    发明人： Jin-Bum Kim ,  Chul-Sung Kim ,  Yu-Gyun Shin ,  Dae-Yong Kim ,  Joon-Gon Lee ,  Kwang-Young Lee

    IPC分类号： H01L21/8249

    CPC分类号： H01L21/823807 ,  H01L21/823814

    摘要： A method of fabricating a semiconductor includes providing a substrate having a first region and a second region defined therein, forming a first gate and a first source and drain region in the first region and forming a second gate and a second source and drain region in the second region, forming an epitaxial layer in the second source and drain region, forming a first metal silicide layer in the first source and drain region, forming an interlayer dielectric layer on the first region and the second region, forming a plurality of contact holes exposing the first metal silicide layer and the epitaxial layer while penetrating the interlayer dielectric layer, forming a second metal silicide layer in the exposed epitaxial layer, and forming a plurality of contacts contacting the first and second metal silicide layers by filling the plurality of contact holes.

    摘要翻译： 制造半导体的方法包括提供具有限定在其中的第一区域和第二区域的衬底，在第一区域中形成第一栅极和第一源极和漏极区域，并在第一区域中形成第二栅极和第二源极和漏极区域 在所述第二源极和漏极区域中形成外延层，在所述第一源极和漏极区域中形成第一金属硅化物层，在所述第一区域和所述第二区域上形成层间电介质层，形成多个接触孔， 第一金属硅化物层和外延层，同时穿透层间电介质层，在暴露的外延层中形成第二金属硅化物层，并且通过填充多个接触孔形成与第一和第二金属硅化物层接触的多个触点。

    Semiconductor Device and Method of Fabricating the Same
    6.
    发明申请
    Semiconductor Device and Method of Fabricating the Same 有权
    半导体器件及其制造方法

    公开(公告)号：US20110306205A1

    公开(公告)日：2011-12-15

    申请号：US13105195

    申请日：2011-05-11

    申请人： Byung-Hak Lee ,  Yu-Gyun Shin ,  Sang-Woo Lee ,  Sun-Ghil Lee ,  Jin-Bum Kim ,  Joon-Gon Lee

    发明人： Byung-Hak Lee ,  Yu-Gyun Shin ,  Sang-Woo Lee ,  Sun-Ghil Lee ,  Jin-Bum Kim ,  Joon-Gon Lee

    IPC分类号： H01L21/3205

    CPC分类号： H01L21/28518 ,  H01L21/823807 ,  H01L21/823814

    摘要： Methods of forming a semiconductor device include providing a substrate having an area including a source and a drain region of a transistor. A nickel (Ni) metal film is formed on the substrate area including the source and the drain region. A first heat-treatment process is performed including heating the substrate including the metal film from a first temperature to a second temperature at a first ramping rate and holding the substrate including the metal film at the second temperature for a first period of time. A second heat-treatment process is then performed including heating the substrate including the metal film from a third temperature to a fourth temperature at a second ramping rate and holding the substrate at the fourth temperature for a second period of time. The fourth temperature is different from the second temperature and the second period of time is different from the first period of time. The sequentially performed first and second heat-treatment processes convert the Ni metal layer on the source and drain regions into a NiSi layer on the source and drain regions and a NiSi2 layer between the NiSi layer and the source and drain regions.

    摘要翻译： 形成半导体器件的方法包括提供具有包括晶体管的源极和漏极区域的区域的衬底。 在包括源极和漏极区域的衬底区域上形成镍（Ni）金属膜。 执行第一热处理工艺，包括以第一斜率从第一温度至第二温度加热包括金属膜的基板，并将包含金属膜的基板在第二温度下保持第一时间段。 然后执行第二热处理工艺，包括以第二斜率从第三温度至第四温度加热包括金属膜的衬底，并将衬底保持在第四温度第二时间段。 第四温度与第二温度不同，第二时间段与第一时间段不同。 依次执行的第一和第二热处理工艺将源极和漏极区域上的Ni金属层转换成源极和漏极区域上的NiSi层以及NiSi层与源极和漏极区域之间的NiSi 2层。

    MOSFET formed on a strained silicon layer
    9.
    发明授权
    MOSFET formed on a strained silicon layer 有权
    形成在应变硅层上的MOSFET

    公开(公告)号：US07557388B2

    公开(公告)日：2009-07-07

    申请号：US11398118

    申请日：2006-04-05

    申请人： Sun-Ghil Lee ,  Young-Pil Kim ,  Yu-Gyun Shin ,  Jong-Wook Lee ,  Young-Eun Lee

    发明人： Sun-Ghil Lee ,  Young-Pil Kim ,  Yu-Gyun Shin ,  Jong-Wook Lee ,  Young-Eun Lee

    IPC分类号： H01L31/00 ,  H01L35/26 ,  H01L31/117

    CPC分类号： C30B29/06 ,  C30B15/00

    摘要： A semiconductor device formed on a strained silicon layer and a method of manufacturing such a semiconductor device are disclosed. In accordance with this invention, a first silicon germanium layer is formed on a single crystalline silicon substrate; a second silicon germanium layer is formed on the first silicon germanium layer, the second silicon germanium layer having a concentration of germanium in a range of about 1 percent by weight to about 15 percent by weight based on the total weight of the second silicon germanium layer; a strained silicon layer is formed on the second silicon germanium layer; an isolation layer is formed at a first portion of the strained silicon layer; a gate structure is formed on the strained silicon layer; and, source/drain regions are formed at second portions of the strained silicon layer adjacent to the gate structure to form a transistor.

    摘要翻译： 公开了一种形成在应变硅层上的半导体器件及其制造方法。 根据本发明，在单晶硅衬底上形成第一硅锗层; 第二硅锗层形成在第一硅锗层上，第二硅锗层的锗浓度在约1重量％至约15重量％的范围内，基于第二硅锗层的总重量 ; 在第二硅锗层上形成应变硅层; 在应变硅层的第一部分处形成隔离层; 在应变硅层上形成栅极结构; 并且源极/漏极区域形成在与栅极结构相邻的应变硅层的第二部分处以形成晶体管。