公开(公告)号：US20240361922A1

公开(公告)日：2024-10-31

申请号：US18767906

申请日：2024-07-09

Applicant: Kioxia Corporation

Inventor： Daisuke HASHIMOTO

IPC: G06F3/06 ,  G06F1/26 ,  G06F11/10 ,  G06F12/02 ,  G11C5/14 ,  G11C29/52

CPC classification number: G06F3/0619 ,  G06F3/0614 ,  G06F3/0625 ,  G06F12/0246 ,  G06F1/266 ,  G06F3/0604 ,  G06F3/064 ,  G06F3/0659 ,  G06F3/0665 ,  G06F3/067 ,  G06F3/0683 ,  G06F3/0688 ,  G06F11/1068 ,  G06F2212/152 ,  G06F2212/214 ,  G06F2212/261 ,  G06F2212/263 ,  G06F2212/7201 ,  G06F2212/7211 ,  G11C5/144 ,  G11C5/147 ,  G11C5/148 ,  G11C29/52 ,  Y02D10/00

Abstract: A memory system includes an interface circuit configured to connect to a host device, a controller electrically connected to the interface circuit, and a nonvolatile semiconductor memory electrically connected to the controller. The controller is configured to transmit a first response in response to a power supplied from the host device via the interface circuit, upon receipt of a first command from the host device after transmitting the first response, determine a status of data stored in the nonvolatile semiconductor memory, and transmit to the host device a second response including the determined status of the data stored in the nonvolatile semiconductor memory.

公开(公告)号：US20240134552A1

公开(公告)日：2024-04-25

申请号：US18400866

申请日：2023-12-29

Applicant: Kioxia Corporation

Inventor： Daisuke HASHIMOTO ,  Shinichi KANNO

IPC: G06F3/06 ,  G06F12/02 ,  G06F16/00 ,  G06F16/18

CPC classification number: G06F3/064 ,  G06F3/0608 ,  G06F3/061 ,  G06F3/0643 ,  G06F3/0659 ,  G06F3/0688 ,  G06F12/0253 ,  G06F16/00 ,  G06F16/1847

Abstract: A storage device includes a nonvolatile semiconductor memory device including a plurality of physical blocks and a memory controller. The memory controller is configured to associate one or more physical blocks to each of a plurality of stream IDs, execute a first command containing a first stream ID received from a host, by storing write data included in the write IO in the one or more physical blocks associated with the first stream ID, and execute a second command containing a second stream ID received from the host, by selecting a first physical block that includes valid data and invalid data, transfer the valid data stored in the first physical block to a second physical block, and associate the first physical block from which the valid data has been transferred, with the second stream ID.

公开(公告)号：US20230342039A1

公开(公告)日：2023-10-26

申请号：US18336188

申请日：2023-06-16

Applicant: KIOXIA CORPORATION

Inventor： Daisuke HASHIMOTO

IPC: G06F3/06 ,  G06F11/34 ,  G06F11/14 ,  G06F11/07 ,  G06F9/4401 ,  G06F11/00 ,  G06F11/10 ,  G06F12/10 ,  G11C29/52

CPC classification number: G06F3/0616 ,  G06F11/3485 ,  G06F11/1417 ,  G06F11/1456 ,  G06F11/0754 ,  G06F9/4401 ,  G06F11/004 ,  G06F3/0619 ,  G06F3/0647 ,  G06F3/0652 ,  G06F3/0653 ,  G06F3/0659 ,  G06F3/0679 ,  G06F11/1068 ,  G06F12/10 ,  G11C29/52 ,  G06F9/4416 ,  G06F9/4403 ,  G06F9/4406 ,  G06F11/1461 ,  G06F11/3419 ,  G06F2201/81 ,  G06F9/44505

Abstract: According to the embodiments, a nonvolatile memory device is configured to store a normal operating system, and store a bootloader. A host device is capable of initiating the normal operating system by using the bootloader. The host device is configured to determine whether a first condition is established based on information obtained from the nonvolatile memory device; and rewrite, when determined the first condition is established, the bootloader so that an emergency software is initiated when booting the host device. The emergency software is executed on the host device. The host device is capable of issuing only a read command to the nonvolatile memory device under a control of the emergency software.

公开(公告)号：US20230082139A1

公开(公告)日：2023-03-16

申请号：US17987449

申请日：2022-11-15

Applicant: KIOXIA CORPORATION

Inventor： Daisuke HASHIMOTO ,  Shinichi KANNO

IPC: G06F3/06 ,  G06F12/02 ,  G06F16/00 ,  G06F16/18

Abstract: A storage device includes a nonvolatile semiconductor memory device including a plurality of physical blocks and a memory controller. The memory controller is configured to associate one or more physical blocks to each of a plurality of stream IDs, execute a first command containing a first stream ID received from a host, by storing write data included in the write IO in the one or more physical blocks associated with the first stream ID, and execute a second command containing a second stream ID received from the host, by selecting a first physical block that includes valid data and invalid data, transfer the valid data stored in the first physical block to a second physical block, and associate the first physical block from which the valid data has been transferred, with the second stream ID.

公开(公告)号：US20220147471A1

公开(公告)日：2022-05-12

申请号：US17582746

申请日：2022-01-24

Applicant: KIOXIA CORPORATION

Inventor： Daisuke HASHIMOTO

IPC: G06F13/16

Abstract: A memory system includes an interface circuit configured to connect to a host device, a controller electrically connected to the interface circuit, and a nonvolatile semiconductor memory electrically connected to the controller. The controller is configured to transmit a first response in response to a power supplied from the host device via the interface circuit, upon receipt of a first command from the host device after transmitting the first response, determine a status of data stored in the nonvolatile semiconductor memory, and transmit to the host device a second response including the determined status of the data stored in the nonvolatile semiconductor memory.

公开(公告)号：US20240303190A1

公开(公告)日：2024-09-12

申请号：US18665993

申请日：2024-05-16

Applicant: Kioxia Corporation

Inventor： Daisuke HASHIMOTO

IPC: G06F12/02 ,  G06F3/06 ,  G06F11/14

CPC classification number: G06F12/0246 ,  G06F3/0604 ,  G06F3/0608 ,  G06F3/0643 ,  G06F3/0659 ,  G06F3/0683 ,  G06F3/0638 ,  G06F11/1456 ,  G06F2212/1028 ,  G06F2212/1044 ,  G06F2212/7201 ,  G06F2212/7208 ,  Y02D10/00

Abstract: A storage system includes a host including a processor and a memory unit, and a storage device including a controller and a non-volatile memory unit. The processor is configured to output a write command, write data, and size information of the write data, to the storage device, the write command that is output not including a write address. The controller is configured to determine a physical write location of the non-volatile memory unit in which the write data are to be written, based on the write command and the size information, write the write data in the physical write location of the non-volatile memory unit, and output the physical write location to the host. The processor is further configured to generate, in the memory unit, mapping information between an identifier of the write data and the physical write location.

公开(公告)号：US20230384949A1

公开(公告)日：2023-11-30

申请号：US18449647

申请日：2023-08-14

Applicant: KIOXIA CORPORATION

Inventor： Daisuke HASHIMOTO

IPC: G06F3/06 ,  G06F12/02 ,  G06F11/10 ,  G11C29/52 ,  G11C5/14 ,  G06F1/26

CPC classification number: G06F3/0619 ,  G06F2212/263 ,  G06F3/064 ,  G06F3/0659 ,  G06F12/0246 ,  G06F11/1068 ,  G11C29/52 ,  G06F3/0625 ,  G06F3/0683 ,  G11C5/144 ,  G11C5/148 ,  G06F3/0614 ,  G06F3/0665 ,  G06F3/067 ,  G06F3/0688 ,  G11C5/147 ,  G06F1/266 ,  G06F2212/7201 ,  G06F2212/7211 ,  Y02D10/00 ,  G06F2212/152 ,  G06F2212/214 ,  G06F2212/261 ,  G06F3/0604

Abstract: A memory system includes an interface circuit configured to connect to a host device, a controller electrically connected to the interface circuit, and a nonvolatile semiconductor memory electrically connected to the controller. The controller is configured to transmit a first response in response to a power supplied from the host device via the interface circuit, upon receipt of a first command from the host device after transmitting the first response, determine a status of data stored in the nonvolatile semiconductor memory, and transmit to the host device a second response including the determined status of the data stored in the nonvolatile semiconductor memory.

公开(公告)号：US20230281116A1

公开(公告)日：2023-09-07

申请号：US17991133

申请日：2022-11-21

Applicant: KIOXIA CORPORATION

Inventor： Daisuke HASHIMOTO

IPC: G06F12/02 ,  G06F3/06

CPC classification number: G06F12/0246 ,  G06F3/0643 ,  G06F3/0604 ,  G06F3/0659 ,  G06F3/0608 ,  G06F3/0683 ,  G06F2212/1044 ,  G06F2212/7201 ,  G06F2212/1028 ,  G06F2212/7208 ,  G06F3/0638 ,  Y02D10/00 ,  G06F11/1456

Abstract: A storage system includes a host including a processor and a memory unit, and a storage device including a controller and a non-volatile memory unit. The processor is configured to output a write command, write data, and size information of the write data, to the storage device, the write command that is output not including a write address. The controller is configured to determine a physical write location of the non-volatile memory unit in which the write data are to be written, based on the write command and the size information, write the write data in the physical write location of the non-volatile memory unit, and output the physical write location to the host. The processor is further configured to generate, in the memory unit, mapping information between an identifier of the write data and the physical write location.

公开(公告)号：US20200053154A1

公开(公告)日：2020-02-13

申请号：US16656411

申请日：2019-10-17

Applicant: KIOXIA Corporation

Inventor： Daisuke HASHIMOTO

IPC: H04L29/08 ,  G06F3/06 ,  G06F12/02

Abstract: A distributed system includes a plurality of storage systems and a network connecting the storage systems. Each storage system includes a host having a processor and a memory, and a storage device having a controller and a nonvolatile memory. When a first storage system receives, a second storage system, a write command, write data, and size information of the write data, the controller in the first storage system determines an address of the nonvolatile memory of the first storage system in which the write data are to be written, based on the write command and the size information, writes the write data in the nonvolatile memory associated with the address, and transmits the address to the second storage system, and the processor of the second storage system stores management data indicating correspondence between identification information of the write data and the address in the memory of the second storage system.