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公开(公告)号:US11102880B2
公开(公告)日:2021-08-24
申请号:US16088258
申请日:2017-03-27
Applicant: KYOCERA Corporation
Inventor: Yoshiki Kawazu
Abstract: A high-frequency board includes an insulating substrate, a first line conductor, a second line conductor, a capacitor, a first bond, and a second bond. The insulating substrate has a recess on its upper surface. The first line conductor extends from an edge of the recess on the upper surface of the insulating substrate. The second line conductor faces the first line conductor across the recess on the upper surface of the insulating substrate. The capacitor overlaps the recess. The first bond joins the capacitor to the first line conductor. The second bond joins the capacitor to the second line conductor, and is spaced from the first bond.
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公开(公告)号:US11758648B2
公开(公告)日:2023-09-12
申请号:US17394152
申请日:2021-08-04
Applicant: KYOCERA Corporation
Inventor: Yoshiki Kawazu
CPC classification number: H05K1/0251 , H05K1/162
Abstract: A high-frequency board includes an insulating substrate, a first line conductor, a second line conductor, a capacitor, a first bond, and a second bond. The insulating substrate has a recess on its upper surface. The first line conductor extends from an edge of the recess on the upper surface of the insulating substrate. The second line conductor faces the first line conductor across the recess on the upper surface of the insulating substrate. The capacitor overlaps the recess. The first bond joins the capacitor to the first line conductor. The second bond joins the capacitor to the second line conductor, and is spaced from the first bond.
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公开(公告)号:US09805995B2
公开(公告)日:2017-10-31
申请号:US15111238
申请日:2015-01-23
Applicant: KYOCERA Corporation
Inventor: Yoshiki Kawazu
IPC: H05K5/00 , H01L23/04 , H01L23/057 , H01L23/14 , H01L23/552 , H01R24/38 , H01R103/00
CPC classification number: H01L23/041 , H01L23/057 , H01L23/142 , H01L23/552 , H01L2924/0002 , H01R24/38 , H01R2103/00 , H05K5/0069 , H05K5/0091 , H01L2924/00
Abstract: An element-accommodating package which can improve frequency characteristics of an element-accommodating package having a coaxial connector, and a mounting structure are provided. An element-accommodating package includes a metallic substrate, a frame, a first coaxial connector, a second coaxial connector, and a circuit board. A groove is provided between one side of the frame and a side surface of the circuit board and between a first signal line and a second signal line.
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公开(公告)号:US09462709B2
公开(公告)日:2016-10-04
申请号:US14407557
申请日:2013-09-26
Applicant: KYOCERA Corporation
Inventor: Yoshiki Kawazu
CPC classification number: H05K5/0091 , H01L23/055 , H01L2924/0002 , H05K1/0225 , H05K1/115 , H05K1/116 , H05K1/181 , H05K5/0239 , H05K5/0247 , H05K2201/093 , H05K2201/09627 , H05K2201/09718 , H05K2201/2018 , H01L2924/00
Abstract: An element housing package includes a substrate, a frame body, and an input-output terminal. The input-output terminal has a wiring conductor formed in a stacked body consisting of dielectric layers and ground layers which are alternately laminated, to extend through an inside of the stacked body, and a lead terminal connected to the wiring conductor. A non-formation region is provided in the ground layers around the wiring conductor, which passes through the inside of the input-output terminal in a vertical direction of the stacked body. The non-formation region has, in order from an upper side toward a lower side, a first non-formation section, a second non-formation section having an area smaller than that of the first non-formation section, and a third non-formation section having an area larger than that of the second non-formation section.
Abstract translation: 元件外壳包装件包括基板,框体和输入 - 输出端子。 输入输出端子具有形成在层叠体中的布线导体,该堆叠体由交替层叠的电介质层和接地层构成,以延伸穿过层叠体的内部,以及引线端子与布线导体连接。 在布线导体周围的接地层中设置非形成区域,该布线导体在层叠体的垂直方向上穿过输入输出端子的内部。 非形成区域具有从上侧朝向下侧的顺序,具有第一非形成部,具有比第一非成形部的面积小的面积的第二非成形部, 形成部具有比第二非成形部的面积大的面积。
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5.
公开(公告)号:US09386687B2
公开(公告)日:2016-07-05
申请号:US14367566
申请日:2012-12-20
Applicant: KYOCERA Corporation
Inventor: Mahiro Tsujino , Yoshiki Kawazu
IPC: H05K1/16 , H05K1/02 , H01L23/057 , H01L23/498 , H05K1/18
CPC classification number: H05K1/0213 , H01L23/057 , H01L23/49861 , H01L2224/48091 , H01L2924/3011 , H05K1/024 , H05K1/18 , H05K2201/09336 , H01L2924/00014 , H01L2924/00
Abstract: While it is necessary for an electronic component housing package to be provided with numerous wiring conductors, phase differences of signals caused by differences in signal transmission distance among the wiring conductors, is a problem. An electronic component housing package based on one embodiment includes a substrate having a dielectric region and an electronic component placement region, a frame body surrounding the dielectric region and the placement region, and wiring conductors disposed on the dielectric region of the substrate. The wiring conductors have a first wiring conductor and a second wiring conductor which is longer in signal transmission distance than the first wiring conductor, which are disposed so as to extend from a location immediately below the frame body to the dielectric region. The frame body made of a dielectric material has a projection protruding from its inner periphery, which covers at least part of the first wiring conductor.
Abstract translation: 虽然电子部件外壳封装需要多个布线导体,但是由布线导体之间的信号传输距离的差异引起的信号的相位差是一个问题。 基于一个实施例的电子部件壳体封装包括具有电介质区域和电子部件放置区域的基板,围绕介电区域和放置区域的框体,以及布置在基板的电介质区域上的布线导体。 所述布线导体具有第一布线导体和第二布线导体,所述第一布线导体和第二布线导体的信号传输距离比所述第一布线导体长,所述第一布线导体和所述第二布线导体被布置为从所述框体正下方的位置延伸到所述电介质 由介电材料制成的框架体具有从其内周突出的突起,其覆盖第一布线导体的至少一部分。
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公开(公告)号:US20150173214A1
公开(公告)日:2015-06-18
申请号:US14407557
申请日:2013-09-26
Applicant: KYOCERA Corporation
Inventor: Yoshiki Kawazu
IPC: H05K5/00 , H05K1/18 , H05K5/02 , H01L23/055
CPC classification number: H05K5/0091 , H01L23/055 , H01L2924/0002 , H05K1/0225 , H05K1/115 , H05K1/116 , H05K1/181 , H05K5/0239 , H05K5/0247 , H05K2201/093 , H05K2201/09627 , H05K2201/09718 , H05K2201/2018 , H01L2924/00
Abstract: An element housing package includes a substrate, a frame body, and an input-output terminal. The input-output terminal has a wiring conductor formed in a stacked body consisting of dielectric layers and ground layers which are alternately laminated, to extend through an inside of the stacked body, and a lead terminal connected to the wiring conductor. A non-formation region is provided in the ground layers around the wiring conductor, which passes through the inside of the input-output terminal in a vertical direction of the stacked body. The non-formation region has, in order from an upper side toward a lower side, a first non-formation section, a second non-formation section having an area smaller than that of the first non-formation section, and a third non-formation section having an area larger than that of the second non-formation section.
Abstract translation: 元件外壳包装件包括基板,框体和输入 - 输出端子。 输入输出端子具有形成在层叠体中的布线导体,该堆叠体由交替层叠的电介质层和接地层构成,以延伸穿过层叠体的内部,以及引线端子与布线导体连接。 在布线导体周围的接地层中设置非形成区域,该布线导体在层叠体的垂直方向上穿过输入输出端子的内部。 非形成区域具有从上侧朝向下侧的顺序,具有第一非形成部,具有比第一非成形部的面积小的面积的第二非成形部, 形成部具有比第二非成形部的面积大的面积。
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公开(公告)号:US10014233B2
公开(公告)日:2018-07-03
申请号:US15118905
申请日:2015-02-25
Applicant: KYOCERA Corporation
Inventor: Yoshiki Kawazu
IPC: H01L23/057 , H01L23/04 , H05K1/11 , H05K1/02 , H01L23/12
CPC classification number: H01L23/04 , G02B6/4267 , G02B6/4279 , H01L23/057 , H01L23/12 , H01L23/66 , H01L24/48 , H01L2224/48091 , H01L2924/00014 , H01L2924/16195 , H05K1/0219 , H05K1/117 , H05K2201/09481 , H01L2224/45099
Abstract: An electronic component containing package includes a substrate including a placement region for placing an electronic component in an upper face thereof; a frame disposed on the upper face of the substrate surrounding the placement region, and including a penetration part opening; and an input/output member disposed in the frame closing the penetration part, including a plurality of wiring conductors which extend inward and outward of the frame and are electrically connected to the electronic component. The input/output member includes via conductors which are connected to the wiring conductors and embedded at sites overlapping with the wiring conductors within a region surrounded by the frame in the input/output member, and a ground layer disposed in a surrounding of lower ends of the via conductors being spaced from the via conductors. Improved high frequency characteristics can be achieved.
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公开(公告)号:US09922925B2
公开(公告)日:2018-03-20
申请号:US15322202
申请日:2015-07-27
Applicant: KYOCERA Corporation
Inventor: Yoshiki Kawazu
IPC: H01L23/00 , H01L23/498 , H01L23/66 , H01L23/13 , H01L21/48
CPC classification number: H01L23/49861 , H01L21/481 , H01L21/4857 , H01L21/486 , H01L21/4867 , H01L23/04 , H01L23/047 , H01L23/12 , H01L23/13 , H01L23/49838 , H01L23/66 , H01L24/29 , H01L24/32 , H01L24/73 , H01L2223/6611 , H01L2223/6627 , H01L2223/6638 , H01L2224/29139 , H01L2224/29144 , H01L2224/32225 , H01L2224/73265 , H01L2924/15159 , H01L2924/15162 , H01L2924/15787 , H01L2924/15788 , H01L2924/1579 , H01L2924/3511 , H01L2924/0105 , H01L2924/01032
Abstract: An electronic component housing package includes an insulating base including an upper surface, the insulating base including a first cut-out portion and a second cut-out portion which are provided on a lower surface of the insulating base. The first cut-out portion is formed by cutting into a lower part of a side surface of the insulating base and cutting out from the lower part to a lower surface of the insulating base. On the first cut-out portion are formed wiring conductors which are led from the lower surface of the insulating base and come to the upper surface of the insulating base through the insulating base via an inside wall surface of the first cut-out portion. The second cut-out portion is provided between the wiring conductors and extends from the inside wall surface of the first cut-out portion to the lower surface of the insulating base.
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9.
公开(公告)号:US20140345929A1
公开(公告)日:2014-11-27
申请号:US14367566
申请日:2012-12-20
Applicant: KYOCERA Corporation
Inventor: Mahiro Tsujino , Yoshiki Kawazu
CPC classification number: H05K1/0213 , H01L23/057 , H01L23/49861 , H01L2224/48091 , H01L2924/3011 , H05K1/024 , H05K1/18 , H05K2201/09336 , H01L2924/00014 , H01L2924/00
Abstract: While it is necessary for an electronic component housing package to be provided with numerous wiring conductors, phase differences of signals caused by differences in signal transmission distance among the wiring conductors, is a problem. An electronic component housing package based on one embodiment includes a substrate having a dielectric region and an electronic component placement region, a frame body surrounding the dielectric region and the placement region, and wiring conductors disposed on the dielectric region of the substrate. The wiring conductors have a first wiring conductor and a second wiring conductor which is longer in signal transmission distance than the first wiring conductor, which are disposed so as to extend from a location immediately below the frame body to the dielectric region. The frame body made of a dielectric material has a projection protruding from its inner periphery, which covers at least part of the first wiring conductor.
Abstract translation: 虽然电子部件外壳封装需要多个布线导体,但是由布线导体之间的信号传输距离的差异引起的信号的相位差是一个问题。 基于一个实施例的电子部件壳体封装包括具有电介质区域和电子部件放置区域的基板,围绕介电区域和放置区域的框体,以及布置在基板的电介质区域上的布线导体。 所述布线导体具有第一布线导体和第二布线导体,所述第一布线导体和第二布线导体的信号传输距离比所述第一布线导体长,所述第一布线导体和所述第二布线导体被布置为从所述框体正下方的位置延伸到所述电介质 由介电材料制成的框架体具有从其内周突出的突起,其覆盖第一布线导体的至少一部分。
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公开(公告)号:US10068818B2
公开(公告)日:2018-09-04
申请号:US15573762
申请日:2016-05-18
Applicant: KYOCERA Corporation
Inventor: Yoshiki Kawazu
IPC: H01L23/00 , H01L23/047 , H01S5/022 , H05K7/02 , H01L23/057 , H01L23/12 , H01L31/0203 , H01L23/373 , H05K7/00 , H01L23/498 , H01L23/043 , H05K7/18 , H01L23/48 , H05K5/02 , H05K5/00
Abstract: A semiconductor element package includes a base body, a frame member, and a terminal member. The frame member is provided on a main surface of the base body. A notch is formed on the base body side of this frame member. The notch is a gap between the one main surface of the base body and the frame member. The terminal member is provided so as to cover the notch as the gap. The terminal member includes a first dielectric layer, a plurality of signal wiring conductors and a plurality of coplanar ground conductor layers that are provided on one surface of the first dielectric layer, and a second dielectric layer. The first dielectric layer has a hole provided open in a region of the one surface between a first wiring conductor and a second wiring conductor.
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