公开(公告)号：US07071100B2

公开(公告)日：2006-07-04

申请号：US10788912

申请日：2004-02-27

申请人： Kei-Wei Chen ,  Jung-Chih Tsao ,  Chi-Wen Liu ,  Jchung-Chang Chen ,  Shih-Tzung Chang ,  Shih-Ho Lin ,  Yu-Ku Lin ,  Ying-Lang Wang

发明人： Kei-Wei Chen ,  Jung-Chih Tsao ,  Chi-Wen Liu ,  Jchung-Chang Chen ,  Shih-Tzung Chang ,  Shih-Ho Lin ,  Yu-Ku Lin ,  Ying-Lang Wang

IPC分类号： H01L21/4763

CPC分类号： H01L21/76844 ,  H01L21/76807 ,  H01L21/76862 ,  H01L21/76865

摘要： A method for forming a copper dual damascene with improved copper migration resistance and improved electrical resistivity including providing a semiconductor wafer including upper and lower dielectric insulating layers separated by a middle etch stop layer; forming a dual damascene opening extending through a thickness of the upper and lower dielectric insulating layers wherein an upper trench line portion extends through the upper dielectric insulating layer thickness and partially through the middle etch stop layer; blanket depositing a barrier layer including at least one of a refractory metal and refractory metal nitride to line the dual damascene opening; carrying out a remote plasma etch treatment of the dual damascene opening to remove a bottom portion of the barrier layer to reveal an underlying conductive area; and, filling the dual damascene opening with copper to provide a substantially planar surface.

摘要翻译： 一种用于形成具有改善的铜迁移阻力和改善的电阻率的铜双镶嵌的方法，包括提供包括由中间蚀刻停止层分隔的上和下介电绝缘层的半导体晶片; 形成延伸通过上下介电绝缘层的厚度的双镶嵌开口，其中上沟槽线部分延伸穿过上介电绝缘层的厚度并部分地穿过中蚀刻停止层; 毯子沉积包括难熔金属和难熔金属氮化物中的至少一种的阻挡层，以便排列双镶嵌开口; 对双镶嵌开口执行远程等离子体蚀刻处理以去除阻挡层的底部以露出下面的导电区域; 并且用铜填充双镶嵌开口以提供基本平坦的表面。

公开(公告)号：US20050191855A1

公开(公告)日：2005-09-01

申请号：US10788912

申请日：2004-02-27

申请人： Kei-Wei Chen ,  Jung-Chih Tsao ,  Chi-Wen Liu ,  Jchung-Chang Chen ,  Shih-Tzung Chang ,  Shih-Ho Lin ,  Yu-Ku Lin ,  Ying-Lang Wang

发明人： Kei-Wei Chen ,  Jung-Chih Tsao ,  Chi-Wen Liu ,  Jchung-Chang Chen ,  Shih-Tzung Chang ,  Shih-Ho Lin ,  Yu-Ku Lin ,  Ying-Lang Wang

IPC分类号： H01L21/44 ,  H01L21/768

CPC分类号： H01L21/76844 ,  H01L21/76807 ,  H01L21/76862 ,  H01L21/76865

摘要： A method for forming a copper dual damascene with improved copper migration resistance and improved electrical resistivity including providing a semiconductor wafer including upper and lower dielectric insulating layers separated by a middle etch stop layer; forming a dual damascene opening extending through a thickness of the upper and lower dielectric insulating layers wherein an upper trench line portion extends through the upper dielectric insulating layer thickness and partially through the middle etch stop layer; blanket depositing a barrier layer including at least one of a refractory metal and refractory metal nitride to line the dual damascene opening; carrying out a remote plasma etch treatment of the dual damascene opening to remove a bottom portion of the barrier layer to reveal an underlying conductive area; and, filling the dual damascene opening with copper to provide a substantially planar surface.

摘要翻译： 一种用于形成具有改善的铜迁移阻力和改善的电阻率的铜双镶嵌的方法，包括提供包括由中间蚀刻停止层分隔的上和下介电绝缘层的半导体晶片; 形成延伸通过上下介电绝缘层的厚度的双镶嵌开口，其中上沟槽线部分延伸穿过上介电绝缘层的厚度并部分地穿过中蚀刻停止层; 毯子沉积包括难熔金属和难熔金属氮化物中的至少一种的阻挡层，以便排列双镶嵌开口; 对双镶嵌开口执行远程等离子体蚀刻处理以去除阻挡层的底部以露出下面的导电区域; 并且用铜填充双镶嵌开口以提供基本平坦的表面。

公开(公告)号：US20050275941A1

公开(公告)日：2005-12-15

申请号：US10854061

申请日：2004-05-26

申请人： Chi-Wen Liu ,  Jung-Chih Tsao ,  Shih-Tzung Chang ,  Ying-Lang Wang ,  Kei-Wei Chen

发明人： Chi-Wen Liu ,  Jung-Chih Tsao ,  Shih-Tzung Chang ,  Ying-Lang Wang ,  Kei-Wei Chen

IPC分类号： G02B23/00 ,  H01L21/768 ,  H01L21/82

CPC分类号： H01L21/7684 ,  H01L21/76877

摘要： A method of forming a metal-filled opening in a semiconductor or other submicron device substrate includes forming a conductive bulk layer over the substrate surface and in the opening, wherein the conductive bulk layer has a first grain size. A conductive cap layer is formed over the conductive bulk layer, the conductive cap layer having a second grain size that is substantially smaller than the first grain size. At least one of the conductive bulk and cap layers are then planarized to form a planar surface that is substantially coincident with the substrate surface.

摘要翻译： 在半导体或其他亚微米器件衬底中形成填充金属的开口的方法包括在衬底表面和开口中形成导电体层，其中导电体层具有第一晶粒尺寸。 导电盖层形成在导电体层之上，导电盖层具有基本上小于第一晶粒尺寸的第二晶粒尺寸。 导电体和盖层中的至少一个然后被平坦化以形成基本上与衬底表面重合的平坦表面。

公开(公告)号：US07128821B2

公开(公告)日：2006-10-31

申请号：US10761477

申请日：2004-01-20

申请人： Shih-Ho Lin ,  Chung-Chang Chen ,  Kei-Wei Chen ,  Shih-Tzung Chang ,  Chao-Lung Chen ,  Po-Jen Shih ,  Yu-Ku Lin ,  Ying-Lang Wang

发明人： Shih-Ho Lin ,  Chung-Chang Chen ,  Kei-Wei Chen ,  Shih-Tzung Chang ,  Chao-Lung Chen ,  Po-Jen Shih ,  Yu-Ku Lin ,  Ying-Lang Wang

IPC分类号： C25D5/34 ,  C25F1/00

CPC分类号： H01L21/76843 ,  B24B37/042 ,  B24B37/046 ,  C25D3/38 ,  C25D5/18 ,  C25D7/123 ,  C25F3/02 ,  H01L21/02068 ,  H01L21/32115 ,  H01L21/76865 ,  H01L21/76873

摘要： An electropolishing method for removing potential device-contaminating particles from a wafer, is disclosed. The method includes immersing the wafer in an electropolishing electrolyte solution and removing defects and particles from the wafer by rotational friction between the wafer and the electrolyte solution in combination with electrolysis. The method is effective in removing particles from via openings of all sizes, including via openings having a width smaller than about 0.2 μm.

摘要翻译： 公开了一种用于从晶片去除潜在的器件污染颗粒的电抛光方法。 该方法包括将晶片浸入电解抛光电解质溶液中，并通过晶片和电解质溶液之间的旋转摩擦与电解结合从晶片去除缺陷和颗粒。 该方法有效地从各种尺寸的通孔开口去除颗粒，包括宽度小于约0.2μm的通孔。

公开(公告)号：US20060055928A1

公开(公告)日：2006-03-16

申请号：US10942554

申请日：2004-09-15

申请人： Shih-Tzung Chang ,  Yu-Ku Lin ,  Shih-Ho Lin ,  Kei-Wei Chen ,  Ting-Chun Wang ,  Ching-Hwan Su ,  Ying-Lang Wang

发明人： Shih-Tzung Chang ,  Yu-Ku Lin ,  Shih-Ho Lin ,  Kei-Wei Chen ,  Ting-Chun Wang ,  Ching-Hwan Su ,  Ying-Lang Wang

IPC分类号： G01B11/00

CPC分类号： H01L22/34 ,  G01B21/042

摘要： A novel test device and method for calibrating the alignment of a laser beam emitted from a laser metrology tool with respect to a target area on a substrate. The test device includes a laser-sensitive material having a calibration pattern that includes a target point. When the tool is properly adjusted, the laser beam strikes the target point and is released to production. If the laser beam misses the target point, the tool is re-adjusted and re-tested until the laser beam strikes the target point.

摘要翻译： 一种用于校准从激光计量工具发射的激光束相对于衬底上的目标区域的对准的新型测试装置和方法。 测试装置包括具有包括目标点的校准图案的激光敏感材料。 当工具被正确调整时，激光束撞击目标点并释放到生产中。 如果激光束错过目标点，则重新调整工具并重新测试直到激光束撞击目标点。

公开(公告)号：US07304728B2

公开(公告)日：2007-12-04

申请号：US10942554

申请日：2004-09-15

申请人： Shih-Tzung Chang ,  Yu-Ku Lin ,  Shih-Ho Lin ,  Kei-Wei Chen ,  Ting-Chun Wang ,  Ching-Hwan Su ,  Ying-Lang Wang

发明人： Shih-Tzung Chang ,  Yu-Ku Lin ,  Shih-Ho Lin ,  Kei-Wei Chen ,  Ting-Chun Wang ,  Ching-Hwan Su ,  Ying-Lang Wang

IPC分类号： G01C1/00

CPC分类号： H01L22/34 ,  G01B21/042

摘要： A novel test device and method for calibrating the alignment of a laser beam emitted from a laser metrology tool with respect to a target area on a substrate. The test device includes a laser-sensitive material having a calibration pattern that includes a target point. When the tool is properly adjusted, the laser beam strikes the target point and is released to production. If the laser beam misses the target point, the tool is re-adjusted and re-tested until the laser beam strikes the target point.

摘要翻译： 一种用于校准从激光计量工具发射的激光束相对于衬底上的目标区域的对准的新型测试装置和方法。 测试装置包括具有包括目标点的校准图案的激光敏感材料。 当工具被正确调整时，激光束撞击目标点并释放到生产中。 如果激光束错过目标点，则重新调整工具并重新测试直到激光束撞击目标点。

公开(公告)号：US20050155869A1

公开(公告)日：2005-07-21

申请号：US10761477

申请日：2004-01-20

申请人： Shih-Ho Lin ,  Chung-Chang Chen ,  Kei-Wei Chen ,  Shih-Tzung Chang ,  Chao-Lung Chen ,  Po-Jen Shih ,  Yu-Ku Lin ,  Ying-Lang Wang

发明人： Shih-Ho Lin ,  Chung-Chang Chen ,  Kei-Wei Chen ,  Shih-Tzung Chang ,  Chao-Lung Chen ,  Po-Jen Shih ,  Yu-Ku Lin ,  Ying-Lang Wang

IPC分类号： B24B37/04 ,  C25D3/38 ,  C25D5/18 ,  C25D7/12 ,  C25F3/02 ,  H01L21/02 ,  H01L21/321 ,  H01L21/768 ,  B23H3/00

CPC分类号： H01L21/76843 ,  B24B37/042 ,  B24B37/046 ,  C25D3/38 ,  C25D5/18 ,  C25D7/123 ,  C25F3/02 ,  H01L21/02068 ,  H01L21/32115 ,  H01L21/76865 ,  H01L21/76873

摘要： An electropolishing method for removing potential device-contaminating particles from a wafer, is disclosed. The method includes immersing the wafer in an electropolishing electrolyte solution and removing defects and particles from the wafer by rotational friction between the wafer and the electrolyte solution in combination with electrolysis. The method is effective in removing particles from via openings of all sizes, including via openings having a width smaller than about 0.2 μm.

摘要翻译： 公开了一种用于从晶片去除潜在的器件污染颗粒的电抛光方法。 该方法包括将晶片浸入电解抛光电解质溶液中，并通过晶片和电解质溶液之间的旋转摩擦与电解结合从晶片去除缺陷和颗粒。 该方法有效地从各种尺寸的通孔开口去除颗粒，包括宽度小于约0.2μm的通孔。

公开(公告)号：US06769959B2

公开(公告)日：2004-08-03

申请号：US10050314

申请日：2002-01-15

申请人： Kei-Wei Chen ,  Ting-Chun Wang ,  Shih-Tzung Chang ,  Yu-Ku Lin ,  Ying-Lang Wang ,  Ming-Wen Chen ,  Kuo-Hsiu Wei

发明人： Kei-Wei Chen ,  Ting-Chun Wang ,  Shih-Tzung Chang ,  Yu-Ku Lin ,  Ying-Lang Wang ,  Ming-Wen Chen ,  Kuo-Hsiu Wei

IPC分类号： B24B100

CPC分类号： B24B37/04 ,  B24B57/02

摘要： A method and system is disclosed for reducing slurry usage in a chemical mechanical polishing operation utilizing at least one polishing pad thereof. Slurry can be intermittently supplied to a chemical mechanical polishing device. The slurry is generally flushed so that a portion of said slurry is trapped in a plurality of pores of at least one polishing pad associated with said chemical mechanical polishing device, wherein only a minimum amount of said slurry necessary is utilized to perform said chemical mechanical polishing operation, thereby reducing slurry usage and maintaining a consistent level of slurry removal rate performance and a decrease in particle defects thereof. The present invention thus discloses a method and system for intermittently delivering slurry to a chemical mechanical polishing device in a manner that significantly conserves slurry usage.

摘要翻译： 公开了一种利用其至少一个抛光垫在化学机械抛光操作中减少浆料使用的方法和系统。 浆料可以间歇地供应到化学机械抛光装置。 通常将浆料冲洗，使得所述浆料的一部分被捕获在与所述化学机械抛光装置相关联的至少一个抛光垫的多个孔中，其中仅使用最少量的所需浆料来进行所述化学机械抛光 操作，从而减少浆料的使用并保持一致的浆料去除速率性能水平和其颗粒缺陷的减少。 因此，本发明公开了一种用于以显着节省浆料使用的方式间歇地将浆料输送到化学机械抛光装置的方法和系统。

公开(公告)号：US06626741B2

公开(公告)日：2003-09-30

申请号：US09910633

申请日：2001-07-20

申请人： Ting-Chun Wang ,  Kei-Wei Chen ,  Shih-Tzung Chang ,  Yu-Ku Lin ,  Ying-Lang Wang

发明人： Ting-Chun Wang ,  Kei-Wei Chen ,  Shih-Tzung Chang ,  Yu-Ku Lin ,  Ying-Lang Wang

IPC分类号： B24B100

CPC分类号： B24B57/02 ,  B24B37/042

摘要： A method for improving thickness uniformity on a semiconductor wafer during a chemical mechanical polishing process capable of eliminating a wafer edge collapsing defect is described. In the method, slurry solution is removed from a peripheral edge portion of less than 10 mm wide on the surface of the polishing pad such that a concentration of the slurry can be effectively reduced in the peripheral region. The reduced slurry solution leads to a reduction in the removal rate on the wafer surface. The removal of slurry from the peripheral region can further be achieved by a mechanical means. A suitable width of the peripheral region of the polishing pad to be sprayed by an edge sprayer is less than 10 mm, and preferably between about 3 mm and about 5 mm. A suitable solvent to be sprayed is deionized water.

公开(公告)号：US06531382B1

公开(公告)日：2003-03-11

申请号：US10140662

申请日：2002-05-08

申请人： Tao Cheng ,  Wen-Hsin Huang ,  Jiun-Pyng You ,  Lin-June Wu ,  Shih-Tzung Chang ,  Ming-Jei Lee ,  Chun-Chang Chen ,  Yu-Ku Lin ,  Tong-Hua Kuan ,  Ying-Lang Wang

发明人： Tao Cheng ,  Wen-Hsin Huang ,  Jiun-Pyng You ,  Lin-June Wu ,  Shih-Tzung Chang ,  Ming-Jei Lee ,  Chun-Chang Chen ,  Yu-Ku Lin ,  Tong-Hua Kuan ,  Ying-Lang Wang

IPC分类号： H01L213205

CPC分类号： H01L21/76802 ,  H01L21/76838

摘要： A process for preparing a surface of a lower level metal structure, exposed at the bottom of a sub-micron diameter opening, to allow a low resistance interface to be obtained when overlaid with an upper level metal structure, has been developed. A disposable, capping insulator layer is first deposited on the composite insulator layer in which the sub-micron diameter opening will be defined in, to protect underlying components of the composite insulator from a subsequent metal pre-metal procedure. After anisotropically defining the sub-micron diameter opening in the capping insulator, and composite insulator layers, and after removal of the defining photoresist shape, an argon sputtering procedure is used to remove native oxide from the surface of the lower level metal structure. In addition to native oxide removal the argon sputtering procedure, featuring a negative DC bias applied to the substrate, also removes the capping insulator layer from the top surface of the composite insulator layer. An in situ metal deposition then allows a clean interface to result between the overlying metal layer, and the underlying plasma treated, metal surface.

摘要翻译： 已经开发了制备在亚微米直径开口的底部露出的下层金属结构的表面以允许在与上层金属结构重叠时获得低电阻界面的方法。 首先将一次性封盖绝缘体层沉积在复合绝缘体层上，在该复合绝缘层上将限定亚微米直径的开口，以保护复合绝缘子的下面的部件免于后续的金属预金属工艺。 在各向异性地限定封盖绝缘体中的亚微米直径开口和复合绝缘体层之后，并且在去除限定的光致抗蚀剂形状之后，使用氩溅射方法从下层金属结构的表面去除自然氧化物。 除了自然氧化物除去之外，具有施加到衬底的负DC偏压的氩溅射工艺也从复合绝缘体层的顶表面去除封盖绝缘体层。 原位金属沉积然后允许在上覆的金属层和下面的等离子体处理的金属表面之间产生干净的界面。