MOSFET and method for manufacturing MOSFET
    1.
    发明授权
    MOSFET and method for manufacturing MOSFET 有权
    MOSFET和MOSFET制造方法

    公开(公告)号:US07928469B2

    公开(公告)日:2011-04-19

    申请号:US12090451

    申请日:2006-10-06

    IPC分类号: H01L29/74 H01L31/111

    摘要: The present invention provides a MOSFET and so forth that offer high breakdown voltage and low on-state loss (high channel mobility and low gate threshold voltage) and that can easily achieve normally OFF. A drift layer 2 of a MOSFET made of silicon carbide according to the present invention has a first region 2a and a second region 2b. The first region 2a is a region from the surface to a first given depth. The second region 2b is formed in a region deeper than the first given depth. The impurity concentration of the first region 2a is lower than the impurity concentration of the second region 2b.

    摘要翻译: 本发明提供了提供高击穿电压和低导通状态损耗(高沟道迁移率和低栅极阈值电压)并且可以容易地实现正常关断的MOSFET等。 根据本发明的由碳化硅制成的MOSFET的漂移层2具有第一区域2a和第二区域2b。 第一区域2a是从表面到第一给定深度的区域。 第二区域2b形成在比第一给定深度更深的区域中。 第一区域2a的杂质浓度低于第二区域2b的杂质浓度。

    MOSFET AND METHOD FOR MANUFACTURING MOSFET
    2.
    发明申请
    MOSFET AND METHOD FOR MANUFACTURING MOSFET 有权
    MOSFET及其制造方法

    公开(公告)号:US20090173997A1

    公开(公告)日:2009-07-09

    申请号:US12090451

    申请日:2006-10-06

    IPC分类号: H01L29/78 H01L21/336

    摘要: The present invention provides a MOSFET and so forth that offer high breakdown voltage and low on-state loss (high channel mobility and low gate threshold voltage) and that can easily achieve normally OFF. A drift layer 2 of a MOSFET made of silicon carbide according to the present invention has a first region 2a and a second region 2b. The first region 2a is a region from the surface to a first given depth. The second region 2b is formed in a region deeper than the first given depth. The impurity concentration of the first region 2a is lower than the impurity concentration of the second region 2b.

    摘要翻译: 本发明提供了提供高击穿电压和低导通状态损耗(高沟道迁移率和低栅极阈值电压)并且可以容易地实现正常关断的MOSFET等。 根据本发明的由碳化硅制成的MOSFET的漂移层2具有第一区域2a和第二区域2b。 第一区域2a是从表面到第一给定深度的区域。 第二区域2b形成在比第一给定深度更深的区域中。 第一区域2a的杂质浓度低于第二区域2b的杂质浓度。

    Power semiconductor device
    5.
    发明授权
    Power semiconductor device 有权
    功率半导体器件

    公开(公告)号:US08093598B2

    公开(公告)日:2012-01-10

    申请号:US12162998

    申请日:2007-03-19

    IPC分类号: H01L31/0312

    摘要: A power semiconductor device less prone to cause a reaction between a metal material for interconnection and an electrode or the like connected to a semiconductor region during the high-temperature operation thereof and less prone to be strained during the high-temperature operation thereof. The power semiconductor device can be an SiC power device or the like in which a first metal layer containing at least one selected from the group consisting of Pt, Ti, Mo, W and Ta is formed on a source electrode formed on the semiconductor region, such as a source region or the like. A second metal layer containing at least one selected from the group consisting of Mo, W and Cu is formed on the first metal layer. A third metal layer containing at least one selected from the group consisting of Pt, Mo and W is formed on the second metal layer.

    摘要翻译: 功率半导体器件在其高温操作期间不容易引起用于互连的金属材料与连接到半导体区域的电极等之间的反应,并且在其高温操作期间不易于变形。 功率半导体器件可以是在形成在半导体区域上的源电极上形成含有选自Pt,Ti,Mo,W和Ta中的至少一种的第一金属层的SiC功率器件等, 例如源区域等。 在第一金属层上形成含有选自Mo,W和Cu中的至少一种的第二金属层。 在第二金属层上形成含有选自Pt,Mo和W中的至少一种的第三金属层。

    POWER SEMICONDUCTOR DEVICE
    6.
    发明申请
    POWER SEMICONDUCTOR DEVICE 有权
    功率半导体器件

    公开(公告)号:US20090020766A1

    公开(公告)日:2009-01-22

    申请号:US12162998

    申请日:2007-03-19

    IPC分类号: H01L29/24

    摘要: A power semiconductor device less prone to cause a reaction between a metal material for interconnection and an electrode or the like connected to a semiconductor region during the high-temperature operation thereof and less prone to be strained during the high-temperature operation thereof. The power semiconductor device can be an SiC power device or the like in which a first metal layer containing at least one selected from the group consisting of Pt, Ti, Mo, W and Ta is formed on a source electrode formed on the semiconductor region, such as a source region or the like. A second metal layer containing at least one selected from the group consisting of Mo, W and Cu is formed on the first metal layer. A third metal layer containing at least one selected from the group consisting of Pt, Mo and W is formed on the second metal layer.

    摘要翻译: 功率半导体器件在其高温操作期间不容易引起用于互连的金属材料与连接到半导体区域的电极等之间的反应,并且在其高温操作期间不易于变形。 功率半导体器件可以是在形成在半导体区域上的源电极上形成含有选自Pt,Ti,Mo,W和Ta中的至少一种的第一金属层的SiC功率器件等, 例如源区域等。 在第一金属层上形成含有选自Mo,W和Cu中的至少一种的第二金属层。 在第二金属层上形成含有选自Pt,Mo和W中的至少一种的第三金属层。