公开(公告)号：US5872579A

公开(公告)日：1999-02-16

申请号：US594523

申请日：1996-01-31

申请人： Kimio Handa ,  Toshio Hagiwara ,  Tadashi Arai

发明人： Kimio Handa ,  Toshio Hagiwara ,  Tadashi Arai

IPC分类号： B41J13/12

CPC分类号： B41J25/308 ,  B41J11/20

摘要： An ink-jet printing apparatus which is capable of maintaining a predetermined clearance between a printing surface of a printing object and an ink-jet head, includes a printing object mounting portion, on which the printing object is mounted, an ink-jet unit provided so as to be capable of relative movement in an opposing direction with respect to the printing object mounting portion, and mounting an ink-jet head which can oppose the printing surface of the printing object, shifting means for shifting the ink-jet unit mounting portion relative to the printing object mounting portion in the opposing direction, and a clearance adjusting sensor provided at the side of the ink-jet unit mounting portion so as to be capable of contacting the printing surface of the printing object. The shifting means is driven in a direction where the clearance adjusting sensor is caused to to contact the printing surface of the printing object, the shifting means then is driven in the opposite direction when the clearance adjusting sensor comes into contact with the printing surface of the printing object, and relatively shifting the ink-jet unit mounting portion is shifted relative to the printing object mounting portion in a direction where the clearance adjusting sensor moves away from the printing surface of the printing object by a predetermined magnitude.

摘要翻译： 能够在打印对象的打印表面和喷墨头之间保持预定间隙的喷墨打印设备包括其上安装有打印对象的打印对象安装部，设置有喷墨单元 能够相对于印刷对象安装部在相反的方向上相对移动，并且安装可与打印对象的打印表面相对的喷墨头，用于移动喷墨单元安装部分的移动装置 相对于相对方向上的打印对象安装部分，以及设置在喷墨单元安装部分侧以便能够接触打印对象的打印表面的间隙调节传感器。 移动装置沿间隙调节传感器与打印对象的打印面接触的方向驱动，当间隙调节传感器与打印面的打印面接触时，移动装置沿相反方向被驱动 打印对象和相对移动喷墨单元安装部分相对于打印对象安装部分在间隙调节传感器远离打印对象的打印表面移动预定大小的方向上移动。

公开(公告)号：US08686548B2

公开(公告)日：2014-04-01

申请号：US12987398

申请日：2011-01-10

申请人： Tadashi Arai

发明人： Tadashi Arai

IPC分类号： H01L23/02

CPC分类号： H01L28/40 ,  H01L21/4857 ,  H01L23/147 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49894 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/1461 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/00

摘要： A wiring substrate includes a ceramic substrate including plural ceramic layers, an inner wiring, and an electrode electrically connected to the inner wiring, the electrode exposed on a first surface of the ceramic substrate, and a silicon substrate body having a front surface and a back surface situated on an opposite side of the front surface and including a wiring pattern formed on the front surface and a via filling material having one end electrically connected to the wiring pattern and another end exposed at the back surface. The back surface is bonded to the first surface of the ceramic substrate via a polymer layer. The via filling material penetrates through the polymer layer and is directly bonded to the electrode.

摘要翻译： 布线基板包括陶瓷基板，该陶瓷基板包括多个陶瓷层，内部布线和电连接到内部布线的电极，暴露在陶瓷基板的第一表面上的电极以及具有正面和背面的硅基板本体 表面位于前表面的相对侧，并且包括形成在前表面上的布线图案和通孔填充材料，其一端电连接到布线图案，另一端暴露在背面。 后表面通过聚合物层结合到陶瓷基板的第一表面。 通孔填充材料穿透聚合物层并直接结合到电极上。

公开(公告)号：US08120070B2

公开(公告)日：2012-02-21

申请号：US12264936

申请日：2008-11-05

申请人： Norio Nakazato ,  Nobuo Fujieda ,  Masayoshi Ishibashi ,  Midori Kato ,  Tadashi Arai ,  Takeo Shiba

发明人： Norio Nakazato ,  Nobuo Fujieda ,  Masayoshi Ishibashi ,  Midori Kato ,  Tadashi Arai ,  Takeo Shiba

IPC分类号： H01L21/311

CPC分类号： H01L21/4867 ,  H01L23/49838 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/12044 ,  H05K3/107 ,  H05K3/1258 ,  H05K2201/09036 ,  H05K2201/09254 ,  H01L2924/00

摘要： A wiring board with an electronic device comprising a plurality of trenches arranged in parallel on a substrate, a common trench communicating the plurality of trenches with each other at one of their ends on the substrate, a metal layer formed at the bottom of the plurality of trenches, and an electrode layer connected with the metal layer and formed on a bottom of the common trench, wherein the electrode layer on the bottom of the common trench constitutes a source electrode or a drain electrode of a field effect transistor, whereby the wiring board and an electronic circuit having a good fine wire pattern and a good narrow gap between the patterns using a coating material can be formed, and a reduction for a cost of an organic thin film electronic device and the electronic circuit can be attained since they can be realized through a development of a printing technique.

摘要翻译： 一种具有电子装置的布线板，包括平行布置在基板上的多个沟槽，在所述基板的一端的一端将所述多个沟槽彼此连通的公共沟槽，形成在所述多个栅极的底部的金属层 沟槽，和与金属层连接并形成在公共沟槽的底部上的电极层，其中公共沟槽的底部上的电极层构成场效应晶体管的源电极或漏电极，由此布线板 并且可以形成具有良好细线图案和使用涂料的图案之间良好窄间隙的电子电路，并且可以实现有机薄膜电子器件和电子电路的成本降低，因为它们可以是 通过开发印刷技术实现。

公开(公告)号：US07944039B2

公开(公告)日：2011-05-17

申请号：US12402862

申请日：2009-03-12

申请人： Tadashi Arai

发明人： Tadashi Arai

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/28

CPC分类号： H01L21/6835 ,  H01L21/568 ,  H01L23/16 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/5389 ,  H01L23/544 ,  H01L24/19 ,  H01L24/20 ,  H01L2223/54426 ,  H01L2223/54473 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/18162 ,  H01L2924/00

摘要： A semiconductor device includes a chip, a laminated wiring structure formed integrally with the chip, a frame disposed to surround the chip and made of a material having stiffness, and a sealing resin formed to bury therein the frame and at least the periphery of the side surface of the chip. The laminated wiring structure includes a required number of wiring layers, which are formed by patterning in such a manner that a wiring pattern directly routed from an electrode terminal of the chip is electrically connected to pad portions for bonding external connection terminals, the pad portions being provided, at a position directly below a mounting area of the chip and at a position directly below an area outside the mounting area, on a surface to which the external connection terminals are bonded.

摘要翻译： 半导体器件包括芯片，与芯片一体形成的层叠布线结构，设置成围绕芯片并由具有刚度的材料制成的框架，以及形成为将框架和至少边缘的周边埋入其中的密封树脂 表面的芯片。 层叠布线结构包括所需数量的布线层，其通过图案化形成，使得从芯片的电极端子直接路由的布线图案电连接到用于接合外部连接端子的焊盘部分，焊盘部分是 设置在与芯片的安装区域正下方的位置以及安装区域外侧的区域正下方的位置。

公开(公告)号：US07700403B2

公开(公告)日：2010-04-20

申请号：US12320201

申请日：2009-01-21

申请人： Tadashi Arai ,  Shinichi Saito

发明人： Tadashi Arai ,  Shinichi Saito

IPC分类号： H01L51/40 ,  H01L21/312

CPC分类号： H01L51/0023 ,  H01L27/1225 ,  H01L29/7869 ,  H01L51/0545

摘要： When a thin film transistor is manufactured by using a printing method, the precision of alignment between a first electrode and a second electrode becomes a problem. If it is manufactured by using photolithography, a photomask for each layer is necessary, resulting in the cost being increased. The essence of the present invention is that not only processing the gate shape is carried out over the substrate by using a resist pattern formed by exposing using a photo-mask for the gate pattern but also processing the source-drain electrodes is carried out by lifting-off. As a result, alignment between the source-drain electrode and the gate electrode is carried out.

摘要翻译： 当通过使用印刷方法制造薄膜晶体管时，第一电极和第二电极之间的对准精度成为问题。 如果通过使用光刻法制造，则需要每层的光掩模，导致成本增加。 本发明的精髓在于，通过使用通过使用用于栅极图案的光掩模进行曝光而形成的抗蚀剂图案，不仅处理栅极形状，而且通过提升来进行源极 - 漏极处理 -off。 结果，进行源极 - 漏极电极和栅电极之间的对准。

公开(公告)号：US20090294852A1

公开(公告)日：2009-12-03

申请号：US12385937

申请日：2009-04-24

申请人： Masahiro Kawasaki ,  Masaaki Fujimori ,  Takeo Shiba ,  Shuji Imazeki ,  Tadashi Arai

发明人： Masahiro Kawasaki ,  Masaaki Fujimori ,  Takeo Shiba ,  Shuji Imazeki ,  Tadashi Arai

IPC分类号： H01L29/786

CPC分类号： H01L51/0541 ,  H01L51/0023 ,  H01L51/055

摘要： A thin-film transistor includes an insulating substrate, a source electrode, and a drain electrode, disposed over the top of the insulating substrate, a semiconductor layer electrically continuous with the source electrode, and the drain electrode, respectively, a gate dielectric film formed over the top of at least the semiconductor layer; and a gate electrode disposed over the top of the gate dielectric film so as to overlap the semiconductor layer. Further, a first bank insulator is formed so as to overlie the source electrode, a second bank insulator is formed so as to overlie the drain electrode, and the semiconductor layer, the gate dielectric film, and the gate electrode are embedded in a region between the first bank insulator, and the second bank insulator.

摘要翻译： 薄膜晶体管包括绝缘基板，源电极和漏电极，设置在绝缘基板的顶部上，分别与源极电连接的半导体层和漏极电极形成的栅极电介质膜 至少在半导体层的顶部; 以及设置在栅极电介质膜的顶部上以与半导体层重叠的栅电极。 此外，形成第一堤绝缘体以覆盖源电极，形成第二堤绝缘体以覆盖漏电极，并且半导体层，栅极电介质膜和栅极电极嵌入在 第一银行绝缘子和第二银行绝缘子。

公开(公告)号：US07575952B2

公开(公告)日：2009-08-18

申请号：US11797419

申请日：2007-05-03

申请人： Tadashi Arai ,  Shinichi Saito

发明人： Tadashi Arai ,  Shinichi Saito

IPC分类号： H01L51/40

CPC分类号： H01L51/102 ,  B82Y30/00 ,  H01L51/0015 ,  H01L51/0023 ,  H01L51/0545

摘要： A method of manufacturing a semiconductor device having an organic semiconductor film comprises a step of preparing a transparent substrate at least having an opaque gate electrode and a gate insulator thereover, a step of forming a layer containing metal-nano-particles as a conductive layer for a source electrode and a drain electrode to the thus prepared transparent substrate, a step of applying exposure to the transparent substrate on the side of a surface not mounted with the opaque gate electrode, a step of flushing away a portion other than the source electrode and the drain electrode in the layer containing the metal-nano-particles after the exposure, and a step of forming an organic semiconductor layer forming a channel portion. Lower and upper electrodes are positioned in self-alignment manner and thus no positional displacement occurs even if a printing method is used. Accordingly, semiconductor devices such as flexible substrates using an organic semiconductor can be manufactured inexpensively by using a printing method.

摘要翻译： 制造具有有机半导体膜的半导体器件的方法包括制备至少具有不透明栅电极和栅极绝缘体的透明基板的步骤，形成包含金属纳米颗粒的层作为导电层的步骤 源极电极和漏电极，对未形成的不透光栅电极的表面侧的透明基板进行曝光，除去源电极以外的部分的工序;以及 在曝光后含有金属 - 纳米粒子的层中的漏电极，以及形成形成沟道部分的有机半导体层的工序。 下电极和上电极以自对准方式定位，因此即使使用打印方法也不会发生位置偏移。 因此，可以通过使用印刷方法廉价地制造诸如使用有机半导体的柔性基板的半导体器件。

公开(公告)号：US20070278405A1

公开(公告)日：2007-12-06

申请号：US11809014

申请日：2007-05-30

申请人： Yoshiharu Shirakawabe ,  Hiroshi Takahashi ,  Tadashi Arai

发明人： Yoshiharu Shirakawabe ,  Hiroshi Takahashi ,  Tadashi Arai

IPC分类号： G01N23/00

CPC分类号： G01Q70/16 ,  G01N23/00 ,  G01N23/225 ,  G01Q70/06 ,  G01Q70/12 ,  G01R3/00 ,  Y10T29/49007

摘要： In order to establish processing techniques capable of making multi-tip probes with sub-micron intervals and provide such microscopic multi-tip probes, there is provided an outermost surface analysis apparatus for semiconductor devices etc. provided with a function for enabling positioning to be performed in such a manner that there is no influence on measurement in electrical measurements, at an extremely small region using this microscopic multi-tip probe, and there are provided the steps of making a cantilever 1 formed with a plurality of electrodes 3 using lithographic techniques, and forming microscopic electrodes 6 minute in pitch by sputtering or gas-assisted etching a distal end of the cantilever 1 using a focused charged particle beam or using CVD.

摘要翻译： 为了建立能够制造具有亚微米间隔的多尖端探针并提供这种微观多尖头探针的加工技术，提供了一种用于半导体器件等的最外表面分析装置，其具有使得能够进行定位的功能 以这样的方式，在使用这种微型多尖头探针的极小区域上对电测量中的测量没有影响，并且提供了使用光刻技术制造形成有多个电极3的悬臂1的步骤， 并通过溅射或使用聚焦的带电粒子束或使用CVD气化辅助蚀刻悬臂1的远端来形成间隔6分钟的微观电极。

公开(公告)号：US20070259478A1

公开(公告)日：2007-11-08

申请号：US11797419

申请日：2007-05-03

申请人： Tadashi Arai ,  Shinichi Saito

发明人： Tadashi Arai ,  Shinichi Saito

IPC分类号： H01L51/40

CPC分类号： H01L51/102 ,  B82Y30/00 ,  H01L51/0015 ,  H01L51/0023 ,  H01L51/0545

摘要： A method of manufacturing a semiconductor device having an organic semiconductor film comprises a step of preparing a transparent substrate at least having an opaque gate electrode and a gate insulator thereover, a step of forming a layer containing metal-nano-particles as a conductive layer for a source electrode and a drain electrode to the thus prepared transparent substrate, a step of applying exposure to the transparent substrate on the side of a surface not mounted with the opaque gate electrode, a step of flushing away a portion other than the source electrode and the drain electrode in the layer containing the metal-nano-particles after the exposure, and a step of forming an organic semiconductor layer forming a channel portion. Lower and upper electrodes are positioned in self-alignment manner and thus no positional displacement occurs even if a printing method is used. Accordingly, semiconductor devices such as flexible substrates using an organic semiconductor can be manufactured inexpensively by using a printing method.

公开(公告)号：US20070210311A1

公开(公告)日：2007-09-13

申请号：US11624801

申请日：2007-01-19

申请人： Masahiko Ando ,  Tomohiro Inoue ,  Tadashi Arai ,  Masaaki Fujimori

发明人： Masahiko Ando ,  Tomohiro Inoue ,  Tadashi Arai ,  Masaaki Fujimori

IPC分类号： H01L29/04

CPC分类号： H01L29/41758 ,  H01L27/12 ,  H01L27/124 ,  H01L27/1292 ,  H01L27/283 ,  H01L29/41733 ,  H01L29/42384 ,  H01L51/0022 ,  H01L51/0036 ,  H01L51/0097 ,  H01L51/0545

摘要： In conventional techniques, there has been a problem such that a pattern failure tends to occur in which electrode patterns formed by coating do not coincide with lyophilic patterns and the coating process is complicated to degrade the productivity. The present invention provides a thin film transistor substrate including: a substrate; a plurality of gate electrodes formed on a flat surface of the substrate so as to form an array constituted with ring-shaped flat patterns formed by continuously connecting the outer peripheries of a plurality of ellipses aligned along the major axis direction, or patterns each formed with the peripheral shape of an ellipse; a gate insulating film formed over the gate electrodes; and source electrodes and drain electrodes formed on the gate insulating film exclusive of the flat surface regions, on the gate insulating film, defined as the projected shapes of the gate electrodes.

摘要翻译： 在常规技术中，存在这样的问题，即容易发生图案破坏，其中通过涂布形成的电极图案与亲液图案不一致，并且涂布过程复杂以降低生产率。 本发明提供一种薄膜晶体管基板，包括：基板; 形成在基板的平面上的多个栅电极，形成由连续地连接沿长轴方向排列的多个椭圆的外周而形成的环状平坦图案的阵列，或者形成有 椭圆的周边形状; 形成在栅电极上的栅极绝缘膜; 以及形成在栅极绝缘膜上的不包括平坦表面区域的栅极绝缘膜上的源电极和漏电极，被定义为栅电极的投影形状。