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    Electricity storage device
    2.
    发明授权
    Electricity storage device 有权

    公开(公告)号：US10193114B2

    公开(公告)日：2019-01-29

    申请号：US14425524

    申请日：2013-11-27

    申请人： Koichi Nagamine ,  Masahiko Kitamura

    发明人： Koichi Nagamine ,  Masahiko Kitamura

    IPC分类号： H01M2/10 ,  H01M2/12 ,  H01M10/625 ,  H01M10/6556 ,  H01M10/6557 ,  H01M10/613 ,  H01M10/6563 ,  H01M10/647

    摘要： An electricity storage device includes: a plurality of batteries juxtaposed in a first direction, each battery having on a first side a gas discharge valve that discharges a gas produced inside the battery; and a cooling path formed between the plurality of batteries that face each other in the first direction, constructed to convey a coolant that cools the batteries, and an intake opening for taking in the coolant on a second side that is an opposite side to the first side in a second direction orthogonal to the first direction and a discharge opening for discharging the coolant taken in on at least one of sides in a third direction orthogonal to the second direction and to the first direction.

    ELECTRICITY STORAGE DEVICE
    3.
    发明申请
    ELECTRICITY STORAGE DEVICE 审中-公开
    电力存储设备

    公开(公告)号：US20150228947A1

    公开(公告)日：2015-08-13

    申请号：US14425524

    申请日：2013-11-27

    申请人： Koichi Nagamine ,  Masahiko Kitamura

    发明人： Koichi Nagamine ,  Masahiko Kitamura

    IPC分类号： H01M2/12 ,  H01M2/10

    CPC分类号： H01M2/12 ,  H01M2/1077 ,  H01M2/1276 ,  H01M10/613 ,  H01M10/625 ,  H01M10/647 ,  H01M10/6556 ,  H01M10/6557 ,  H01M10/6563 ,  H01M2220/20

    摘要： An electricity storage device includes: a plurality of batteries juxtaposed in a first direction, each battery having on a first side a gas discharge valve that discharges a gas produced inside the battery; and a cooling path formed between the plurality of batteries that face each other in the first direction, constructed to convey a coolant that cools the batteries, and an intake opening for taking in the coolant on a second side that is an opposite side to the first side in a second direction orthogonal to the first direction and a discharge opening for discharging the coolant taken in on at least one of sides in a third direction orthogonal to the second direction and to the first direction.

    摘要翻译： 电力存储装置包括：多个电池，其在第一方向上并置，每个电池在第一侧具有排出电池内部产生的气体的排气阀; 以及形成在所述多个电池之间的冷却路径，所述冷却路径被构造成输送冷却所述电池的冷却剂，以及用于在与所述第一方向相反的一侧的第二侧吸入所述冷却剂的吸入口 在与第一方向正交的第二方向上的一侧的排出口和用于将与第二方向正交的第三方向上的至少一侧的冷却剂排出到第一方向的排出口。

    Production method for semiconductor chip
    4.
    发明授权
    Production method for semiconductor chip 有权
    半导体芯片的生产方法

    公开(公告)号：US06852608B2

    公开(公告)日：2005-02-08

    申请号：US10250916

    申请日：2002-11-15

    申请人： Masahiko Kitamura ,  Koichi Yajima ,  Yusuke Kimura ,  Tomotaka Tabuchi

    发明人： Masahiko Kitamura ,  Koichi Yajima ,  Yusuke Kimura ,  Tomotaka Tabuchi

    IPC分类号： H01L21/00 ,  H01L21/301 ,  H01L21/304 ,  H01L21/44 ,  H01L21/68 ,  H01L21/78 ,  H01L21/784

    CPC分类号： H01L21/67132 ,  H01L21/3043 ,  H01L21/78 ,  Y10S438/977

    摘要： A semiconductor wafer is applied to a support disk via an intervening adhesive layer with the front side of the semiconductor wafer facing the adhesive layer, which is sensitive to a certain exterior factor for reducing its adhesive force; the semiconductor wafer is ground on the rear side; the wafer-and-support combination is applied to a dicing adhesive tape with the so ground rear side facing the dicing adhesive tape, which is surrounded and supported by the circumference by a dicing frame; the certain exterior factor is effected on the intervening adhesive layer to reduce its adhesive force; and the intervening adhesive layer and support disk are removed from the semiconductor wafer or chips without the possibility of damaging the same.

    摘要翻译： 将半导体晶片通过中间粘合剂层施加到支撑盘上，其中半导体晶片的正面朝向粘合剂层，该粘合剂层对某一外部因素敏感以减小其粘附力; 半导体晶片在后侧被研磨; 将晶片和支撑组合应用于切割粘合带，其具有如此接地的后侧面向切割粘合带，该切割粘合带由切割架围绕并由圆周支撑; 某些外部因素在中间粘合剂层上实现，以降低其粘附力; 并且中间粘合剂层和支撑盘从半导体晶片或芯片移除，而不会损坏半导体晶片或芯片。

    Method for manufacturing semiconductor chip
    5.
    发明授权
    Method for manufacturing semiconductor chip 失效
    制造半导体芯片的方法

    公开(公告)号：US07172950B2

    公开(公告)日：2007-02-06

    申请号：US10807276

    申请日：2004-03-24

    申请人： Kouji Takezoe ,  Akito Ichikawa ,  Koichi Tamura ,  Masahiko Kitamura ,  Koichi Yajima ,  Masatoshi Nanjo ,  Shinichi Namioka

    发明人： Kouji Takezoe ,  Akito Ichikawa ,  Koichi Tamura ,  Masahiko Kitamura ,  Koichi Yajima ,  Masatoshi Nanjo ,  Shinichi Namioka

    IPC分类号： H01L21/00

    CPC分类号： H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L2221/68327 ,  H01L2221/6834

    摘要： In manufacturing thinned semiconductor chips by grinding a semiconductor wafer supported on a rigid support substrate, in order to remove the semiconductor wafer or semiconductor chips from the support substrate without damage to the semiconductor wafer or semiconductor chips, a semiconductor wafer at its surface is bonded on a light-transmissive support substrate through an adhesive layer having an adhesion force that is reduced upon exposure to light radiation, thereby exposing the back surface of the semiconductor wafer. A tape is bonded to the backside of the semiconductor wafer integrated with the support substrate after grinding, wherein the tape is supported at the periphery. Before or after bonding of the tape, light radiation is applied to the adhesive layer at a side close to the support substrate to reduce the adhesion force in the adhesion layer. Thereafter, the support substrate and adhesive layer is removed from the surface of the semiconductor wafer, leaving the semiconductor wafer held by the tape and frame. The semiconductor wafer supported by the tape and frame is cut at streets into individual semiconductor chips.

    摘要翻译： 在通过磨削支撑在刚性支撑衬底上的半导体晶片来制造薄化的半导体芯片中，为了从衬底基板移除半导体晶片或半导体芯片而不损坏半导体晶片或半导体芯片，其表面上的半导体晶片被接合在 通过具有粘附力的粘合剂层的透光性支撑基板，其在暴露于光辐射时减小，从而暴露半导体晶片的背面。 在研磨之后，将带粘合到与支撑基板一体化的半导体晶片的背面，其中带被支撑在周边。 在胶带粘合之前或之后，在靠近支撑基板的一侧将光辐射施加到粘合剂层，以降低粘合层中的粘附力。 此后，从半导体晶片的表面去除支撑基板和粘合剂层，使半导体晶片保持在带和框架上。 由胶带和框架支撑的半导体晶片在街道上被切割成单独的半导体芯片。

    Method for manufacturing semiconductor chip
    8.
    发明授权
    Method for manufacturing semiconductor chip 有权
    制造半导体芯片的方法

    公开(公告)号：US07335578B2

    公开(公告)日：2008-02-26

    申请号：US10490557

    申请日：2003-04-09

    申请人： Masateru Fukuoka ,  Munehiro Hatai ,  Satoshi Hayashi ,  Yasuhiko Oyama ,  Shigeru Danjo ,  Masahiko Kitamura ,  Koichi Yajima

    发明人： Masateru Fukuoka ,  Munehiro Hatai ,  Satoshi Hayashi ,  Yasuhiko Oyama ,  Shigeru Danjo ,  Masahiko Kitamura ,  Koichi Yajima

    IPC分类号： H01L21/00

    CPC分类号： H01L21/6835 ,  B24B7/228 ,  B24B41/068 ,  H01L21/304 ,  H01L21/67092 ,  H01L21/67132 ,  H01L21/6836 ,  H01L21/78 ,  H01L2221/68327 ,  H01L2221/6834 ,  Y10S438/977

    摘要： A semiconductor wafer (W) where circuits are formed in the area divided by streets is split into semiconductor chips having individual circuits. By interposing an adhesive sheet, whose adhesive force is lowered by stimulation, between the semiconductor wafer (W) and the support plate (13), the front side of the semiconductor wafer (W) is adhered to the support plate (13), thereby exposing the rear face (10) of the semiconductor wafer (W). The rear face (10) of the semiconductor wafer (W) with the support plate (13) is ground. After the grinding is finished, the semiconductor wafer (W) held with the rear face (10) up is diced into semiconductor chips (C). The adhesive sheet is given stimulus to lower the adhesive force and the semiconductor chips (C) are removed from the support plate (13). The semiconductor wafer and semiconductor chips are always supported by the support plate, avoiding damage and deformation.

    摘要翻译： 在由街道划分的区域中形成电路的半导体晶片（W）被分成具有单独电路的半导体芯片。 通过在半导体晶片（W）和支撑板（13）之间插入粘合剂片（其粘合力被刺激而降低），半导体晶片（W）的前侧被粘附到支撑板（13），由此 暴露半导体晶片（W）的背面（10）。 研磨具有支撑板（13）的半导体晶片（W）的背面（10）。 研磨完成后，将保持有背面（10）的半导体晶片（W）切成半导体芯片（C）。 给予粘合片刺激以降低粘合力，并且将半导体芯片（C）从支撑板（13）移除。 半导体晶片和半导体芯片总是由支撑板支撑，避免损坏和变形。

    Charge removal brush
    9.
    发明授权
    Charge removal brush 失效
    充电清除刷

    公开(公告)号：US5508879A

    公开(公告)日：1996-04-16

    申请号：US298556

    申请日：1994-08-30

    申请人： Masahiko Kitamura ,  Kiyoshi Chatani ,  Kazuhiro Yoshihara ,  Ikuro Sugiyama ,  Toyohiro Kanzaki

    发明人： Masahiko Kitamura ,  Kiyoshi Chatani ,  Kazuhiro Yoshihara ,  Ikuro Sugiyama ,  Toyohiro Kanzaki

    IPC分类号： A46B15/00 ,  G03G15/00 ,  G03G15/01 ,  G03G15/02 ,  G03G15/16 ,  G03G21/00 ,  G03G21/06 ,  G03G21/10 ,  H05F3/02

    CPC分类号： G03G15/166 ,  G03G15/0131 ,  G03G21/0035 ,  H05F3/02

    摘要： A charge removal brush with a number of long conductive filamentous elements for removing charges from an object when the charge removal brush comes in contact with the object, is disclosed. The charge removal brush includes a metal shaft rotatable about the axis thereof, a strip-like woven cloth including a base cloth and long conductive filamentous elements uniformly planted in the substantially entire surface of the base cloth, the strip-like woven cloth being spirally wound on the metal shaft with no gap, and a conductive fiber is woven into the base cloth in a state that the conductive fiber runs along the center line of the base cloth, which is extended in the lengthwise direction of the base cloth.

    摘要翻译： 公开了一种具有多个长导电丝状元件的电荷去除刷，用于在电荷去除刷与物体接触时从物体去除电荷。 电荷去除刷包括能够围绕其轴线旋转的金属轴，包括基布的条状织物和均匀地植入基布的大致整个表面的长导电丝状元件，带状织物被螺旋卷绕 在没有间隙的金属轴上，并且导电纤维沿着沿着基布的长度方向延伸的基布的中心线延伸的状态被编织到基布中。