Abstract:
An LED having vertical topology and a method of making the same is capable of improving a luminous efficiency and reliability, and is also capable of achieving mass productivity. The method includes forming a semiconductor layer on a substrate; forming a first electrode on the semiconductor layer; forming a supporting layer on the first electrode; generating an acoustic stress wave at the interface between the substrate and semiconductor layer, thereby separating the substrate from the semiconductor layer; and forming a second electrode on the semiconductor layer exposed by the separation of the substrate.
Abstract:
A phosphor composition of an embodiment and a light emitting device package including the same includes: a green phosphor excited by blue light to emit green light; a first red phosphor of a nitride series which is excited by the blue light and emits first red light; and a second red phosphor of a fluorine series which is excited by the blue light and emits second red light, and is capable of emitting white light without deterioration of optical characteristics at a high temperature while improving luminous flux and color reproduction rate as compared with a light emitting device package including a conventional phosphor composition.
Abstract:
A light emitting device can include a supporting layer; a semiconductor structure including: an active layer between first-type and second-type semiconductor layers, a first top surface and a first bottom surface, and a side surface between the first top and bottom surfaces, which is inclined; a first electrode between the supporting and semiconductor layers; a connection metal layer having a first portion between the first electrode and the supporting layer, which includes a stepped portion having a upper portion contacting the first electrode, and a second portion of the connection metal layer extends beyond the semiconductor structure; and a passivation layer extending from the second portion of the connection metal layer to the side surface of the semiconductor structure, which includes a second bottom surface contacting the second portion of the connection metal layer; and a second top surface opposite to the second bottom surface.