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    Epitaxial Lift-Off and Wafer Reuse
    1.
    发明申请
    Epitaxial Lift-Off and Wafer Reuse 审中-公开
    外延提升和晶圆再利用

    公开(公告)号：US20120309172A1

    公开(公告)日：2012-12-06

    申请号：US13118900

    申请日：2011-05-31

    申请人： Linda T. Romano ,  David P. Bour ,  Richard J. Brown ,  Andrew P. Edwards ,  Isik C. Kizilyalli ,  Hui Nie ,  Thomas R. Prunty

    发明人： Linda T. Romano ,  David P. Bour ,  Richard J. Brown ,  Andrew P. Edwards ,  Isik C. Kizilyalli ,  Hui Nie ,  Thomas R. Prunty

    IPC分类号： H01L21/20

    CPC分类号： H01L21/2654 ,  H01L21/02002 ,  H01L21/02389 ,  H01L21/02458 ,  H01L21/02507 ,  H01L21/0254 ,  H01L21/02664 ,  H01L33/0079

    摘要： A method of reusing a III-nitride growth substrate according to embodiments of the invention includes epitaxially growing a III-nitride semiconductor structure on a III-nitride substrate. The III-nitride semiconductor structure includes a sacrificial layer and an additional layer grown over the sacrificial layer. The sacrificial layer is implanted with at least one implant species. The III-nitride substrate is separated from the additional layer at the implanted sacrificial layer. In some embodiments the III-nitride substrate is GaN and the sacrificial layer is GaN, an aluminum-containing III-nitride layer, or an indium-containing III-nitride layer. In some embodiments, the III-nitride substrate is separated from the additional layer by etching the implanted sacrificial layer.

    摘要翻译： 根据本发明的实施例的重新使用III族氮化物生长衬底的方法包括在III族氮化物衬底上外延生长III族氮化物半导体结构。 III族氮化物半导体结构包括在牺牲层上生长的牺牲层和附加层。 牺牲层植入至少一种植入物种。 在注入的牺牲层处将III族氮化物衬底与附加层分离。 在一些实施例中，III族氮化物衬底是GaN，牺牲层是GaN，含铝的III族氮化物层或含铟的III族氮化物层。 在一些实施例中，通过蚀刻注入的牺牲层将III族氮化物衬底与附加层分离。

    Method and system for a GAN vertical JFET utilizing a regrown gate
    3.
    发明授权
    Method and system for a GAN vertical JFET utilizing a regrown gate 有权
    使用再生栅的GAN垂直JFET的方法和系统

    公开(公告)号：US09184305B2

    公开(公告)日：2015-11-10

    申请号：US13198655

    申请日：2011-08-04

    申请人： Isik C. Kizilyalli ,  Hui Nie ,  Andrew P. Edwards ,  Linda Romano ,  David P. Bour ,  Richard J. Brown ,  Thomas R. Prunty

    发明人： Isik C. Kizilyalli ,  Hui Nie ,  Andrew P. Edwards ,  Linda Romano ,  David P. Bour ,  Richard J. Brown ,  Thomas R. Prunty

    IPC分类号： H01L21/337 ,  H01L29/808 ,  H01L29/10 ,  H01L29/66 ,  H01L29/20

    CPC分类号： H01L29/8083 ,  H01L29/1066 ,  H01L29/1095 ,  H01L29/2003 ,  H01L29/66446 ,  H01L29/66909 ,  H01L29/66924

    摘要： A vertical III-nitride field effect transistor includes a drain comprising a first III-nitride material, a drain contact electrically coupled to the drain, and a drift region comprising a second III-nitride material coupled to the drain and disposed adjacent to the drain along a vertical direction. The field effect transistor also includes a channel region comprising a third III-nitride material coupled to the drift region, a gate region at least partially surrounding the channel region, and a gate contact electrically coupled to the gate region. The field effect transistor further includes a source coupled to the channel region and a source contact electrically coupled to the source. The channel region is disposed between the drain and the source along the vertical direction such that current flow during operation of the vertical III-nitride field effect transistor is along the vertical direction.

    摘要翻译： 垂直III族氮化物场效应晶体管包括：包含第一III族氮化物材料的漏极，与漏极电耦合的漏极接触点;以及漂移区域，包括耦合到漏极并邻近漏极设置的第二III族氮化物材料 垂直方向 场效应晶体管还包括沟道区，该沟道区包括耦合到漂移区的第三III族氮化物材料，至少部分围绕沟道区的栅极区和电耦合到栅极区的栅极接触。 场效应晶体管还包括耦合到沟道区的源极和电耦合到源极的源极接触。 沟道区域沿着垂直方向设置在漏极和源极之间，使得垂直III族氮化物场效应晶体管的工作期间的电流沿着垂直方向。

    METHOD OF FABRICATING A GAN MERGED P-I-N SCHOTTKY (MPS) DIODE
    7.
    发明申请
    METHOD OF FABRICATING A GAN MERGED P-I-N SCHOTTKY (MPS) DIODE 有权
    制备GAN MERGED P-I-N肖特基（MPS）二极体的方法

    公开(公告)号：US20130087878A1

    公开(公告)日：2013-04-11

    申请号：US13270625

    申请日：2011-10-11

    申请人： Andrew P. Edwards ,  Hui Nie ,  Isik C. Kizilyalli ,  Linda Romano ,  David P. Bour ,  Richard J. Brown ,  Thomas R. Prunty

    发明人： Andrew P. Edwards ,  Hui Nie ,  Isik C. Kizilyalli ,  Linda Romano ,  David P. Bour ,  Richard J. Brown ,  Thomas R. Prunty

    IPC分类号： H01L29/47 ,  H01L21/20

    CPC分类号： H01L29/66143 ,  H01L21/046 ,  H01L21/0495 ,  H01L29/2003 ,  H01L29/47 ,  H01L29/475 ,  H01L29/868 ,  H01L29/872

    摘要： A semiconductor structure includes a III-nitride substrate with a first side and a second side opposing the first side. The III-nitride substrate is characterized by a first conductivity type and a first dopant concentration. The semiconductor structure also includes a III-nitride epitaxial structure including a first III-nitride epitaxial layer coupled to the first side of the III-nitride substrate and a plurality of III-nitride regions of a second conductivity type. The plurality of III-nitride regions have at least one III-nitride epitaxial region of the first conductivity type between each of the plurality of III-nitride regions. The semiconductor structure further includes a first metallic structure electrically coupled to one or more of the plurality of III-nitride regions and the at least one III-nitride epitaxial region. A Schottky contact is created between the first metallic structure and the at least one III-nitride epitaxial region.

    摘要翻译： 半导体结构包括具有第一侧和与第一侧相对的第二侧的III族氮化物衬底。 III族氮化物衬底的特征在于第一导电类型和第一掺杂剂浓度。 半导体结构还包括III族氮化物外延结构，其包括耦合到III族氮化物衬底的第一侧的第一III族氮化物外延层和多个第二导电类型的III族氮化物区域。 多个III族氮化物区域在多个III族氮化物区域中的每一个之间具有至少一个第一导电类型的III族氮化物外延区域。 半导体结构还包括电耦合到多个III族氮化物区域和至少一个III族氮化物外延区域中的一个或多个的第一金属结构。 在第一金属结构和至少一个III族氮化物外延区之间产生肖特基接触。

    Method and system for a GaN vertical JFET utilizing a regrown channel
    9.
    发明授权
    Method and system for a GaN vertical JFET utilizing a regrown channel 有权
    利用再生长通道的GaN垂直JFET的方法和系统

    公开(公告)号：US08969912B2

    公开(公告)日：2015-03-03

    申请号：US13198659

    申请日：2011-08-04

    申请人： Isik C. Kizilyalli ,  Hui Nie ,  Andrew P. Edwards ,  Linda Romano ,  David P. Bour ,  Richard J. Brown ,  Thomas R. Prunty

    发明人： Isik C. Kizilyalli ,  Hui Nie ,  Andrew P. Edwards ,  Linda Romano ,  David P. Bour ,  Richard J. Brown ,  Thomas R. Prunty

    IPC分类号： H01L29/74 ,  H01L31/0328 ,  H01L29/80 ,  H01L29/76 ,  H01L21/8238 ,  H01L21/336 ,  H01L29/66 ,  H01L21/8252 ,  H01L27/06 ,  H01L29/808 ,  H01L29/10 ,  H01L29/20

    CPC分类号： H01L29/66909 ,  H01L21/8252 ,  H01L27/0605 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/66446 ,  H01L29/66924 ,  H01L29/8083

    摘要： A vertical III-nitride field effect transistor includes a drain comprising a first III-nitride material, a drain contact electrically coupled to the drain, and a drift region comprising a second III-nitride material coupled to the drain. The field effect transistor also includes a channel region comprising a third III-nitride material coupled to the drain and disposed adjacent to the drain along a vertical direction, a gate region at least partially surrounding the channel region, having a first surface coupled to the drift region and a second surface on a side of the gate region opposing the first surface, and a gate contact electrically coupled to the gate region. The field effect transistor further includes a source coupled to the channel region and a source contact electrically coupled to the source. The channel region is disposed between the drain and the source along the vertical direction such that current flow during operation of the vertical III-nitride field effect transistor is along the vertical direction, and the channel region extends along at least a portion of the second surface of the gate region.

    摘要翻译： 垂直III族氮化物场效应晶体管包括：包含第一III族氮化物材料的漏极，与漏极电耦合的漏极接触点，以及包括耦合到漏极的第二III族氮化物材料的漂移区域。 场效应晶体管还包括沟道区，该沟道区包括耦合到漏极并沿着垂直方向邻近漏极设置的第三III族氮化物材料，至少部分围绕沟道区的栅极区，具有耦合到漂移的第一表面 区域和与栅极区域相对的栅极区域的一侧上的第二表面，以及电连接到栅极区域的栅极接触。 场效应晶体管还包括耦合到沟道区的源极和电耦合到源极的源极接触。 沟道区域沿着垂直方向设置在漏极和源极之间，使得在垂直III族氮化物场效应晶体管的操作期间的电流沿着垂直方向，并且沟道区域沿着第二表面的至少一部分延伸 的门区域。